Where to call L2 cache enabling code from?

Where to call L2 cache enabling code from?

[Steve Snyder]

I have a machine in which the BIOS does not enable the Pentium3's L2 cache 
at boot time.  At what point in the kernel init process can/should I call 
the code to enable the cache?

Thanks.

Re: Where to call L2 cache enabling code from?

[Alan Cox]

On Gwe, 2006-04-14 at 11:05 -0400, Steve Snyder wrote:
> I have a machine in which the BIOS does not enable the Pentium3's L2 cache 
> at boot time.  At what point in the kernel init process can/should I call 
> the code to enable the cache?

What part of the cache setup is not done correctly ? The mtrr registers
or other things ?

Re: Where to call L2 cache enabling code from?

[Steve Snyder]

On Friday 14 April 2006 11:46 am, Alan Cox wrote:
> On Gwe, 2006-04-14 at 11:05 -0400, Steve Snyder wrote:
> > I have a machine in which the BIOS does not enable the Pentium3's L2
> > cache at boot time.  At what point in the kernel init process
> > can/should I call the code to enable the cache?
>
> What part of the cache setup is not done correctly ? The mtrr registers
> or other things ?

It's not that the kernel is failing in any respect.  The BIOS simply does 
not enable the on-CPU L2 cache at power-on.  (The machine originally 
shipped with a Pentium2, and doesn't know how to enable the L2 cache on 
the Pentium3 that is now running in it.)

I've got a small device driver that enables the L2 cache.  It works fine 
when build as a module and loaded after booting has completed.  My goal 
is to move the code into the kernel so that it is run early in the kernel 
init process.  I expect that having the L2 cache go from "0KB" to 256KB 
will improve boot time greatly, as well as informing the kernel from the 
get-go of the true capabilities of this processor.

Getting the code into the kernel image is a no-brainer.  But once it is 
built into the kernel, at what point should I call it?

Thanks for the response.

Re: Where to call L2 cache enabling code from?

[Dave Jones]

On Fri, Apr 14, 2006 at 12:49:49PM -0400, Steve Snyder wrote:
 > On Friday 14 April 2006 11:46 am, Alan Cox wrote:
 > > On Gwe, 2006-04-14 at 11:05 -0400, Steve Snyder wrote:
 > > > I have a machine in which the BIOS does not enable the Pentium3's L2
 > > > cache at boot time.  At what point in the kernel init process
 > > > can/should I call the code to enable the cache?
 > >
 > > What part of the cache setup is not done correctly ? The mtrr registers
 > > or other things ?
 > 
 > It's not that the kernel is failing in any respect.  The BIOS simply does 
 > not enable the on-CPU L2 cache at power-on.  (The machine originally 
 > shipped with a Pentium2, and doesn't know how to enable the L2 cache on 
 > the Pentium3 that is now running in it.)
 > 
 > I've got a small device driver that enables the L2 cache.  It works fine 
 > when build as a module and loaded after booting has completed.  My goal 
 > is to move the code into the kernel so that it is run early in the kernel 
 > init process.  I expect that having the L2 cache go from "0KB" to 256KB 
 > will improve boot time greatly, as well as informing the kernel from the 
 > get-go of the true capabilities of this processor.
 > 
 > Getting the code into the kernel image is a no-brainer.  But once it is 
 > built into the kernel, at what point should I call it?

arch/i386/kernel/cpu/intel.c has a bunch of workarounds for various
issues.  Is there a valid use-case for ever booting with cache disabled
though? If so, this should probably be a boot-time option to enable it.

		Dave

-- 
http://www.codemonkey.org.uk

Re: Where to call L2 cache enabling code from?

[Zan Lynx]

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On Fri, 2006-04-14 at 12:00 -0500, Dave Jones wrote:
[snip]
> arch/i386/kernel/cpu/intel.c has a bunch of workarounds for various
> issues.  Is there a valid use-case for ever booting with cache disabled
> though? If so, this should probably be a boot-time option to enable it.

Yes, disabling the cache is useful to debug bad hardware.  If the CPU
cache is bad, then disabling it might make things work again and you
know what needs to be replaced.
-- 
Zan Lynx <zlynx@acm.org>

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