* [RFC] GPU device layer patchset (00/07) @ 2006-07-22 15:38 Dave Airlie 2006-07-22 15:38 ` [PATCH] drm: remove local copies of pci bus/slot/func (01/07) Dave Airlie 2006-07-22 16:35 ` [RFC] GPU device layer patchset (00/07) Jeff Garzik 0 siblings, 2 replies; 16+ messages in thread From: Dave Airlie @ 2006-07-22 15:38 UTC (permalink / raw) To: linux-kernel This patchset contains 7 patches to implement the GPU device layer. 0001-drm-remove-local-copies-of-pci-bus-slot-func.txt 0002-drm-remove-pci-domain-local-copy.txt 0003-gpu-Initial-GPU-layer-addition.txt 0004-gpu-radeon-add-a-radeon-lowlevel-GPU-driver.txt 0005-gpu-radeonfb-add-GPU-support-to-radeonfb.txt 0006-gpu-drm-Add-GPU-layer-support-to-generic-DRM.txt 0007-drm-gpu-radeon-Add-radeon-DRM-support-to-use-GPU-layer.txt The first two patches are changes to the DRM layer that I will submit separately later but are required for this work. The GPU layer generic code is in 0003 and 0006, radeon gpu driver 0004, radeonfb in 0005 and radeon drm in 0007. The code is also available in a git repo branch: 'gpu-branch' git://git.kernel.org/pub/scm/linux/kernel/git/airlied/gpu-2.6 This is the initial implementation for review. Dave. ^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH] drm: remove local copies of pci bus/slot/func (01/07) 2006-07-22 15:38 [RFC] GPU device layer patchset (00/07) Dave Airlie @ 2006-07-22 15:38 ` Dave Airlie 2006-07-22 15:38 ` [PATCH] drm: remove pci domain local copy (02/07) Dave Airlie 2006-07-22 16:35 ` [RFC] GPU device layer patchset (00/07) Jeff Garzik 1 sibling, 1 reply; 16+ messages in thread From: Dave Airlie @ 2006-07-22 15:38 UTC (permalink / raw) To: linux-kernel; +Cc: Dave Airlie The drm keeps a local copy of these for little use. Signed-off-by: Dave Airlie <airlied@linux.ie> (cherry picked from ed13f8ab3c841ebe5395dc6e10cb5f9aeb6fd627 commit) --- drivers/char/drm/drmP.h | 3 --- drivers/char/drm/drm_ioctl.c | 9 ++++++--- drivers/char/drm/drm_irq.c | 4 ++-- drivers/char/drm/drm_stub.c | 3 --- 4 files changed, 8 insertions(+), 11 deletions(-) diff --git a/drivers/char/drm/drmP.h b/drivers/char/drm/drmP.h index d2a5618..5c8f245 100644 --- a/drivers/char/drm/drmP.h +++ b/drivers/char/drm/drmP.h @@ -712,9 +712,6 @@ typedef struct drm_device { struct pci_dev *pdev; /**< PCI device structure */ int pci_domain; /**< PCI bus domain number */ - int pci_bus; /**< PCI bus number */ - int pci_slot; /**< PCI slot number */ - int pci_func; /**< PCI function number */ #ifdef __alpha__ struct pci_controller *hose; #endif diff --git a/drivers/char/drm/drm_ioctl.c b/drivers/char/drm/drm_ioctl.c index 555f323..5c020b8 100644 --- a/drivers/char/drm/drm_ioctl.c +++ b/drivers/char/drm/drm_ioctl.c @@ -128,8 +128,9 @@ int drm_setunique(struct inode *inode, s bus &= 0xff; if ((domain != dev->pci_domain) || - (bus != dev->pci_bus) || - (slot != dev->pci_slot) || (func != dev->pci_func)) + (bus != dev->pdev->bus->number) || + (slot != PCI_SLOT(dev->pdev->devfn)) || + (func != PCI_FUNC(dev->pdev->devfn))) return -EINVAL; return 0; @@ -148,7 +149,9 @@ static int drm_set_busid(drm_device_t * return ENOMEM; len = snprintf(dev->unique, dev->unique_len, "pci:%04x:%02x:%02x.%d", - dev->pci_domain, dev->pci_bus, dev->pci_slot, dev->pci_func); + dev->pci_domain, dev->pdev->bus->number, + PCI_SLOT(dev->pdev->devfn), + PCI_FUNC(dev->pdev->devfn)); if (len > dev->unique_len) DRM_ERROR("Unique buffer overflowed\n"); diff --git a/drivers/char/drm/drm_irq.c b/drivers/char/drm/drm_irq.c index ebdb718..ee4b183 100644 --- a/drivers/char/drm/drm_irq.c +++ b/drivers/char/drm/drm_irq.c @@ -65,8 +65,8 @@ int drm_irq_by_busid(struct inode *inode return -EFAULT; if ((p.busnum >> 8) != dev->pci_domain || - (p.busnum & 0xff) != dev->pci_bus || - p.devnum != dev->pci_slot || p.funcnum != dev->pci_func) + (p.busnum & 0xff) != dev->pdev->bus->number || + p.devnum != PCI_SLOT(dev->pdev->devfn) || p.funcnum != PCI_FUNC(dev->pdev->devfn)) return -EINVAL; p.irq = dev->irq; diff --git a/drivers/char/drm/drm_stub.c b/drivers/char/drm/drm_stub.c index 9a842a3..96449d5 100644 --- a/drivers/char/drm/drm_stub.c +++ b/drivers/char/drm/drm_stub.c @@ -72,9 +72,6 @@ #ifdef __alpha__ #else dev->pci_domain = 0; #endif - dev->pci_bus = pdev->bus->number; - dev->pci_slot = PCI_SLOT(pdev->devfn); - dev->pci_func = PCI_FUNC(pdev->devfn); dev->irq = pdev->irq; dev->maplist = drm_calloc(1, sizeof(*dev->maplist), DRM_MEM_MAPS); -- 1.4.1.ga3e6 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH] drm: remove pci domain local copy (02/07) 2006-07-22 15:38 ` [PATCH] drm: remove local copies of pci bus/slot/func (01/07) Dave Airlie @ 2006-07-22 15:38 ` Dave Airlie 2006-07-22 15:38 ` [PATCH] gpu: Initial GPU layer addition. (03/07) Dave Airlie 2006-07-22 16:34 ` [PATCH] drm: remove pci domain local copy (02/07) Jeff Garzik 0 siblings, 2 replies; 16+ messages in thread From: Dave Airlie @ 2006-07-22 15:38 UTC (permalink / raw) To: linux-kernel; +Cc: Dave Airlie Just call a function to retrieve the pci domain, this isn't exactly hotpath code. Signed-off-by: Dave Airlie <airlied@linux.ie> (cherry picked from 01852d755753bbfcd5434c55d4d7375580f8338f commit) --- drivers/char/drm/drmP.h | 10 +++++++++- drivers/char/drm/drm_ioctl.c | 4 ++-- drivers/char/drm/drm_irq.c | 2 +- 3 files changed, 12 insertions(+), 4 deletions(-) diff --git a/drivers/char/drm/drmP.h b/drivers/char/drm/drmP.h index 5c8f245..4dd28e1 100644 --- a/drivers/char/drm/drmP.h +++ b/drivers/char/drm/drmP.h @@ -711,7 +711,6 @@ typedef struct drm_device { drm_agp_head_t *agp; /**< AGP data */ struct pci_dev *pdev; /**< PCI device structure */ - int pci_domain; /**< PCI bus domain number */ #ifdef __alpha__ struct pci_controller *hose; #endif @@ -733,6 +732,15 @@ static __inline__ int drm_core_check_fea return ((dev->driver->driver_features & feature) ? 1 : 0); } +static inline int drm_get_pci_domain(struct drm_device *dev) +{ +#ifdef __alpha__ + return dev->hose->bus->number; +#else + return 0; +#endif +} + #if __OS_HAS_AGP static inline int drm_core_has_AGP(struct drm_device *dev) { diff --git a/drivers/char/drm/drm_ioctl.c b/drivers/char/drm/drm_ioctl.c index 5c020b8..9d9f988 100644 --- a/drivers/char/drm/drm_ioctl.c +++ b/drivers/char/drm/drm_ioctl.c @@ -127,7 +127,7 @@ int drm_setunique(struct inode *inode, s domain = bus >> 8; bus &= 0xff; - if ((domain != dev->pci_domain) || + if ((domain != drm_get_pci_domain(dev)) || (bus != dev->pdev->bus->number) || (slot != PCI_SLOT(dev->pdev->devfn)) || (func != PCI_FUNC(dev->pdev->devfn))) @@ -149,7 +149,7 @@ static int drm_set_busid(drm_device_t * return ENOMEM; len = snprintf(dev->unique, dev->unique_len, "pci:%04x:%02x:%02x.%d", - dev->pci_domain, dev->pdev->bus->number, + drm_get_pci_domain(dev), dev->pdev->bus->number, PCI_SLOT(dev->pdev->devfn), PCI_FUNC(dev->pdev->devfn)); diff --git a/drivers/char/drm/drm_irq.c b/drivers/char/drm/drm_irq.c index ee4b183..f93d8cd 100644 --- a/drivers/char/drm/drm_irq.c +++ b/drivers/char/drm/drm_irq.c @@ -64,7 +64,7 @@ int drm_irq_by_busid(struct inode *inode if (copy_from_user(&p, argp, sizeof(p))) return -EFAULT; - if ((p.busnum >> 8) != dev->pci_domain || + if ((p.busnum >> 8) != drm_get_pci_domain(dev) || (p.busnum & 0xff) != dev->pdev->bus->number || p.devnum != PCI_SLOT(dev->pdev->devfn) || p.funcnum != PCI_FUNC(dev->pdev->devfn)) return -EINVAL; -- 1.4.1.ga3e6 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH] gpu: Initial GPU layer addition. (03/07) 2006-07-22 15:38 ` [PATCH] drm: remove pci domain local copy (02/07) Dave Airlie @ 2006-07-22 15:38 ` Dave Airlie 2006-07-22 15:38 ` [PATCH] gpu/radeon: add a radeon lowlevel GPU driver (04/07) Dave Airlie ` (3 more replies) 2006-07-22 16:34 ` [PATCH] drm: remove pci domain local copy (02/07) Jeff Garzik 1 sibling, 4 replies; 16+ messages in thread From: Dave Airlie @ 2006-07-22 15:38 UTC (permalink / raw) To: linux-kernel; +Cc: Dave Airlie This is the new Linux GPU driver layer generic portion. It registers a bus at system init time, and this bus can be used by lowlevel drivers to create subdevices on the GPU bus. The other GPU drivers can be registered via the lowlevel driver on the other subdevices. Signed-off-by: Dave Airlie <airlied@linux.ie> --- drivers/video/Kconfig | 4 drivers/video/Makefile | 2 drivers/video/gpu_layer.c | 393 +++++++++++++++++++++++++++++++++++++++++++++ include/linux/gpu_layer.h | 120 ++++++++++++++ 4 files changed, 519 insertions(+), 0 deletions(-) diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 6533b0f..8512aa8 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -4,6 +4,10 @@ # menu "Graphics support" +config GPU + bool + default n + config FIRMWARE_EDID bool "Enable firmware EDID" default y diff --git a/drivers/video/Makefile b/drivers/video/Makefile index 95563c9..a882fdd 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -4,6 +4,8 @@ # Rewritten to use lists instead of if-s # Each configuration option enables a list of files. +obj-$(CONFIG_GPU) += gpu_layer.o + obj-$(CONFIG_FB) += fb.o fb-y := fbmem.o fbmon.o fbcmap.o fbsysfs.o \ modedb.o fbcvt.o diff --git a/drivers/video/gpu_layer.c b/drivers/video/gpu_layer.c new file mode 100644 index 0000000..36e7037 --- /dev/null +++ b/drivers/video/gpu_layer.c @@ -0,0 +1,393 @@ +/* + * drivers/video/gpu_layer.c + * + * (C) Copyright Dave Airlie 2006 + * + */ +#include <linux/device.h> +#include <linux/list.h> +#include <linux/mutex.h> +#include <linux/pci.h> +#include <linux/gpu_layer.h> + +/* GPUs we manage */ +LIST_HEAD(gpu_bus_list); + +/* used when allocating bus numbers */ +#define GPU_MAXBUS 16 +struct gpu_busmap { + unsigned long busmap [GPU_MAXBUS / (8*sizeof (unsigned long))]; +}; +static struct gpu_busmap busmap; + +/* used when updating list of gpus */ +DEFINE_MUTEX(gpu_bus_list_lock); + + +/** + * gpu_bus_pci_match - Match a device using a PCI GPU + * + * Call the PCI match function using the generic identifier pointer to a PCI ID list. + */ +void *gpu_bus_pci_match(struct gpu_device *dev, struct gpu_driver *drv) +{ + struct pci_dev *pdev = to_pci_dev(dev->bus->gpu); + const struct pci_device_id *ids = (const struct pci_device_id *)drv->id_table, *match; + + match = pci_match_id(ids, pdev); + return (void *)match; +} +EXPORT_SYMBOL(gpu_bus_pci_match); + +/** + * gpu_bus_match - Match a sub driver against a sub device + * + * If the driver type matches thte device, call the bus match function. + */ +int gpu_bus_match(struct device *dev, struct device_driver *drv) +{ + struct gpu_device *gdev = to_gpu_device(dev); + struct gpu_driver *gdrv = to_gpu_driver(drv); + + if (gdrv->drv_type == gdev->devnum) { + if (gdev->bus->match) + if (gdev->bus->match(gdev, gdrv)) + return 1; + } + return 0; +} +EXPORT_SYMBOL(gpu_bus_match); + +/** + * gpu_uevent - empty so far + */ +static int gpu_uevent(struct device *dev, char **envp, int num_envp, + char *buffer, int buffer_size) +{ + if (!dev) + return -ENODEV; + + return 0; + +} + +/* Forward references */ +static int gpu_suspend(struct device *dev, pm_message_t message); +static int gpu_resume(struct device *dev); + +/* GPU bus structure */ +struct bus_type gpu_bus_type = { + .name = "gpu", + .match = gpu_bus_match, + .uevent = gpu_uevent, + .suspend = gpu_suspend, + .resume = gpu_resume, +}; +EXPORT_SYMBOL(gpu_bus_type); + +/** + * gpu_init - GPU subsystem initialise + * + * Register the GPU bus type + */ +static int __init gpu_init(void) +{ + int retval; + + retval = bus_register(&gpu_bus_type); + + return retval; + +} + +/** + * gpu_exit - GPU subsystem cleanup + * + * Unregister the bus + */ +static void __exit gpu_exit(void) +{ + bus_unregister(&gpu_bus_type); +} + +/** + * gpu_bus_get - Reference count bus driver + */ +struct gpu_bus *gpu_bus_get(struct gpu_bus *bus) +{ + if (bus) + kref_get(&bus->kref); + return bus; +} + +/** + * gpu_bus_release - Call bus release method + */ +static void gpu_bus_release(struct kref *kref) +{ + struct gpu_bus *bus = container_of(kref, struct gpu_bus, kref); + + if (bus->release) + bus->release(bus); +} + +/* + * gpu_bus_put - dereference count bus driver + */ +void gpu_bus_put(struct gpu_bus *bus) +{ + if (bus) + kref_put(&bus->kref, gpu_bus_release); +} + +/** + * gpu_bus_init - init a bus structure + */ +void gpu_bus_init(struct gpu_bus *bus) +{ + bus->busnum = -1; + INIT_LIST_HEAD(&bus->bus_list); + + kref_init(&bus->kref); +} +EXPORT_SYMBOL(gpu_bus_init); + +/** + * gpu_register_bus + * + * This registers a GPU bus with the GPU layer, + * it fills in a default bus match function, and adds the device to the list + */ +int gpu_register_bus(struct gpu_bus *bus) +{ + int busnum; + + mutex_lock(&gpu_bus_list_lock); + + busnum = find_next_zero_bit(busmap.busmap, GPU_MAXBUS, 1); + if (busnum < GPU_MAXBUS) { + set_bit(busnum, busmap.busmap); + bus->busnum = busnum; + } else { + printk(KERN_ERR "%s: to many buses\n", "gpu"); + mutex_unlock(&gpu_bus_list_lock); + return -E2BIG; + } + + if (!bus->match) + if (bus->card_type==GPU_PCI) + bus->match = gpu_bus_pci_match; + + list_add(&bus->bus_list, &gpu_bus_list); + mutex_unlock(&gpu_bus_list_lock); + + return 0; +} +EXPORT_SYMBOL(gpu_register_bus); + +/** + * gpu_deregister_bus + * + * Deregister the bus driver from GPU list + */ +void gpu_unregister_bus(struct gpu_bus *bus) +{ + mutex_lock(&gpu_bus_list_lock); + list_del(&bus->bus_list); + mutex_unlock(&gpu_bus_list_lock); + + clear_bit(bus->busnum, busmap.busmap); +} +EXPORT_SYMBOL(gpu_unregister_bus); + +/** + * gpu_alloc_devices + * + * Allocate and initialise the GPU sub-devices. + */ +int gpu_alloc_devices(struct gpu_bus *bus) +{ + struct gpu_device *dev; + int i; + + for (i=0; i<bus->num_subdev; i++) { + dev = kzalloc(sizeof(*dev), GFP_KERNEL); + if (!dev) + return -ENOMEM; + + bus = gpu_bus_get(bus); + if (!bus) { + kfree(dev); + return -ENOMEM; + } + + device_initialize(&dev->dev); + dev->dev.bus = &gpu_bus_type; + dev->dev.parent = bus->gpu; + dev->card_type = bus->card_type; + sprintf(&dev->dev.bus_id[0], "%s:%d", bus->bus_name, i); + dev->bus = bus; + dev->devnum = i; + + bus->devices[i] = dev; + + } + return 0; +} +EXPORT_SYMBOL(gpu_alloc_devices); + +/** + * gpu_register_devices + * + * Add the gpu sub-devices to the device tree + */ +int gpu_register_devices(struct gpu_bus *bus) +{ + int retval; + int i; + + for (i = 0; i < bus->num_subdev; i++) { + struct gpu_device *gpu_dev = bus->devices[i]; + + retval = device_add(&gpu_dev->dev); + if (retval) { + dev_err(&gpu_dev->dev, "can't device_add, error %d\n", retval); + goto fail; + } + + } + +fail: + return retval; +} +EXPORT_SYMBOL(gpu_register_devices); + +/** + * gpu_unregister_devices + */ +int gpu_unregister_devices(struct gpu_bus *bus) +{ + int i; + + for (i = 0; i < bus->num_subdev; i++) { + struct gpu_device *gpu_dev = bus->devices[i]; + + device_del(&gpu_dev->dev); + + kfree(gpu_dev); + bus->devices[i] = NULL; + } + return 0; +} +EXPORT_SYMBOL(gpu_unregister_devices); + +/** + * gpu_probe + * + * Do a gpu bus probe - probe for GPU sub devices + */ +static int gpu_probe(struct device *dev) +{ + struct gpu_device *gdev = to_gpu_device(dev); + struct gpu_driver *gdrv; + int retval; + void *driver_id; + + gdrv = to_gpu_driver(dev->driver); + + /* call the bus matching function to get an identifier */ + driver_id = gdev->bus->match(gdev, gdrv); + if (driver_id == NULL) + return -EINVAL; + + /* call the driver probe function */ + + retval = gdrv->probe(gdev, driver_id); + + printk("gpu probe called %d - %d\n", gdev->devnum, retval); + return retval; +} + +/** + * gpu_remove + * + * Call the GPU remove sub device + */ +static int gpu_remove(struct device *dev) +{ + struct gpu_device *gdev = to_gpu_device(dev); + struct gpu_driver *gdrv; + + gdrv = to_gpu_driver(dev->driver); + + if (gdrv && gdrv->remove) + gdrv->remove(gdev); + + return 0; +} + +/** + * gpu_suspend + * + * Suspend the devices on the GPU bus + */ +static int gpu_suspend(struct device *dev, pm_message_t state) +{ + struct gpu_driver *gdrv = to_gpu_driver(dev->driver); + + if (gdrv && gdrv->driver.suspend) + return gdrv->driver.suspend(dev, state); + + return 0; +} + +/** + * gpu_resume + * + * Resume the devices on the GPU bus + */ +static int gpu_resume(struct device *dev) +{ + struct gpu_driver *gdrv = to_gpu_driver(dev->driver); + + if (gdrv && gdrv->driver.resume) + return gdrv->driver.resume(dev); + + return 0; +} + +/** + * gpu_register_driver + * + * Register a GPU driver and fill in its common structure members + */ +int gpu_register_driver(struct gpu_driver *new_driver, struct module *owner) +{ + int retval; + + new_driver->driver.bus = &gpu_bus_type; + new_driver->driver.name = (char *)new_driver->name; + new_driver->driver.probe = gpu_probe; + new_driver->driver.remove = gpu_remove; + new_driver->driver.owner = owner; + + retval = driver_register(&new_driver->driver); + + return retval; +} +EXPORT_SYMBOL(gpu_register_driver); + +/** + * gpu_unregister_driver + * + * Call the driver unregister + */ +void gpu_unregister_driver(struct gpu_driver *driver) +{ + driver_unregister(&driver->driver); +} +EXPORT_SYMBOL(gpu_unregister_driver); + +subsys_initcall(gpu_init); +module_exit(gpu_exit); + diff --git a/include/linux/gpu_layer.h b/include/linux/gpu_layer.h new file mode 100644 index 0000000..3ae6076 --- /dev/null +++ b/include/linux/gpu_layer.h @@ -0,0 +1,120 @@ +/* + * include/linux/gpu_layer.h + * + * Author : Dave Airlie <airlied@linux.ie> + * Copyright (C) 2006 David Airlie + * + */ + +#ifndef _LINUX_GPU_LAYER_H +#define _LINUX_GPU_LAYER_H + +/* GPU subdevices - 0 is the root hub equivalent */ +#define GPU_LL 0 +#define GPU_FB 1 +#define GPU_DRM 2 +#define GPU_LAST (GPU_DRM+1) + +/* GPU device type - PCI only supported so far */ +#define GPU_PCI 1 +#define GPU_USB 2 + +struct gpu_bus; +struct gpu_driver; + +/* + * The gpu_device structure is used to describe GPU devices + */ +struct gpu_device { + int devnum; /* subdevice number */ + int card_type; /* type of card - PCI, USB etc. */ + struct device dev; /* Generic device interface */ + struct gpu_bus *bus; /* pointer to gpu bus this driver is on */ +}; +#define to_gpu_device(d) container_of(d, struct gpu_device, dev) + +/* + * This structure stores the GPU virtual bus description. + */ +struct gpu_bus { + struct device *gpu; /* pointer to the GPU itself device */ + int num_subdev; /* number of subdevices on this bus */ + + int card_type; /* type of card this bus is running on */ + + int busnum; /* GPU bus number */ + char *bus_name; /* bus name */ + + void *gpu_priv; /* gpu private data */ + struct list_head bus_list; /* list of busses */ + + struct kref kref; /* kobject reference */ + + struct gpu_device *devices[GPU_LAST]; /* array of GPU subdevices */ + + void *(*match)(struct gpu_device *dev, struct gpu_driver *drv); /* match function */ + + void (*release)(struct gpu_bus *bus); /* bus release function */ +}; + +/* + * This structure stores the GPU driver information + */ +struct gpu_driver { + struct device_driver driver; /* embedded driver structure */ + + /* use a full PCI device table */ + const void *id_table; /* generic pointer to an ID table - PCI or USB */ + + int drv_type; /* driver sub-driver type - LL/DRM/FB */ + int card_type; /* card type PCI/USB */ + char *name; /* driver name */ + + /* match function */ + int (*probe)(struct gpu_device *dev, void *driver_id); /* probe function */ + void (*remove)(struct gpu_device *dev); /* remove function */ + +}; +#define to_gpu_driver(d) container_of(d, struct gpu_driver, driver) + +/* + * GPU Information + */ +struct gpu_info { + + struct gpu_bus self; /* pointer to the bus on this device */ + + struct device *device; /* pointer to device */ +}; + +/* + * driver-specific data. They are really just a wrapper around + * the generic device structure functions of these calls. + */ +static inline void *gpu_get_drvdata(struct gpu_device *gdev) +{ + return dev_get_drvdata(&gdev->dev); +} + +static inline void gpu_set_drvdata(struct gpu_device *gdev, void *data) +{ + dev_set_drvdata(&gdev->dev, data); +} + +extern void gpu_bus_init(struct gpu_bus *bus); +extern int gpu_register_bus(struct gpu_bus *bus); +extern void gpu_unregister_bus(struct gpu_bus *bus); +extern int gpu_alloc_devices(struct gpu_bus *bus); +extern int gpu_register_devices(struct gpu_bus *bus); +extern struct mutex gpu_bus_list_lock; +extern struct bus_type gpu_bus_type; +extern int gpu_register_driver(struct gpu_driver *new_driver, struct module *owner); +extern void gpu_unregister_driver(struct gpu_driver *driver); +extern int gpu_unregister_devices(struct gpu_bus *bus); + +static inline int gpu_register(struct gpu_driver *driver) +{ + return gpu_register_driver(driver, THIS_MODULE); +} + +#endif -- 1.4.1.ga3e6 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH] gpu/radeon: add a radeon lowlevel GPU driver (04/07) 2006-07-22 15:38 ` [PATCH] gpu: Initial GPU layer addition. (03/07) Dave Airlie @ 2006-07-22 15:38 ` Dave Airlie 2006-07-22 15:38 ` [PATCH] gpu/radeonfb: add GPU support to radeonfb (05/07) Dave Airlie 2006-07-22 19:54 ` [PATCH] gpu: Initial GPU layer addition. (03/07) Jesse Barnes ` (2 subsequent siblings) 3 siblings, 1 reply; 16+ messages in thread From: Dave Airlie @ 2006-07-22 15:38 UTC (permalink / raw) To: linux-kernel; +Cc: Dave Airlie This creates a lowlevel radeon driver which detects the card and sets up the GPU layer to use it. Signed-off-by: Dave Airlie <airlied@linux.ie> --- drivers/video/Kconfig | 5 + drivers/video/Makefile | 2 drivers/video/radeon_gpu.c | 343 ++++++++++++++++++++++++++++++++++++++++++++ include/linux/radeon_gpu.h | 92 ++++++++++++ 4 files changed, 442 insertions(+), 0 deletions(-) diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 8512aa8..6602752 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -8,6 +8,11 @@ config GPU bool default n +config GPU_RADEON + tristate "ATI Radeon gpu driver" + select GPU + default n + config FIRMWARE_EDID bool "Enable firmware EDID" default y diff --git a/drivers/video/Makefile b/drivers/video/Makefile index a882fdd..2650f02 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -6,6 +6,8 @@ # Each configuration option enables a li obj-$(CONFIG_GPU) += gpu_layer.o +obj-$(CONFIG_GPU_RADEON) += radeon_gpu.o + obj-$(CONFIG_FB) += fb.o fb-y := fbmem.o fbmon.o fbcmap.o fbsysfs.o \ modedb.o fbcvt.o diff --git a/drivers/video/radeon_gpu.c b/drivers/video/radeon_gpu.c new file mode 100644 index 0000000..2eecf3b --- /dev/null +++ b/drivers/video/radeon_gpu.c @@ -0,0 +1,343 @@ +/* + * drivers/video/radeon_gpu.c + * + * Copyright (C) 2006 Dave Airlie + * + * some of this code is derived from the radeon framebuffer code + * Copyright 2003 Ben. Herrenschmidt <benh@kernel.crashing.org> + * Copyright 2000 Ani Joshi <ajoshi@kernel.crashing.org> + */ +#include <linux/module.h> +#include <linux/moduleparam.h> +#include <linux/kernel.h> +#include <linux/errno.h> +#include <linux/pci.h> +#include <linux/device.h> + +#include <linux/gpu_layer.h> +#include <linux/radeon_gpu.h> + +#include <video/radeon.h> +#include "aty/ati_ids.h" + + +#define CHIP_DEF(id, family, flags) \ + { PCI_VENDOR_ID_ATI, id, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (flags) | (CHIP_FAMILY_##family) } + +static struct pci_device_id radeon_gpu_pci_table[] = { + /* Mobility M6 */ + CHIP_DEF(PCI_CHIP_RADEON_LY, RV100, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), + CHIP_DEF(PCI_CHIP_RADEON_LZ, RV100, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), + /* Radeon VE/7000 */ + CHIP_DEF(PCI_CHIP_RV100_QY, RV100, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_RV100_QZ, RV100, CHIP_HAS_CRTC2), + /* Radeon IGP320M (U1) */ + CHIP_DEF(PCI_CHIP_RS100_4336, RS100, CHIP_HAS_CRTC2 | CHIP_IS_IGP | CHIP_IS_MOBILITY), + /* Radeon IGP320 (A3) */ + CHIP_DEF(PCI_CHIP_RS100_4136, RS100, CHIP_HAS_CRTC2 | CHIP_IS_IGP), + /* IGP330M/340M/350M (U2) */ + CHIP_DEF(PCI_CHIP_RS200_4337, RS200, CHIP_HAS_CRTC2 | CHIP_IS_IGP | CHIP_IS_MOBILITY), + /* IGP330/340/350 (A4) */ + CHIP_DEF(PCI_CHIP_RS200_4137, RS200, CHIP_HAS_CRTC2 | CHIP_IS_IGP), + /* Mobility 7000 IGP */ + CHIP_DEF(PCI_CHIP_RS250_4437, RS200, CHIP_HAS_CRTC2 | CHIP_IS_IGP | CHIP_IS_MOBILITY), + /* 7000 IGP (A4+) */ + CHIP_DEF(PCI_CHIP_RS250_4237, RS200, CHIP_HAS_CRTC2 | CHIP_IS_IGP), + /* 8500 AIW */ + CHIP_DEF(PCI_CHIP_R200_BB, R200, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_R200_BC, R200, CHIP_HAS_CRTC2), + /* 8700/8800 */ + CHIP_DEF(PCI_CHIP_R200_QH, R200, CHIP_HAS_CRTC2), + /* 8500 */ + CHIP_DEF(PCI_CHIP_R200_QL, R200, CHIP_HAS_CRTC2), + /* 9100 */ + CHIP_DEF(PCI_CHIP_R200_QM, R200, CHIP_HAS_CRTC2), + /* Mobility M7 */ + CHIP_DEF(PCI_CHIP_RADEON_LW, RV200, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), + CHIP_DEF(PCI_CHIP_RADEON_LX, RV200, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), + /* 7500 */ + CHIP_DEF(PCI_CHIP_RV200_QW, RV200, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_RV200_QX, RV200, CHIP_HAS_CRTC2), + /* Mobility M9 */ + CHIP_DEF(PCI_CHIP_RV250_Ld, RV250, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), + CHIP_DEF(PCI_CHIP_RV250_Le, RV250, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), + CHIP_DEF(PCI_CHIP_RV250_Lf, RV250, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), + CHIP_DEF(PCI_CHIP_RV250_Lg, RV250, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), + /* 9000/Pro */ + CHIP_DEF(PCI_CHIP_RV250_If, RV250, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_RV250_Ig, RV250, CHIP_HAS_CRTC2), + /* Mobility 9100 IGP (U3) */ + CHIP_DEF(PCI_CHIP_RS300_5835, RS300, CHIP_HAS_CRTC2 | CHIP_IS_IGP | CHIP_IS_MOBILITY), + CHIP_DEF(PCI_CHIP_RS350_7835, RS300, CHIP_HAS_CRTC2 | CHIP_IS_IGP | CHIP_IS_MOBILITY), + /* 9100 IGP (A5) */ + CHIP_DEF(PCI_CHIP_RS300_5834, RS300, CHIP_HAS_CRTC2 | CHIP_IS_IGP), + CHIP_DEF(PCI_CHIP_RS350_7834, RS300, CHIP_HAS_CRTC2 | CHIP_IS_IGP), + /* Mobility 9200 (M9+) */ + CHIP_DEF(PCI_CHIP_RV280_5C61, RV280, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), + CHIP_DEF(PCI_CHIP_RV280_5C63, RV280, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), + /* 9200 */ + CHIP_DEF(PCI_CHIP_RV280_5960, RV280, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_RV280_5961, RV280, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_RV280_5962, RV280, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_RV280_5964, RV280, CHIP_HAS_CRTC2), + /* 9500 */ + CHIP_DEF(PCI_CHIP_R300_AD, R300, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_R300_AE, R300, CHIP_HAS_CRTC2), + /* 9600TX / FireGL Z1 */ + CHIP_DEF(PCI_CHIP_R300_AF, R300, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_R300_AG, R300, CHIP_HAS_CRTC2), + /* 9700/9500/Pro/FireGL X1 */ + CHIP_DEF(PCI_CHIP_R300_ND, R300, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_R300_NE, R300, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_R300_NF, R300, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_R300_NG, R300, CHIP_HAS_CRTC2), + /* Mobility M10/M11 */ + CHIP_DEF(PCI_CHIP_RV350_NP, RV350, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), + CHIP_DEF(PCI_CHIP_RV350_NQ, RV350, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), + CHIP_DEF(PCI_CHIP_RV350_NR, RV350, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), + CHIP_DEF(PCI_CHIP_RV350_NS, RV350, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), + CHIP_DEF(PCI_CHIP_RV350_NT, RV350, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), + CHIP_DEF(PCI_CHIP_RV350_NV, RV350, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), + /* 9600/FireGL T2 */ + CHIP_DEF(PCI_CHIP_RV350_AP, RV350, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_RV350_AQ, RV350, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_RV360_AR, RV350, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_RV350_AS, RV350, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_RV350_AT, RV350, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_RV350_AV, RV350, CHIP_HAS_CRTC2), + /* 9800/Pro/FileGL X2 */ + CHIP_DEF(PCI_CHIP_R350_AH, R350, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_R350_AI, R350, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_R350_AJ, R350, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_R350_AK, R350, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_R350_NH, R350, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_R350_NI, R350, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_R360_NJ, R350, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_R350_NK, R350, CHIP_HAS_CRTC2), + /* Newer stuff */ + CHIP_DEF(PCI_CHIP_RV380_3E50, RV380, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_RV380_3E54, RV380, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_RV380_3150, RV380, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), + CHIP_DEF(PCI_CHIP_RV380_3154, RV380, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), + CHIP_DEF(PCI_CHIP_RV370_5B60, RV380, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_RV370_5B62, RV380, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_RV370_5B64, RV380, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_RV370_5B65, RV380, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_RV370_5460, RV380, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), + CHIP_DEF(PCI_CHIP_RV370_5464, RV380, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), + CHIP_DEF(PCI_CHIP_R420_JH, R420, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_R420_JI, R420, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_R420_JJ, R420, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_R420_JK, R420, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_R420_JL, R420, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_R420_JM, R420, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_R420_JN, R420, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), + CHIP_DEF(PCI_CHIP_R420_JP, R420, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_R423_UH, R420, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_R423_UI, R420, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_R423_UJ, R420, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_R423_UK, R420, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_R423_UQ, R420, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_R423_UR, R420, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_R423_UT, R420, CHIP_HAS_CRTC2), + CHIP_DEF(PCI_CHIP_R423_5D57, R420, CHIP_HAS_CRTC2), + /* Original Radeon/7200 */ + CHIP_DEF(PCI_CHIP_RADEON_QD, RADEON, 0), + CHIP_DEF(PCI_CHIP_RADEON_QE, RADEON, 0), + CHIP_DEF(PCI_CHIP_RADEON_QF, RADEON, 0), + CHIP_DEF(PCI_CHIP_RADEON_QG, RADEON, 0), + { 0, } +}; +MODULE_DEVICE_TABLE(pci, radeon_gpu_pci_table); + +MODULE_AUTHOR("Dave Airlie"); +MODULE_DESCRIPTION("GPU layer driver for Radeon Chipset"); +MODULE_LICENSE("GPL"); + +struct gpu_driver radeon_lowlevel_driver = { + .name = "radeon_gpu", + .card_type = GPU_PCI, + .drv_type = GPU_LL, +}; + +/** + * radeon_gpu_pci_probe + */ +int radeon_gpu_pci_probe(struct pci_dev *dev, const struct pci_device_id *ent) +{ + struct radeon_gpu_info *rinfo; + int ret; + + if (pci_enable_device(dev) < 0) + return -EINVAL; + + rinfo = kzalloc(sizeof(*rinfo), GFP_KERNEL); + if (!rinfo) { + dev_dbg(dev->dev, "radeon info alloc failed\n"); + return -ENOMEM; + } + dev_set_drvdata(&dev->dev, rinfo); + + rinfo->family = ent->driver_data & CHIP_FAMILY_MASK; + rinfo->chipset = dev->device; + rinfo->has_CRTC2 = (ent->driver_data & CHIP_HAS_CRTC2) != 0; + rinfo->is_mobility = (ent->driver_data & CHIP_IS_MOBILITY) != 0; + rinfo->is_IGP = (ent->driver_data & CHIP_IS_IGP) != 0; + + /* Set base addrs */ + rinfo->fb_base_phys = pci_resource_start(dev, 0); + rinfo->mmio_base_phys = pci_resource_start(dev, 2); + + rinfo->ati_name[0] = ent->device >> 8; + rinfo->ati_name[1] = ent->device & 0xff; + + rinfo->pdev = dev; + /* + * Check for errata + */ + rinfo->errata = 0; + + if (rinfo->family == CHIP_FAMILY_RV200 || + rinfo->family == CHIP_FAMILY_RS200) + rinfo->errata |= CHIP_ERRATA_PLL_DUMMYREADS; + + if (rinfo->family == CHIP_FAMILY_RV100 || + rinfo->family == CHIP_FAMILY_RS100 || + rinfo->family == CHIP_FAMILY_RS200) + rinfo->errata |= CHIP_ERRATA_PLL_DELAY; + + gpu_bus_init(&rinfo->info.self); + rinfo->info.self.bus_name = pci_name(dev); + rinfo->info.self.gpu = &dev->dev; + rinfo->info.self.card_type = GPU_PCI; + rinfo->info.self.num_subdev = GPU_LAST; + + if ((ret = gpu_register_bus(&rinfo->info.self)) < 0) + goto err_register_bus; + + if ((ret = gpu_alloc_devices(&rinfo->info.self)) < 0) { + dev_err(rinfo->info.self.gpu, "unable to alloc lowlayer device\n"); + ret = -ENOMEM; + goto err_allocate_low_layer; + } + + /* the first device driver is always the lowlevel driver */ + rinfo->info.self.devices[0]->dev.driver = &radeon_lowlevel_driver.driver; + + ret = gpu_register_devices(&rinfo->info.self); + + return ret; + +err_allocate_low_layer: + gpu_unregister_bus(&rinfo->info.self); +err_register_bus: + dev_set_drvdata(&dev->dev, NULL); + kfree(rinfo); + return ret; +} + +/** + * radeon_gpu_pci_remove + */ +void radeon_gpu_pci_remove(struct pci_dev *dev) +{ + struct radeon_gpu_info *rinfo; + + rinfo = dev_get_drvdata(&dev->dev); + + gpu_unregister_devices(&rinfo->info.self); + + gpu_unregister_bus(&rinfo->info.self); + dev_set_drvdata(&dev->dev, NULL); + + kfree(rinfo); +} + +/** + * radeon_gpu_pci_suspend + * + * These are null methods so + * we don't get defaults, + * do not use them use the lowlevel driver + */ +int radeon_gpu_pci_suspend(struct pci_dev *dev, pm_message_t message) +{ + return 0; +} + +/** + * radeon_gpu_pci_resume + * + * These are null methods so + * we don't get defaults, + * do not use them use the lowlevel driver + */ +int radeon_gpu_pci_resume(struct pci_dev *dev) +{ + return 0; +} + +static struct pci_driver radeon_gpu_driver = { + .name = "radeon_gpu", + .id_table = radeon_gpu_pci_table, + .probe = radeon_gpu_pci_probe, + .remove = __devexit_p(radeon_gpu_pci_remove), +#ifdef CONFIG_PM + .suspend = radeon_gpu_pci_suspend, + .resume = radeon_gpu_pci_resume, +#endif /* CONFIG_PM */ +}; + +/** + * radeon_gpu_register_driver + * + * This wraps the GPU register function + * It is needed so that loading a higher layer module + * will force this module to load. + */ +int radeon_gpu_register_driver(struct gpu_driver *new_driver, struct module *owner) +{ + return gpu_register_driver(new_driver, owner); +} +EXPORT_SYMBOL(radeon_gpu_register_driver); + +/** + * radeon_gpu_unregister_driver + */ +void radeon_gpu_unregister_driver(struct gpu_driver *driver) +{ + gpu_unregister_driver(driver); +} +EXPORT_SYMBOL(radeon_gpu_unregister_driver); + +/** + * radeon_gpu_init + * + * Register the GPU driver and PCI driver + */ +static int __init radeon_gpu_init(void) +{ + int retval; + + retval = gpu_register(&radeon_lowlevel_driver); + if (retval) + return retval; + + return pci_register_driver (&radeon_gpu_driver); +} + +/** + * radeon_gpu_exit + * + * Unregister the drivers. + */ +static void __exit radeon_gpu_exit(void) +{ + pci_unregister_driver (&radeon_gpu_driver); + + gpu_unregister_driver(&radeon_lowlevel_driver); + +} + +module_init(radeon_gpu_init); +module_exit(radeon_gpu_exit); diff --git a/include/linux/radeon_gpu.h b/include/linux/radeon_gpu.h new file mode 100644 index 0000000..defea65 --- /dev/null +++ b/include/linux/radeon_gpu.h @@ -0,0 +1,92 @@ +/* + * include/linux/radeon_gpu.h + */ +#ifndef _LINUX_RADEON_GPU_H +#define _LINUX_RADEON_GPU_H + +/* + * Chip families. Must fit in the low 16 bits of a long word + */ +enum radeon_family { + CHIP_FAMILY_UNKNOW, + CHIP_FAMILY_LEGACY, + CHIP_FAMILY_RADEON, + CHIP_FAMILY_RV100, + CHIP_FAMILY_RS100, /* U1 (IGP320M) or A3 (IGP320)*/ + CHIP_FAMILY_RV200, + CHIP_FAMILY_RS200, /* U2 (IGP330M/340M/350M) or A4 (IGP330/340/345/350), + RS250 (IGP 7000) */ + CHIP_FAMILY_R200, + CHIP_FAMILY_RV250, + CHIP_FAMILY_RS300, /* Radeon 9000 IGP */ + CHIP_FAMILY_RV280, + CHIP_FAMILY_R300, + CHIP_FAMILY_R350, + CHIP_FAMILY_RV350, + CHIP_FAMILY_RV380, /* RV370/RV380/M22/M24 */ + CHIP_FAMILY_R420, /* R420/R423/M18 */ + CHIP_FAMILY_LAST, +}; + + +/* + * Chip flags + */ +enum radeon_chip_flags { + CHIP_FAMILY_MASK = 0x0000ffffUL, + CHIP_FLAGS_MASK = 0xffff0000UL, + CHIP_IS_MOBILITY = 0x00010000UL, + CHIP_IS_IGP = 0x00020000UL, + CHIP_HAS_CRTC2 = 0x00040000UL, +}; + +/* + * Errata workarounds + */ +enum radeon_errata { + CHIP_ERRATA_R300_CG = 0x00000001, + CHIP_ERRATA_PLL_DUMMYREADS = 0x00000002, + CHIP_ERRATA_PLL_DELAY = 0x00000004, +}; + +#define IS_RV100_VARIANT(rinfo) (((rinfo)->family == CHIP_FAMILY_RV100) || \ + ((rinfo)->family == CHIP_FAMILY_RV200) || \ + ((rinfo)->family == CHIP_FAMILY_RS100) || \ + ((rinfo)->family == CHIP_FAMILY_RS200) || \ + ((rinfo)->family == CHIP_FAMILY_RV250) || \ + ((rinfo)->family == CHIP_FAMILY_RV280) || \ + ((rinfo)->family == CHIP_FAMILY_RS300)) + + +#define IS_R300_VARIANT(rinfo) (((rinfo)->family == CHIP_FAMILY_R300) || \ + ((rinfo)->family == CHIP_FAMILY_RV350) || \ + ((rinfo)->family == CHIP_FAMILY_R350) || \ + ((rinfo)->family == CHIP_FAMILY_RV380) || \ + ((rinfo)->family == CHIP_FAMILY_R420)) + + + +struct radeon_gpu_info { + struct gpu_info info; + + struct pci_dev *pdev; + + int chipset; + u8 family; + u8 rev; + unsigned int errata; + + unsigned long mmio_base_phys; + unsigned long fb_base_phys; + + int has_CRTC2; + int is_mobility; + int is_IGP; + + char ati_name[2]; + +}; + +extern int radeon_gpu_register_driver(struct gpu_driver *new_driver, struct module *owner); +extern void radeon_gpu_unregister_driver(struct gpu_driver *driver); +#endif -- 1.4.1.ga3e6 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH] gpu/radeonfb: add GPU support to radeonfb (05/07) 2006-07-22 15:38 ` [PATCH] gpu/radeon: add a radeon lowlevel GPU driver (04/07) Dave Airlie @ 2006-07-22 15:38 ` Dave Airlie 2006-07-22 15:38 ` [PATCH] gpu/drm: Add GPU layer support to generic DRM (06/07) Dave Airlie 0 siblings, 1 reply; 16+ messages in thread From: Dave Airlie @ 2006-07-22 15:38 UTC (permalink / raw) To: linux-kernel; +Cc: Dave Airlie This patch adds support to the radeonfb driver to use the new GPU layer to driver the radeon. Signed-off-by: Dave Airlie <airlied@linux.ie> --- drivers/video/Kconfig | 1 drivers/video/aty/radeon_accel.c | 18 +-- drivers/video/aty/radeon_base.c | 257 +++++++++++++++++------------------- drivers/video/aty/radeon_i2c.c | 12 +- drivers/video/aty/radeon_monitor.c | 12 +- drivers/video/aty/radeon_pm.c | 137 ++++++++++--------- drivers/video/aty/radeonfb.h | 84 +----------- 7 files changed, 224 insertions(+), 297 deletions(-) diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 6602752..9872ab5 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -1003,6 +1003,7 @@ config FB_MATROX_MULTIHEAD config FB_RADEON tristate "ATI Radeon display support" depends on FB && PCI + select GPU_RADEON select I2C_ALGOBIT if FB_RADEON_I2C select I2C if FB_RADEON_I2C select FB_MODE_HELPERS diff --git a/drivers/video/aty/radeon_accel.c b/drivers/video/aty/radeon_accel.c index 3ca27cb..b0413d3 100644 --- a/drivers/video/aty/radeon_accel.c +++ b/drivers/video/aty/radeon_accel.c @@ -203,9 +203,9 @@ void radeonfb_engine_reset(struct radeon host_path_cntl = INREG(HOST_PATH_CNTL); rbbm_soft_reset = INREG(RBBM_SOFT_RESET); - if (rinfo->family == CHIP_FAMILY_R300 || - rinfo->family == CHIP_FAMILY_R350 || - rinfo->family == CHIP_FAMILY_RV350) { + if (rinfo->gpu_info->family == CHIP_FAMILY_R300 || + rinfo->gpu_info->family == CHIP_FAMILY_R350 || + rinfo->gpu_info->family == CHIP_FAMILY_RV350) { u32 tmp; OUTREG(RBBM_SOFT_RESET, (rbbm_soft_reset | @@ -241,9 +241,9 @@ void radeonfb_engine_reset(struct radeon INREG(HOST_PATH_CNTL); OUTREG(HOST_PATH_CNTL, host_path_cntl); - if (rinfo->family != CHIP_FAMILY_R300 || - rinfo->family != CHIP_FAMILY_R350 || - rinfo->family != CHIP_FAMILY_RV350) + if (rinfo->gpu_info->family != CHIP_FAMILY_R300 || + rinfo->gpu_info->family != CHIP_FAMILY_R350 || + rinfo->gpu_info->family != CHIP_FAMILY_RV350) OUTREG(RBBM_SOFT_RESET, rbbm_soft_reset); OUTREG(CLOCK_CNTL_INDEX, clock_cntl_index); @@ -260,9 +260,9 @@ void radeonfb_engine_init (struct radeon radeonfb_engine_reset(rinfo); radeon_fifo_wait (1); - if ((rinfo->family != CHIP_FAMILY_R300) && - (rinfo->family != CHIP_FAMILY_R350) && - (rinfo->family != CHIP_FAMILY_RV350)) + if ((rinfo->gpu_info->family != CHIP_FAMILY_R300) && + (rinfo->gpu_info->family != CHIP_FAMILY_R350) && + (rinfo->gpu_info->family != CHIP_FAMILY_RV350)) OUTREG(RB2D_DSTCACHE_MODE, 0); radeon_fifo_wait (3); diff --git a/drivers/video/aty/radeon_base.c b/drivers/video/aty/radeon_base.c index 8d85fc5..2521148 100644 --- a/drivers/video/aty/radeon_base.c +++ b/drivers/video/aty/radeon_base.c @@ -68,6 +68,9 @@ #include <linux/pci.h> #include <linux/vmalloc.h> #include <linux/device.h> +#include <linux/gpu_layer.h> +#include <linux/radeon_gpu.h> + #include <asm/io.h> #include <asm/uaccess.h> @@ -224,7 +227,7 @@ static struct pci_device_id radeonfb_pci CHIP_DEF(PCI_CHIP_RADEON_QG, RADEON, 0), { 0, } }; -MODULE_DEVICE_TABLE(pci, radeonfb_pci_table); +MODULE_DEVICE_TABLE(gpu, radeonfb_pci_table); typedef struct { @@ -301,7 +304,7 @@ static int __devinit radeon_map_ROM(stru rom = pci_map_rom(dev, &rom_size); if (!rom) { printk(KERN_ERR "radeonfb (%s): ROM failed to map\n", - pci_name(rinfo->pdev)); + pci_name(rinfo->gpu_info->pdev)); return -ENOMEM; } @@ -311,7 +314,7 @@ static int __devinit radeon_map_ROM(stru if (BIOS_IN16(0) != 0xaa55) { printk(KERN_DEBUG "radeonfb (%s): Invalid ROM signature %x " "should be 0xaa55\n", - pci_name(rinfo->pdev), BIOS_IN16(0)); + pci_name(rinfo->gpu_info->pdev), BIOS_IN16(0)); goto failed; } /* Look for the PCI data to check the ROM type */ @@ -343,7 +346,7 @@ static int __devinit radeon_map_ROM(stru */ if (BIOS_IN32(dptr) != (('R' << 24) | ('I' << 16) | ('C' << 8) | 'P')) { printk(KERN_WARNING "radeonfb (%s): PCI DATA signature in ROM" - "incorrect: %08x\n", pci_name(rinfo->pdev), BIOS_IN32(dptr)); + "incorrect: %08x\n", pci_name(rinfo->gpu_info->pdev), BIOS_IN32(dptr)); goto anyway; } rom_type = BIOS_IN8(dptr + 0x14); @@ -583,7 +586,7 @@ static void __devinit radeon_get_pllinfo * incomplete, however. It does provide ppll_max and _min values * even for most other methods, however. */ - switch (rinfo->chipset) { + switch (rinfo->gpu_info->chipset) { case PCI_DEVICE_ID_ATI_RADEON_QW: case PCI_DEVICE_ID_ATI_RADEON_QX: rinfo->pll.ppll_max = 35000; @@ -859,7 +862,7 @@ static int radeonfb_ioctl (struct fb_inf * routing to second output */ case FBIO_RADEON_SET_MIRROR: - if (!rinfo->is_mobility) + if (!rinfo->gpu_info->is_mobility) return -EINVAL; rc = get_user(value, (__u32 __user *)arg); @@ -896,7 +899,7 @@ static int radeonfb_ioctl (struct fb_inf return 0; case FBIO_RADEON_GET_MIRROR: - if (!rinfo->is_mobility) + if (!rinfo->gpu_info->is_mobility) return -EINVAL; tmp = INREG(LVDS_GEN_CNTL); @@ -1000,7 +1003,7 @@ int radeon_screen_blank(struct radeonfb_ * RADEON_PIXCLK_LVDS_ALWAYS_ON bit is off */ tmp_pix_clks = INPLL(PIXCLKS_CNTL); - if (rinfo->is_mobility || rinfo->is_IGP) + if (rinfo->gpu_info->is_mobility || rinfo->gpu_info->is_IGP) OUTPLLP(PIXCLKS_CNTL, 0, ~PIXCLK_LVDS_ALWAYS_ONb); val &= ~(LVDS_BL_MOD_EN); OUTREG(LVDS_GEN_CNTL, val); @@ -1014,7 +1017,7 @@ int radeon_screen_blank(struct radeonfb_ msecs_to_jiffies(rinfo->panel_info.pwr_delay)); rinfo->init_state.lvds_gen_cntl &= ~LVDS_STATE_MASK; rinfo->init_state.lvds_gen_cntl |= val & LVDS_STATE_MASK; - if (rinfo->is_mobility || rinfo->is_IGP) + if (rinfo->gpu_info->is_mobility || rinfo->gpu_info->is_IGP) OUTPLL(PIXCLKS_CNTL, tmp_pix_clks); } break; @@ -1119,14 +1122,14 @@ static int radeonfb_setcolreg (unsigned int rc; if (!rinfo->asleep) { - if (rinfo->is_mobility) { + if (rinfo->gpu_info->is_mobility) { vclk_cntl = INPLL(VCLK_ECP_CNTL); OUTPLL(VCLK_ECP_CNTL, vclk_cntl & ~PIXCLK_DAC_ALWAYS_ONb); } /* Make sure we are on first palette */ - if (rinfo->has_CRTC2) { + if (rinfo->gpu_info->has_CRTC2) { dac_cntl2 = INREG(DAC_CNTL2); dac_cntl2 &= ~DAC2_PALETTE_ACCESS_CNTL; OUTREG(DAC_CNTL2, dac_cntl2); @@ -1135,7 +1138,7 @@ static int radeonfb_setcolreg (unsigned rc = radeon_setcolreg (regno, red, green, blue, transp, rinfo); - if (!rinfo->asleep && rinfo->is_mobility) + if (!rinfo->asleep && rinfo->gpu_info->is_mobility) OUTPLL(VCLK_ECP_CNTL, vclk_cntl); return rc; @@ -1149,14 +1152,14 @@ static int radeonfb_setcmap(struct fb_cm int i, start, rc = 0; if (!rinfo->asleep) { - if (rinfo->is_mobility) { + if (rinfo->gpu_info->is_mobility) { vclk_cntl = INPLL(VCLK_ECP_CNTL); OUTPLL(VCLK_ECP_CNTL, vclk_cntl & ~PIXCLK_DAC_ALWAYS_ONb); } /* Make sure we are on first palette */ - if (rinfo->has_CRTC2) { + if (rinfo->gpu_info->has_CRTC2) { dac_cntl2 = INREG(DAC_CNTL2); dac_cntl2 &= ~DAC2_PALETTE_ACCESS_CNTL; OUTREG(DAC_CNTL2, dac_cntl2); @@ -1183,7 +1186,7 @@ static int radeonfb_setcmap(struct fb_cm break; } - if (!rinfo->asleep && rinfo->is_mobility) + if (!rinfo->asleep && rinfo->gpu_info->is_mobility) OUTPLL(VCLK_ECP_CNTL, vclk_cntl); return rc; @@ -1233,7 +1236,7 @@ static void radeon_write_pll_regs(struct radeon_fifo_wait(20); /* Workaround from XFree */ - if (rinfo->is_mobility) { + if (rinfo->gpu_info->is_mobility) { /* A temporal workaround for the occational blanking on certain laptop * panels. This appears to related to the PLL divider registers * (fail to lock?). It occurs even when all dividers are the same @@ -1272,10 +1275,10 @@ static void radeon_write_pll_regs(struct radeon_pll_errata_after_data(rinfo); /* Set PPLL ref. div */ - if (rinfo->family == CHIP_FAMILY_R300 || - rinfo->family == CHIP_FAMILY_RS300 || - rinfo->family == CHIP_FAMILY_R350 || - rinfo->family == CHIP_FAMILY_RV350) { + if (rinfo->gpu_info->family == CHIP_FAMILY_R300 || + rinfo->gpu_info->family == CHIP_FAMILY_RS300 || + rinfo->gpu_info->family == CHIP_FAMILY_R350 || + rinfo->gpu_info->family == CHIP_FAMILY_RV350) { if (mode->ppll_ref_div & R300_PPLL_REF_DIV_ACC_MASK) { /* When restoring console mode, use saved PPLL_REF_DIV * setting. @@ -1435,7 +1438,7 @@ #if 1 * divider. I'll find a better fix once I have more infos on the * real cause of the problem. */ - while (rinfo->has_CRTC2) { + while (rinfo->gpu_info->has_CRTC2) { u32 fp2_gen_cntl = INREG(FP2_GEN_CNTL); u32 disp_output_cntl; int source; @@ -1446,10 +1449,10 @@ #if 1 /* Not all chip revs have the same format for this register, * extract the source selection */ - if (rinfo->family == CHIP_FAMILY_R200 || - rinfo->family == CHIP_FAMILY_R300 || - rinfo->family == CHIP_FAMILY_R350 || - rinfo->family == CHIP_FAMILY_RV350) { + if (rinfo->gpu_info->family == CHIP_FAMILY_R200 || + rinfo->gpu_info->family == CHIP_FAMILY_R300 || + rinfo->gpu_info->family == CHIP_FAMILY_R350 || + rinfo->gpu_info->family == CHIP_FAMILY_RV350) { source = (fp2_gen_cntl >> 10) & 0x3; /* sourced from transform unit, check for transform unit * own source @@ -1772,8 +1775,8 @@ #endif FP_CRTC_DONT_SHADOW_HEND | FP_PANEL_FORMAT); - if (IS_R300_VARIANT(rinfo) || - (rinfo->family == CHIP_FAMILY_R200)) { + if (IS_R300_VARIANT(rinfo->gpu_info) || + (rinfo->gpu_info->family == CHIP_FAMILY_R200)) { newmode->fp_gen_cntl &= ~R200_FP_SOURCE_SEL_MASK; if (use_rmx) newmode->fp_gen_cntl |= R200_FP_SOURCE_SEL_RMX; @@ -1795,8 +1798,8 @@ #endif newmode->fp_gen_cntl |= (FP_FPON | FP_TMDS_EN); newmode->tmds_transmitter_cntl &= ~(TMDS_PLLRST); /* TMDS_PLL_EN bit is reversed on RV (and mobility) chips */ - if (IS_R300_VARIANT(rinfo) || - (rinfo->family == CHIP_FAMILY_R200) || !rinfo->has_CRTC2) + if (IS_R300_VARIANT(rinfo->gpu_info) || + (rinfo->gpu_info->family == CHIP_FAMILY_R200) || !rinfo->gpu_info->has_CRTC2) newmode->tmds_transmitter_cntl &= ~TMDS_PLL_EN; else newmode->tmds_transmitter_cntl |= TMDS_PLL_EN; @@ -1873,7 +1876,7 @@ static int __devinit radeon_set_fbinfo ( info->screen_size = rinfo->mapped_vram; /* Fill fix common fields */ strlcpy(info->fix.id, rinfo->name, sizeof(info->fix.id)); - info->fix.smem_start = rinfo->fb_base_phys; + info->fix.smem_start = rinfo->gpu_info->fb_base_phys; info->fix.smem_len = rinfo->video_ram; info->fix.type = FB_TYPE_PACKED_PIXELS; info->fix.visual = FB_VISUAL_PSEUDOCOLOR; @@ -1881,7 +1884,7 @@ static int __devinit radeon_set_fbinfo ( info->fix.ypanstep = 1; info->fix.ywrapstep = 0; info->fix.type_aux = 0; - info->fix.mmio_start = rinfo->mmio_base_phys; + info->fix.mmio_start = rinfo->gpu_info->mmio_base_phys; info->fix.mmio_len = RADEON_REGSIZE; info->fix.accel = FB_ACCEL_ATI_RADEON; @@ -1914,7 +1917,7 @@ static void fixup_memory_mappings(struct u32 agp_base; /* First, we disable display to avoid interfering */ - if (rinfo->has_CRTC2) { + if (rinfo->gpu_info->has_CRTC2) { save_crtc2_gen_cntl = INREG(CRTC2_GEN_CNTL); OUTREG(CRTC2_GEN_CNTL, save_crtc2_gen_cntl | CRTC2_DISP_REQ_EN_B); } @@ -1956,12 +1959,12 @@ #endif */ #ifdef SET_MC_FB_FROM_APERTURE OUTREG(DISPLAY_BASE_ADDR, aper_base); - if (rinfo->has_CRTC2) + if (rinfo->gpu_info->has_CRTC2) OUTREG(CRTC2_DISPLAY_BASE_ADDR, aper_base); OUTREG(OV0_BASE_ADDR, aper_base); #else OUTREG(DISPLAY_BASE_ADDR, 0); - if (rinfo->has_CRTC2) + if (rinfo->gpu_info->has_CRTC2) OUTREG(CRTC2_DISPLAY_BASE_ADDR, 0); OUTREG(OV0_BASE_ADDR, 0); #endif @@ -1970,7 +1973,7 @@ #endif /* Restore display settings */ OUTREG(CRTC_GEN_CNTL, save_crtc_gen_cntl); OUTREG(CRTC_EXT_CNTL, save_crtc_ext_cntl); - if (rinfo->has_CRTC2) + if (rinfo->gpu_info->has_CRTC2) OUTREG(CRTC2_GEN_CNTL, save_crtc2_gen_cntl); RTRACE("aper_base: %08x MC_FB_LOC to: %08x, MC_AGP_LOC to: %08x\n", @@ -1986,9 +1989,9 @@ static void radeon_identify_vram(struct u32 tmp; /* framebuffer size */ - if ((rinfo->family == CHIP_FAMILY_RS100) || - (rinfo->family == CHIP_FAMILY_RS200) || - (rinfo->family == CHIP_FAMILY_RS300)) { + if ((rinfo->gpu_info->family == CHIP_FAMILY_RS100) || + (rinfo->gpu_info->family == CHIP_FAMILY_RS200) || + (rinfo->gpu_info->family == CHIP_FAMILY_RS300)) { u32 tom = INREG(NB_TOM); tmp = ((((tom >> 16) - (tom & 0xffff) + 1) << 6) * 1024); @@ -2001,8 +2004,8 @@ static void radeon_identify_vram(struct /* This is supposed to fix the crtc2 noise problem. */ OUTREG(GRPH2_BUFFER_CNTL, INREG(GRPH2_BUFFER_CNTL) & ~0x7f0000); - if ((rinfo->family == CHIP_FAMILY_RS100) || - (rinfo->family == CHIP_FAMILY_RS200)) { + if ((rinfo->gpu_info->family == CHIP_FAMILY_RS100) || + (rinfo->gpu_info->family == CHIP_FAMILY_RS200)) { /* This is to workaround the asic bug for RMX, some versions of BIOS dosen't have this register initialized correctly. */ @@ -2021,7 +2024,7 @@ static void radeon_identify_vram(struct * reporting no ram */ if (rinfo->video_ram == 0) { - switch (rinfo->pdev->device) { + switch (rinfo->gpu_info->pdev->device) { case PCI_CHIP_RADEON_LY: case PCI_CHIP_RADEON_LZ: rinfo->video_ram = 8192 * 1024; @@ -2035,14 +2038,14 @@ static void radeon_identify_vram(struct /* * Now try to identify VRAM type */ - if (rinfo->is_IGP || (rinfo->family >= CHIP_FAMILY_R300) || + if (rinfo->gpu_info->is_IGP || (rinfo->gpu_info->family >= CHIP_FAMILY_R300) || (INREG(MEM_SDRAM_MODE_REG) & (1<<30))) rinfo->vram_ddr = 1; else rinfo->vram_ddr = 0; tmp = INREG(MEM_CNTL); - if (IS_R300_VARIANT(rinfo)) { + if (IS_R300_VARIANT(rinfo->gpu_info)) { tmp &= R300_MEM_NUM_CHANNELS_MASK; switch (tmp) { case 0: rinfo->vram_width = 64; break; @@ -2050,9 +2053,9 @@ static void radeon_identify_vram(struct case 2: rinfo->vram_width = 256; break; default: rinfo->vram_width = 128; break; } - } else if ((rinfo->family == CHIP_FAMILY_RV100) || - (rinfo->family == CHIP_FAMILY_RS100) || - (rinfo->family == CHIP_FAMILY_RS200)){ + } else if ((rinfo->gpu_info->family == CHIP_FAMILY_RV100) || + (rinfo->gpu_info->family == CHIP_FAMILY_RS100) || + (rinfo->gpu_info->family == CHIP_FAMILY_RS200)){ if (tmp & RV100_MEM_HALF_MODE) rinfo->vram_width = 32; else @@ -2069,7 +2072,7 @@ static void radeon_identify_vram(struct */ RTRACE("radeonfb (%s): Found %ldk of %s %d bits wide videoram\n", - pci_name(rinfo->pdev), + pci_name(rinfo->gpu_info->pdev), rinfo->video_ram / 1024, rinfo->vram_ddr ? "DDR" : "SDRAM", rinfo->vram_width); @@ -2096,8 +2099,8 @@ static ssize_t radeon_show_one_edid(char static ssize_t radeon_show_edid1(struct kobject *kobj, char *buf, loff_t off, size_t count) { struct device *dev = container_of(kobj, struct device, kobj); - struct pci_dev *pdev = to_pci_dev(dev); - struct fb_info *info = pci_get_drvdata(pdev); + struct gpu_device *gdev = to_gpu_device(dev); + struct fb_info *info = gpu_get_drvdata(gdev); struct radeonfb_info *rinfo = info->par; return radeon_show_one_edid(buf, off, count, rinfo->mon1_EDID); @@ -2107,8 +2110,8 @@ static ssize_t radeon_show_edid1(struct static ssize_t radeon_show_edid2(struct kobject *kobj, char *buf, loff_t off, size_t count) { struct device *dev = container_of(kobj, struct device, kobj); - struct pci_dev *pdev = to_pci_dev(dev); - struct fb_info *info = pci_get_drvdata(pdev); + struct gpu_device *gdev = to_gpu_device(dev); + struct fb_info *info = gpu_get_drvdata(gdev); struct radeonfb_info *rinfo = info->par; return radeon_show_one_edid(buf, off, count, rinfo->mon2_EDID); @@ -2135,72 +2138,64 @@ static struct bin_attribute edid2_attr = }; -static int __devinit radeonfb_pci_register (struct pci_dev *pdev, - const struct pci_device_id *ent) +static int __devinit radeonfb_gpu_register (struct gpu_device *gdev, void *driver_id) { struct fb_info *info; struct radeonfb_info *rinfo; + struct radeon_gpu_info *gpu_info; int ret; + struct pci_dev *pdev; - RTRACE("radeonfb_pci_register BEGIN\n"); - - /* Enable device in PCI config */ - ret = pci_enable_device(pdev); - if (ret < 0) { - printk(KERN_ERR "radeonfb (%s): Cannot enable PCI device\n", - pci_name(pdev)); - goto err_out; - } + /* get the radeon GPU info */ + gpu_info = dev_get_drvdata(gdev->dev.parent); + + pdev = gpu_info->pdev; + printk("radeonfb: %08lX\n", gpu_info->mmio_base_phys); - info = framebuffer_alloc(sizeof(struct radeonfb_info), &pdev->dev); + RTRACE("radeonfb_gpu_register BEGIN\n"); + + info = framebuffer_alloc(sizeof(struct radeonfb_info), &gdev->dev); if (!info) { - printk (KERN_ERR "radeonfb (%s): could not allocate memory\n", - pci_name(pdev)); + printk (KERN_ERR "radeonfb : could not allocate memory\n"); ret = -ENOMEM; goto err_disable; } rinfo = info->par; rinfo->info = info; - rinfo->pdev = pdev; + rinfo->gpu_info = gpu_info; + rinfo->gdev = gdev; + spin_lock_init(&rinfo->reg_lock); init_timer(&rinfo->lvds_timer); rinfo->lvds_timer.function = radeon_lvds_timer_func; rinfo->lvds_timer.data = (unsigned long)rinfo; strcpy(rinfo->name, "ATI Radeon XX "); - rinfo->name[11] = ent->device >> 8; - rinfo->name[12] = ent->device & 0xFF; - rinfo->family = ent->driver_data & CHIP_FAMILY_MASK; - rinfo->chipset = pdev->device; - rinfo->has_CRTC2 = (ent->driver_data & CHIP_HAS_CRTC2) != 0; - rinfo->is_mobility = (ent->driver_data & CHIP_IS_MOBILITY) != 0; - rinfo->is_IGP = (ent->driver_data & CHIP_IS_IGP) != 0; - - /* Set base addrs */ - rinfo->fb_base_phys = pci_resource_start (pdev, 0); - rinfo->mmio_base_phys = pci_resource_start (pdev, 2); + + rinfo->name[11] = rinfo->gpu_info->ati_name[0]; + rinfo->name[12] = rinfo->gpu_info->ati_name[1]; /* request the mem regions */ - ret = pci_request_region(pdev, 0, "radeonfb framebuffer"); + ret = pci_request_region(gpu_info->pdev, 0, "radeonfb framebuffer"); if (ret < 0) { printk( KERN_ERR "radeonfb (%s): cannot request region 0.\n", - pci_name(rinfo->pdev)); + pci_name(rinfo->gpu_info->pdev)); goto err_release_fb; } - ret = pci_request_region(pdev, 2, "radeonfb mmio"); + ret = pci_request_region(gpu_info->pdev, 2, "radeonfb mmio"); if (ret < 0) { printk( KERN_ERR "radeonfb (%s): cannot request region 2.\n", - pci_name(rinfo->pdev)); + pci_name(rinfo->gpu_info->pdev)); goto err_release_pci0; } /* map the regions */ - rinfo->mmio_base = ioremap(rinfo->mmio_base_phys, RADEON_REGSIZE); + rinfo->mmio_base = ioremap(rinfo->gpu_info->mmio_base_phys, RADEON_REGSIZE); if (!rinfo->mmio_base) { printk(KERN_ERR "radeonfb (%s): cannot map MMIO\n", - pci_name(rinfo->pdev)); + pci_name(rinfo->gpu_info->pdev)); ret = -EIO; goto err_release_pci2; } @@ -2208,22 +2203,12 @@ static int __devinit radeonfb_pci_regist rinfo->fb_local_base = INREG(MC_FB_LOCATION) << 16; /* - * Check for errata + * Check for additional errata */ - rinfo->errata = 0; - if (rinfo->family == CHIP_FAMILY_R300 && + if (rinfo->gpu_info->family == CHIP_FAMILY_R300 && (INREG(CONFIG_CNTL) & CFG_ATI_REV_ID_MASK) == CFG_ATI_REV_A11) - rinfo->errata |= CHIP_ERRATA_R300_CG; - - if (rinfo->family == CHIP_FAMILY_RV200 || - rinfo->family == CHIP_FAMILY_RS200) - rinfo->errata |= CHIP_ERRATA_PLL_DUMMYREADS; - - if (rinfo->family == CHIP_FAMILY_RV100 || - rinfo->family == CHIP_FAMILY_RS100 || - rinfo->family == CHIP_FAMILY_RS200) - rinfo->errata |= CHIP_ERRATA_PLL_DELAY; + rinfo->gpu_info->errata |= CHIP_ERRATA_R300_CG; #ifdef CONFIG_PPC_OF /* On PPC, we obtain the OF device-node pointer to the firmware @@ -2232,7 +2217,7 @@ #ifdef CONFIG_PPC_OF rinfo->of_node = pci_device_to_OF_node(pdev); if (rinfo->of_node == NULL) printk(KERN_WARNING "radeonfb (%s): Cannot match card to OF node !\n", - pci_name(rinfo->pdev)); + pci_name(rinfo->gpu_info->pdev)); /* On PPC, the firmware sets up a memory mapping that tends * to cause lockups when enabling the engine. We reconfigure @@ -2247,19 +2232,19 @@ #endif /* CONFIG_PPC_OF */ rinfo->mapped_vram = min_t(unsigned long, MAX_MAPPED_VRAM, rinfo->video_ram); do { - rinfo->fb_base = ioremap (rinfo->fb_base_phys, + rinfo->fb_base = ioremap (rinfo->gpu_info->fb_base_phys, rinfo->mapped_vram); } while ( rinfo->fb_base == 0 && ((rinfo->mapped_vram /=2) >= MIN_MAPPED_VRAM) ); if (rinfo->fb_base == NULL) { printk (KERN_ERR "radeonfb (%s): cannot map FB\n", - pci_name(rinfo->pdev)); + pci_name(rinfo->gpu_info->pdev)); ret = -EIO; goto err_unmap_rom; } - RTRACE("radeonfb (%s): mapped %ldk videoram\n", pci_name(rinfo->pdev), + RTRACE("radeonfb (%s): mapped %ldk videoram\n", pci_name(rinfo->gpu_info->pdev), rinfo->mapped_vram/1024); /* @@ -2273,8 +2258,8 @@ #endif /* CONFIG_PPC_OF */ * archs who would store that elsewhere and/or could initialize * more than one adapter during boot). */ - if (!rinfo->is_mobility) - radeon_map_ROM(rinfo, pdev); + if (!rinfo->gpu_info->is_mobility) + radeon_map_ROM(rinfo, rinfo->gpu_info->pdev); /* * On x86, the primary display on laptop may have it's BIOS @@ -2290,8 +2275,8 @@ #endif /* If both above failed, try the BIOS ROM again for mobility * chips */ - if (rinfo->bios_seg == NULL && rinfo->is_mobility) - radeon_map_ROM(rinfo, pdev); + if (rinfo->bios_seg == NULL && rinfo->gpu_info->is_mobility) + radeon_map_ROM(rinfo, rinfo->gpu_info->pdev); /* Get informations about the board's PLL */ radeon_get_pllinfo(rinfo); @@ -2312,9 +2297,9 @@ #endif /* Register some sysfs stuff (should be done better) */ if (rinfo->mon1_EDID) - sysfs_create_bin_file(&rinfo->pdev->dev.kobj, &edid1_attr); + sysfs_create_bin_file(&gdev->dev.kobj, &edid1_attr); if (rinfo->mon2_EDID) - sysfs_create_bin_file(&rinfo->pdev->dev.kobj, &edid2_attr); + sysfs_create_bin_file(&gdev->dev.kobj, &edid2_attr); /* save current mode regs before we switch into the new one * so we can restore this upon __exit @@ -2327,32 +2312,32 @@ #endif /* -2 is special: means ON on mobility chips and do not * change on others */ - radeonfb_pm_init(rinfo, rinfo->is_mobility ? 1 : -1); + radeonfb_pm_init(rinfo, rinfo->gpu_info->is_mobility ? 1 : -1); } else radeonfb_pm_init(rinfo, default_dynclk); - pci_set_drvdata(pdev, info); + gpu_set_drvdata(gdev, info); /* Register with fbdev layer */ ret = register_framebuffer(info); if (ret < 0) { printk (KERN_ERR "radeonfb (%s): could not register framebuffer\n", - pci_name(rinfo->pdev)); + pci_name(rinfo->gpu_info->pdev)); goto err_unmap_fb; } #ifdef CONFIG_MTRR - rinfo->mtrr_hdl = nomtrr ? -1 : mtrr_add(rinfo->fb_base_phys, + rinfo->mtrr_hdl = nomtrr ? -1 : mtrr_add(rinfo->gpu_info->fb_base_phys, rinfo->video_ram, MTRR_TYPE_WRCOMB, 1); #endif radeonfb_bl_init(rinfo); - printk ("radeonfb (%s): %s\n", pci_name(rinfo->pdev), rinfo->name); + printk ("radeonfb (%s): %s\n", pci_name(rinfo->gpu_info->pdev), rinfo->name); if (rinfo->bios_seg) - radeon_unmap_ROM(rinfo, pdev); + radeon_unmap_ROM(rinfo, rinfo->gpu_info->pdev); RTRACE("radeonfb_pci_register END\n"); return 0; @@ -2368,7 +2353,7 @@ #ifdef CONFIG_FB_RADEON_I2C radeon_delete_i2c_busses(rinfo); #endif if (rinfo->bios_seg) - radeon_unmap_ROM(rinfo, pdev); + radeon_unmap_ROM(rinfo, rinfo->gpu_info->pdev); iounmap(rinfo->mmio_base); err_release_pci2: pci_release_region(pdev, 2); @@ -2377,27 +2362,27 @@ err_release_pci0: err_release_fb: framebuffer_release(info); err_disable: -err_out: return ret; } -static void __devexit radeonfb_pci_unregister (struct pci_dev *pdev) +static void __devexit radeonfb_gpu_unregister(struct gpu_device *gdev) { - struct fb_info *info = pci_get_drvdata(pdev); - struct radeonfb_info *rinfo = info->par; - - if (!rinfo) - return; + struct fb_info *info = gpu_get_drvdata(gdev); + struct radeonfb_info *rinfo = info->par; + struct pci_dev *pdev = rinfo->gpu_info->pdev; + + if (!rinfo) + return; radeonfb_bl_exit(rinfo); radeonfb_pm_exit(rinfo); if (rinfo->mon1_EDID) - sysfs_remove_bin_file(&rinfo->pdev->dev.kobj, &edid1_attr); + sysfs_remove_bin_file(&gdev->dev.kobj, &edid1_attr); if (rinfo->mon2_EDID) - sysfs_remove_bin_file(&rinfo->pdev->dev.kobj, &edid2_attr); + sysfs_remove_bin_file(&gdev->dev.kobj, &edid2_attr); #if 0 /* restore original state @@ -2416,11 +2401,12 @@ #ifdef CONFIG_MTRR mtrr_del(rinfo->mtrr_hdl, 0, 0); #endif - unregister_framebuffer(info); + gpu_set_drvdata(gdev, NULL); + unregister_framebuffer(info); + + iounmap(rinfo->mmio_base); + iounmap(rinfo->fb_base); - iounmap(rinfo->mmio_base); - iounmap(rinfo->fb_base); - pci_release_region(pdev, 2); pci_release_region(pdev, 0); @@ -2436,14 +2422,17 @@ #endif } -static struct pci_driver radeonfb_driver = { +static struct gpu_driver radeonfb_driver = { .name = "radeonfb", - .id_table = radeonfb_pci_table, - .probe = radeonfb_pci_register, - .remove = __devexit_p(radeonfb_pci_unregister), + .drv_type = GPU_FB, + .probe = radeonfb_gpu_register, + .remove = __devexit_p(radeonfb_gpu_unregister), + .id_table = (void *)radeonfb_pci_table, #ifdef CONFIG_PM - .suspend = radeonfb_pci_suspend, - .resume = radeonfb_pci_resume, + .driver = { + .suspend = radeonfb_gpu_suspend, + .resume = radeonfb_gpu_resume, + } #endif /* CONFIG_PM */ }; @@ -2493,13 +2482,13 @@ #ifndef MODULE return -ENODEV; radeonfb_setup(option); #endif - return pci_register_driver (&radeonfb_driver); + return radeon_gpu_register_driver(&radeonfb_driver, THIS_MODULE); } static void __exit radeonfb_exit (void) { - pci_unregister_driver (&radeonfb_driver); + gpu_unregister_driver (&radeonfb_driver); } module_init(radeonfb_init); diff --git a/drivers/video/aty/radeon_i2c.c b/drivers/video/aty/radeon_i2c.c index 9aaca58..c00990e 100644 --- a/drivers/video/aty/radeon_i2c.c +++ b/drivers/video/aty/radeon_i2c.c @@ -76,7 +76,7 @@ static int radeon_setup_i2c_bus(struct r chan->adapter.owner = THIS_MODULE; chan->adapter.id = I2C_HW_B_RADEON; chan->adapter.algo_data = &chan->algo; - chan->adapter.dev.parent = &chan->rinfo->pdev->dev; + chan->adapter.dev.parent = &chan->rinfo->gdev->dev; chan->algo.setsda = radeon_gpio_setsda; chan->algo.setscl = radeon_gpio_setscl; chan->algo.getsda = radeon_gpio_getsda; @@ -94,9 +94,9 @@ static int radeon_setup_i2c_bus(struct r rc = i2c_bit_add_bus(&chan->adapter); if (rc == 0) - dev_dbg(&chan->rinfo->pdev->dev, "I2C bus %s registered.\n", name); + dev_dbg(&chan->rinfo->gdev->dev, "I2C bus %s registered.\n", name); else - dev_warn(&chan->rinfo->pdev->dev, "Failed to register I2C bus %s.\n", name); + dev_warn(&chan->rinfo->gdev->dev, "Failed to register I2C bus %s.\n", name); return rc; } @@ -157,14 +157,14 @@ static u8 *radeon_do_probe_i2c_edid(stru buf = kmalloc(EDID_LENGTH, GFP_KERNEL); if (!buf) { - dev_warn(&chan->rinfo->pdev->dev, "Out of memory!\n"); + dev_warn(&chan->rinfo->gdev->dev, "Out of memory!\n"); return NULL; } msgs[1].buf = buf; if (i2c_transfer(&chan->adapter, msgs, 2) == 2) return buf; - dev_dbg(&chan->rinfo->pdev->dev, "Unable to read EDID block.\n"); + dev_dbg(&chan->rinfo->gdev->dev, "Unable to read EDID block.\n"); kfree(buf); return NULL; } @@ -249,7 +249,7 @@ int radeon_probe_i2c_connector(struct ra } if (edid[0x14] & 0x80) { /* Fix detection using BIOS tables */ - if (rinfo->is_mobility /*&& conn == ddc_dvi*/ && + if (rinfo->gpu_info->is_mobility /*&& conn == ddc_dvi*/ && (INREG(LVDS_GEN_CNTL) & LVDS_ON)) { RTRACE("radeonfb: I2C (port %d) ... found LVDS panel\n", conn); return MT_LCD; diff --git a/drivers/video/aty/radeon_monitor.c b/drivers/video/aty/radeon_monitor.c index 98c05bc..7190bad 100644 --- a/drivers/video/aty/radeon_monitor.c +++ b/drivers/video/aty/radeon_monitor.c @@ -123,7 +123,7 @@ static int __devinit radeon_probe_OF_hea while (dp == NULL) return MT_NONE; - if (rinfo->has_CRTC2) { + if (rinfo->gpu_info->has_CRTC2) { char *pname; int len, second = 0; @@ -329,8 +329,8 @@ static int __devinit radeon_crt_is_conne ulData |= (DAC_FORCE_BLANK_OFF_EN |DAC_FORCE_DATA_EN |DAC_FORCE_DATA_SEL_MASK); - if ((rinfo->family == CHIP_FAMILY_RV250) || - (rinfo->family == CHIP_FAMILY_RV280)) + if ((rinfo->gpu_info->family == CHIP_FAMILY_RV250) || + (rinfo->gpu_info->family == CHIP_FAMILY_RV280)) ulData |= (0x01b6 << DAC_FORCE_DATA_SHIFT); else ulData |= (0x01ac << DAC_FORCE_DATA_SHIFT); @@ -495,7 +495,7 @@ #endif /* DEBUG */ /* * Old single head cards */ - if (!rinfo->has_CRTC2) { + if (!rinfo->gpu_info->has_CRTC2) { #ifdef CONFIG_PPC_OF if (rinfo->mon1_type == MT_NONE) rinfo->mon1_type = radeon_probe_OF_head(rinfo, 0, @@ -561,7 +561,7 @@ #ifdef CONFIG_FB_RADEON_I2C ddc_crt2_used = 1; } #endif /* CONFIG_FB_RADEON_I2C */ - if (rinfo->mon1_type == MT_NONE && rinfo->is_mobility && + if (rinfo->mon1_type == MT_NONE && rinfo->gpu_info->is_mobility && ((rinfo->bios_seg && (INREG(BIOS_4_SCRATCH) & 4)) || (INREG(LVDS_GEN_CNTL) & LVDS_ON))) { rinfo->mon1_type = MT_LCD; @@ -633,7 +633,7 @@ #endif /* CONFIG_FB_RADEON_I2C */ radeon_get_mon_name(rinfo->mon1_type)); if (rinfo->mon1_EDID) printk(KERN_INFO "radeonfb: EDID probed\n"); - if (!rinfo->has_CRTC2) + if (!rinfo->gpu_info->has_CRTC2) return; printk(KERN_INFO "radeonfb: Monitor 2 type %s found\n", radeon_get_mon_name(rinfo->mon2_type)); diff --git a/drivers/video/aty/radeon_pm.c b/drivers/video/aty/radeon_pm.c index c709176..730624d 100644 --- a/drivers/video/aty/radeon_pm.c +++ b/drivers/video/aty/radeon_pm.c @@ -32,8 +32,8 @@ static void radeon_pm_disable_dynamic_mo u32 tmp; /* RV100 */ - if ((rinfo->family == CHIP_FAMILY_RV100) && (!rinfo->is_mobility)) { - if (rinfo->has_CRTC2) { + if ((rinfo->gpu_info->family == CHIP_FAMILY_RV100) && (!rinfo->gpu_info->is_mobility)) { + if (rinfo->gpu_info->has_CRTC2) { tmp = INPLL(pllSCLK_CNTL); tmp &= ~SCLK_CNTL__DYN_STOP_LAT_MASK; tmp |= SCLK_CNTL__CP_MAX_DYN_STOP_LAT | SCLK_CNTL__FORCEON_MASK; @@ -50,7 +50,7 @@ static void radeon_pm_disable_dynamic_mo return; } /* R100 */ - if (!rinfo->has_CRTC2) { + if (!rinfo->gpu_info->has_CRTC2) { tmp = INPLL(pllSCLK_CNTL); tmp |= (SCLK_CNTL__FORCE_CP | SCLK_CNTL__FORCE_HDP | SCLK_CNTL__FORCE_DISP1 | SCLK_CNTL__FORCE_TOP | @@ -63,7 +63,7 @@ static void radeon_pm_disable_dynamic_mo return; } /* RV350 (M10/M11) */ - if (rinfo->family == CHIP_FAMILY_RV350) { + if (rinfo->gpu_info->family == CHIP_FAMILY_RV350) { /* for RV350/M10/M11, no delays are required. */ tmp = INPLL(pllSCLK_CNTL2); tmp |= (SCLK_CNTL2__R300_FORCE_TCL | @@ -130,7 +130,7 @@ static void radeon_pm_disable_dynamic_mo /* XFree doesn't do that case, but we had this code from Apple and it * seem necessary for proper suspend/resume operations */ - if (rinfo->is_mobility) { + if (rinfo->gpu_info->is_mobility) { tmp |= SCLK_CNTL__FORCE_HDP| SCLK_CNTL__FORCE_DISP1| SCLK_CNTL__FORCE_DISP2| @@ -147,8 +147,8 @@ static void radeon_pm_disable_dynamic_mo SCLK_CNTL__FORCE_SUBPIC| SCLK_CNTL__FORCE_OV0; } - else if (rinfo->family == CHIP_FAMILY_R300 || - rinfo->family == CHIP_FAMILY_R350) { + else if (rinfo->gpu_info->family == CHIP_FAMILY_R300 || + rinfo->gpu_info->family == CHIP_FAMILY_R350) { tmp |= SCLK_CNTL__FORCE_HDP | SCLK_CNTL__FORCE_DISP1 | SCLK_CNTL__FORCE_DISP2 | @@ -159,7 +159,7 @@ static void radeon_pm_disable_dynamic_mo OUTPLL(pllSCLK_CNTL, tmp); radeon_msleep(16); - if (rinfo->family == CHIP_FAMILY_R300 || rinfo->family == CHIP_FAMILY_R350) { + if (rinfo->gpu_info->family == CHIP_FAMILY_R300 || rinfo->gpu_info->family == CHIP_FAMILY_R350) { tmp = INPLL(pllSCLK_CNTL2); tmp |= SCLK_CNTL2__R300_FORCE_TCL | SCLK_CNTL2__R300_FORCE_GA | @@ -173,7 +173,7 @@ static void radeon_pm_disable_dynamic_mo OUTPLL(pllCLK_PIN_CNTL, tmp); radeon_msleep(15); - if (rinfo->is_IGP) { + if (rinfo->gpu_info->is_IGP) { /* Weird ... X is _un_ forcing clocks here, I think it's * doing backward. Imitate it for now... */ @@ -184,7 +184,7 @@ static void radeon_pm_disable_dynamic_mo radeon_msleep(16); } /* Hrm... same shit, X doesn't do that but I have to */ - else if (rinfo->is_mobility) { + else if (rinfo->gpu_info->is_mobility) { tmp = INPLL(pllMCLK_CNTL); tmp |= (MCLK_CNTL__FORCE_MCLKA | MCLK_CNTL__FORCE_MCLKB | @@ -202,7 +202,7 @@ static void radeon_pm_disable_dynamic_mo radeon_msleep(15); } - if (rinfo->is_mobility) { + if (rinfo->gpu_info->is_mobility) { tmp = INPLL(pllSCLK_MORE_CNTL); tmp |= SCLK_MORE_CNTL__FORCE_DISPREGS| SCLK_MORE_CNTL__FORCE_MC_GUI| @@ -234,7 +234,7 @@ static void radeon_pm_enable_dynamic_mod u32 tmp; /* R100 */ - if (!rinfo->has_CRTC2) { + if (!rinfo->gpu_info->has_CRTC2) { tmp = INPLL(pllSCLK_CNTL); if ((INREG(CONFIG_CNTL) & CFG_ATI_REV_ID_MASK) > CFG_ATI_REV_A13) @@ -249,7 +249,7 @@ static void radeon_pm_enable_dynamic_mod } /* M10/M11 */ - if (rinfo->family == CHIP_FAMILY_RV350) { + if (rinfo->gpu_info->family == CHIP_FAMILY_RV350) { tmp = INPLL(pllSCLK_CNTL2); tmp &= ~(SCLK_CNTL2__R300_FORCE_TCL | SCLK_CNTL2__R300_FORCE_GA | @@ -334,7 +334,7 @@ static void radeon_pm_enable_dynamic_mod } /* R300 */ - if (rinfo->family == CHIP_FAMILY_R300 || rinfo->family == CHIP_FAMILY_R350) { + if (rinfo->gpu_info->family == CHIP_FAMILY_R300 || rinfo->gpu_info->family == CHIP_FAMILY_R350) { tmp = INPLL(pllSCLK_CNTL); tmp &= ~(SCLK_CNTL__R300_FORCE_VAP); tmp |= SCLK_CNTL__FORCE_CP; @@ -371,9 +371,9 @@ static void radeon_pm_enable_dynamic_mod tmp &= ~SCLK_CNTL__FORCEON_MASK; /*RAGE_6::A11 A12 A12N1 A13, RV250::A11 A12, R300*/ - if ((rinfo->family == CHIP_FAMILY_RV250 && + if ((rinfo->gpu_info->family == CHIP_FAMILY_RV250 && ((INREG(CONFIG_CNTL) & CFG_ATI_REV_ID_MASK) < CFG_ATI_REV_A13)) || - ((rinfo->family == CHIP_FAMILY_RV100) && + ((rinfo->gpu_info->family == CHIP_FAMILY_RV100) && ((INREG(CONFIG_CNTL) & CFG_ATI_REV_ID_MASK) <= CFG_ATI_REV_A13))) { tmp |= SCLK_CNTL__FORCE_CP; tmp |= SCLK_CNTL__FORCE_VIP; @@ -381,15 +381,15 @@ static void radeon_pm_enable_dynamic_mod OUTPLL(pllSCLK_CNTL, tmp); radeon_msleep(15); - if ((rinfo->family == CHIP_FAMILY_RV200) || - (rinfo->family == CHIP_FAMILY_RV250) || - (rinfo->family == CHIP_FAMILY_RV280)) { + if ((rinfo->gpu_info->family == CHIP_FAMILY_RV200) || + (rinfo->gpu_info->family == CHIP_FAMILY_RV250) || + (rinfo->gpu_info->family == CHIP_FAMILY_RV280)) { tmp = INPLL(pllSCLK_MORE_CNTL); tmp &= ~SCLK_MORE_CNTL__FORCEON; /* RV200::A11 A12 RV250::A11 A12 */ - if (((rinfo->family == CHIP_FAMILY_RV200) || - (rinfo->family == CHIP_FAMILY_RV250)) && + if (((rinfo->gpu_info->family == CHIP_FAMILY_RV200) || + (rinfo->gpu_info->family == CHIP_FAMILY_RV250)) && ((INREG(CONFIG_CNTL) & CFG_ATI_REV_ID_MASK) < CFG_ATI_REV_A13)) tmp |= SCLK_MORE_CNTL__FORCEON; @@ -399,8 +399,8 @@ static void radeon_pm_enable_dynamic_mod /* RV200::A11 A12, RV250::A11 A12 */ - if (((rinfo->family == CHIP_FAMILY_RV200) || - (rinfo->family == CHIP_FAMILY_RV250)) && + if (((rinfo->gpu_info->family == CHIP_FAMILY_RV200) || + (rinfo->gpu_info->family == CHIP_FAMILY_RV250)) && ((INREG(CONFIG_CNTL) & CFG_ATI_REV_ID_MASK) < CFG_ATI_REV_A13)) { tmp = INPLL(pllPLL_PWRMGT_CNTL); tmp |= PLL_PWRMGT_CNTL__TCL_BYPASS_DISABLE; @@ -426,7 +426,7 @@ static void radeon_pm_enable_dynamic_mod /* X doesn't do that ... hrm, we do on mobility && Macs */ #ifdef CONFIG_PPC_OF - if (rinfo->is_mobility) { + if (rinfo->gpu_info->is_mobility) { tmp = INPLL(pllMCLK_CNTL); tmp &= ~(MCLK_CNTL__FORCE_MCLKA | MCLK_CNTL__FORCE_MCLKB | @@ -507,7 +507,7 @@ static void radeon_pm_save_regs(struct r rinfo->save_regs[37] = INREG(MPP_TB_CONFIG); rinfo->save_regs[38] = INREG(FCP_CNTL); - if (rinfo->is_mobility) { + if (rinfo->gpu_info->is_mobility) { rinfo->save_regs[12] = INREG(LVDS_PLL_CNTL); rinfo->save_regs[43] = INPLL(pllSSPLL_CNTL); rinfo->save_regs[44] = INPLL(pllSSPLL_REF_DIV); @@ -517,7 +517,7 @@ static void radeon_pm_save_regs(struct r rinfo->save_regs[81] = INREG(LVDS_GEN_CNTL); } - if (rinfo->family >= CHIP_FAMILY_RV200) { + if (rinfo->gpu_info->family >= CHIP_FAMILY_RV200) { rinfo->save_regs[42] = INREG(MEM_REFRESH_CNTL); rinfo->save_regs[46] = INREG(MC_CNTL); rinfo->save_regs[47] = INREG(MC_INIT_GFX_LAT_TIMER); @@ -533,7 +533,7 @@ static void radeon_pm_save_regs(struct r rinfo->save_regs[56] = INREG(PAD_CTLR_MISC); rinfo->save_regs[57] = INREG(FW_CNTL); - if (rinfo->family >= CHIP_FAMILY_R300) { + if (rinfo->gpu_info->family >= CHIP_FAMILY_R300) { rinfo->save_regs[58] = INMC(rinfo, ixR300_MC_MC_INIT_WR_LAT_TIMER); rinfo->save_regs[59] = INMC(rinfo, ixR300_MC_IMP_CNTL); rinfo->save_regs[60] = INMC(rinfo, ixR300_MC_CHP_IO_CNTL_C0); @@ -598,7 +598,7 @@ static void radeon_pm_restore_regs(struc OUTPLL(VCLK_ECP_CNTL, rinfo->save_regs[5]); OUTPLL(PIXCLKS_CNTL, rinfo->save_regs[6]); OUTPLL(MCLK_MISC, rinfo->save_regs[7]); - if (rinfo->family == CHIP_FAMILY_RV350) + if (rinfo->gpu_info->family == CHIP_FAMILY_RV350) OUTPLL(SCLK_MORE_CNTL, rinfo->save_regs[34]); OUTREG(SURFACE_CNTL, rinfo->save_regs[29]); @@ -649,7 +649,7 @@ static void radeon_pm_disable_iopad(stru static void radeon_pm_program_v2clk(struct radeonfb_info *rinfo) { /* Set v2clk to 65MHz */ - if (rinfo->family <= CHIP_FAMILY_RV280) { + if (rinfo->gpu_info->family <= CHIP_FAMILY_RV280) { OUTPLL(pllPIXCLKS_CNTL, __INPLL(rinfo, pllPIXCLKS_CNTL) & ~PIXCLKS_CNTL__PIX2CLK_SRC_SEL_MASK); @@ -681,7 +681,7 @@ static void radeon_pm_low_current(struct u32 reg; reg = INREG(BUS_CNTL1); - if (rinfo->family <= CHIP_FAMILY_RV280) { + if (rinfo->gpu_info->family <= CHIP_FAMILY_RV280) { reg &= ~BUS_CNTL1_MOBILE_PLATFORM_SEL_MASK; reg |= BUS_CNTL1_AGPCLK_VALID | (1<<BUS_CNTL1_MOBILE_PLATFORM_SEL_SHIFT); } else { @@ -761,7 +761,7 @@ static void radeon_pm_setup_for_suspend( SCLK_CNTL__FORCE_TV_SCLK| SCLK_CNTL__FORCE_SUBPIC| SCLK_CNTL__FORCE_OV0; - if (rinfo->family <= CHIP_FAMILY_RV280) + if (rinfo->gpu_info->family <= CHIP_FAMILY_RV280) sclk_cntl |= SCLK_CNTL__FORCE_RE; else sclk_cntl |= SCLK_CNTL__SE_MAX_DYN_STOP_LAT | @@ -854,7 +854,7 @@ static void radeon_pm_setup_for_suspend( OUTPLL( pllMCLK_MISC, tmp); /* AGP PLL control */ - if (rinfo->family <= CHIP_FAMILY_RV280) { + if (rinfo->gpu_info->family <= CHIP_FAMILY_RV280) { OUTREG(BUS_CNTL1, INREG(BUS_CNTL1) | BUS_CNTL1__AGPCLK_VALID); OUTREG(BUS_CNTL1, @@ -1156,7 +1156,7 @@ static void radeon_pm_full_reset_sdram(s OUTREG( CRTC2_GEN_CNTL, (crtcGenCntl2 | CRTC2_GEN_CNTL__CRTC2_DISP_REQ_EN_B) ); /* This is the code for the Aluminium PowerBooks M10 / iBooks M11 */ - if (rinfo->family == CHIP_FAMILY_RV350) { + if (rinfo->gpu_info->family == CHIP_FAMILY_RV350) { u32 sdram_mode_reg = rinfo->save_regs[35]; static u32 default_mrtable[] = { 0x21320032, @@ -1217,7 +1217,7 @@ #endif /* CONFIG_PPC_OF */ } /* Here come the desktop RV200 "QW" card */ - else if (!rinfo->is_mobility && rinfo->family == CHIP_FAMILY_RV200) { + else if (!rinfo->gpu_info->is_mobility && rinfo->gpu_info->family == CHIP_FAMILY_RV200) { /* Disable refresh */ memRefreshCntl = INREG( MEM_REFRESH_CNTL) & ~MEM_REFRESH_CNTL__MEM_REFRESH_DIS; @@ -1240,7 +1240,7 @@ #endif /* CONFIG_PPC_OF */ } /* The M6 */ - else if (rinfo->is_mobility && rinfo->family == CHIP_FAMILY_RV100) { + else if (rinfo->gpu_info->is_mobility && rinfo->gpu_info->family == CHIP_FAMILY_RV100) { /* Disable refresh */ memRefreshCntl = INREG(EXT_MEM_CNTL) & ~(1 << 20); OUTREG( EXT_MEM_CNTL, memRefreshCntl | (1 << 20)); @@ -1270,7 +1270,7 @@ #endif /* CONFIG_PPC_OF */ OUTREG(EXT_MEM_CNTL, memRefreshCntl); } /* And finally, the M7..M9 models, including M9+ (RV280) */ - else if (rinfo->is_mobility) { + else if (rinfo->gpu_info->is_mobility) { /* Disable refresh */ memRefreshCntl = INREG( MEM_REFRESH_CNTL) @@ -1290,7 +1290,7 @@ #endif /* CONFIG_PPC_OF */ radeon_pm_yclk_mclk_sync(rinfo); /* M6, M7 and M9 so far ... */ - if (rinfo->family <= CHIP_FAMILY_RV250) { + if (rinfo->gpu_info->family <= CHIP_FAMILY_RV250) { radeon_pm_program_mode_reg(rinfo, 0x2000, 1); radeon_pm_program_mode_reg(rinfo, 0x2001, 1); radeon_pm_program_mode_reg(rinfo, 0x2002, 1); @@ -1298,7 +1298,7 @@ #endif /* CONFIG_PPC_OF */ radeon_pm_program_mode_reg(rinfo, 0x0032, 1); } /* M9+ (iBook G4) */ - else if (rinfo->family == CHIP_FAMILY_RV280) { + else if (rinfo->gpu_info->family == CHIP_FAMILY_RV280) { radeon_pm_program_mode_reg(rinfo, 0x2000, 1); radeon_pm_program_mode_reg(rinfo, 0x0132, 1); radeon_pm_program_mode_reg(rinfo, 0x0032, 1); @@ -2418,7 +2418,7 @@ static void radeon_set_suspend(struct ra */ if (suspend) { printk(KERN_DEBUG "radeonfb (%s): switching to D2 state...\n", - pci_name(rinfo->pdev)); + pci_name(rinfo->gpu_info->pdev)); /* Disable dynamic power management of clocks for the * duration of the suspend/resume process @@ -2430,7 +2430,7 @@ static void radeon_set_suspend(struct ra /* Prepare mobility chips for suspend. */ - if (rinfo->is_mobility) { + if (rinfo->gpu_info->is_mobility) { /* Program V2CLK */ radeon_pm_program_v2clk(rinfo); @@ -2443,7 +2443,7 @@ static void radeon_set_suspend(struct ra /* Prepare chip for power management */ radeon_pm_setup_for_suspend(rinfo); - if (rinfo->family <= CHIP_FAMILY_RV280) { + if (rinfo->gpu_info->family <= CHIP_FAMILY_RV280) { /* Reset the MDLL */ /* because both INPLL and OUTPLL take the same * lock, that's why. */ @@ -2454,32 +2454,32 @@ static void radeon_set_suspend(struct ra } for (i = 0; i < 64; ++i) - pci_read_config_dword(rinfo->pdev, i * 4, + pci_read_config_dword(rinfo->gpu_info->pdev, i * 4, &rinfo->cfg_save[i]); /* Switch PCI power managment to D2. */ - pci_disable_device(rinfo->pdev); + pci_disable_device(rinfo->gpu_info->pdev); for (;;) { pci_read_config_word( - rinfo->pdev, rinfo->pm_reg+PCI_PM_CTRL, + rinfo->gpu_info->pdev, rinfo->pm_reg+PCI_PM_CTRL, &pwr_cmd); if (pwr_cmd & 2) break; pci_write_config_word( - rinfo->pdev, rinfo->pm_reg+PCI_PM_CTRL, + rinfo->gpu_info->pdev, rinfo->pm_reg+PCI_PM_CTRL, (pwr_cmd & ~PCI_PM_CTRL_STATE_MASK) | 2); mdelay(500); } } else { printk(KERN_DEBUG "radeonfb (%s): switching to D0 state...\n", - pci_name(rinfo->pdev)); + pci_name(rinfo->gpu_info->pdev)); /* Switch back PCI powermanagment to D0 */ mdelay(200); - pci_write_config_word(rinfo->pdev, rinfo->pm_reg+PCI_PM_CTRL, 0); + pci_write_config_word(rinfo->gpu_info->pdev, rinfo->pm_reg+PCI_PM_CTRL, 0); mdelay(500); - if (rinfo->family <= CHIP_FAMILY_RV250) { + if (rinfo->gpu_info->family <= CHIP_FAMILY_RV250) { /* Reset the SDRAM controller */ radeon_pm_full_reset_sdram(rinfo); @@ -2500,7 +2500,7 @@ static int radeon_restore_pci_cfg(struct static u32 radeon_cfg_after_resume[64]; for (i = 0; i < 64; ++i) - pci_read_config_dword(rinfo->pdev, i * 4, + pci_read_config_dword(rinfo->gpu_info->pdev, i * 4, &radeon_cfg_after_resume[i]); if (radeon_cfg_after_resume[PCI_BASE_ADDRESS_0/4] @@ -2509,21 +2509,22 @@ static int radeon_restore_pci_cfg(struct for (i = PCI_BASE_ADDRESS_0/4; i < 64; ++i) { if (radeon_cfg_after_resume[i] != rinfo->cfg_save[i]) - pci_write_config_dword(rinfo->pdev, i * 4, + pci_write_config_dword(rinfo->gpu_info->pdev, i * 4, rinfo->cfg_save[i]); } - pci_write_config_word(rinfo->pdev, PCI_CACHE_LINE_SIZE, + pci_write_config_word(rinfo->gpu_info->pdev, PCI_CACHE_LINE_SIZE, rinfo->cfg_save[PCI_CACHE_LINE_SIZE/4]); - pci_write_config_word(rinfo->pdev, PCI_COMMAND, + pci_write_config_word(rinfo->gpu_info->pdev, PCI_COMMAND, rinfo->cfg_save[PCI_COMMAND/4]); return 1; } - -int radeonfb_pci_suspend(struct pci_dev *pdev, pm_message_t state) +int radeonfb_gpu_suspend(struct device *dev, pm_message_t state) { - struct fb_info *info = pci_get_drvdata(pdev); - struct radeonfb_info *rinfo = info->par; + struct gpu_device *gdev = to_gpu_device(dev); + struct fb_info *info = gpu_get_drvdata(gdev); + struct radeonfb_info *rinfo = info->par; + struct pci_dev *pdev = rinfo->gpu_info->pdev; int i; if (state.event == pdev->dev.power.power_state.event) @@ -2581,7 +2582,7 @@ #endif /* CONFIG_PPC_PMAC */ mdelay(50); radeon_pm_save_regs(rinfo, 1); - if (rinfo->is_mobility && !(rinfo->pm_mode & radeon_pm_d2)) { + if (rinfo->gpu_info->is_mobility && !(rinfo->pm_mode & radeon_pm_d2)) { /* Switch off LVDS interface */ mdelay(1); OUTREG(LVDS_GEN_CNTL, INREG(LVDS_GEN_CNTL) & ~(LVDS_BL_MOD_EN)); @@ -2610,10 +2611,12 @@ #endif /* CONFIG_PPC_PMAC */ return 0; } -int radeonfb_pci_resume(struct pci_dev *pdev) +int radeonfb_gpu_resume(struct device *dev) { - struct fb_info *info = pci_get_drvdata(pdev); - struct radeonfb_info *rinfo = info->par; + struct gpu_device *gdev = to_gpu_device(dev); + struct fb_info *info = gpu_get_drvdata(gdev); + struct radeonfb_info *rinfo = info->par; + struct pci_dev *pdev = rinfo->gpu_info->pdev; int rc = 0; if (pdev->dev.power.power_state.event == PM_EVENT_ON) @@ -2716,7 +2719,7 @@ #endif /* CONFIG_PM */ void radeonfb_pm_init(struct radeonfb_info *rinfo, int dynclk) { /* Find PM registers in config space if any*/ - rinfo->pm_reg = pci_find_capability(rinfo->pdev, PCI_CAP_ID_PM); + rinfo->pm_reg = pci_find_capability(rinfo->gpu_info->pdev, PCI_CAP_ID_PM); /* Enable/Disable dynamic clocks: TODO add sysfs access */ rinfo->dynclk = dynclk; @@ -2737,17 +2740,17 @@ #if defined(CONFIG_PM) */ /* Special case for Samsung P35 laptops */ - if ((rinfo->pdev->vendor == PCI_VENDOR_ID_ATI) && - (rinfo->pdev->device == PCI_CHIP_RV350_NP) && - (rinfo->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG) && - (rinfo->pdev->subsystem_device == 0xc00c)) { + if ((rinfo->gpu_info->pdev->vendor == PCI_VENDOR_ID_ATI) && + (rinfo->gpu_info->pdev->device == PCI_CHIP_RV350_NP) && + (rinfo->gpu_info->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG) && + (rinfo->gpu_info->pdev->subsystem_device == 0xc00c)) { rinfo->reinit_func = radeon_reinitialize_M10; rinfo->pm_mode |= radeon_pm_off; } #if defined(CONFIG_PPC_PMAC) if (machine_is(powermac) && rinfo->of_node) { - if (rinfo->is_mobility && rinfo->pm_reg && - rinfo->family <= CHIP_FAMILY_RV250) + if (rinfo->gpu_info->is_mobility && rinfo->pm_reg && + rinfo->gpu_info->family <= CHIP_FAMILY_RV250) rinfo->pm_mode |= radeon_pm_d2; /* We can restart Jasper (M10 chip in albooks), BlueStone (7500 chip diff --git a/drivers/video/aty/radeonfb.h b/drivers/video/aty/radeonfb.h index 38657b2..2fa4ed3 100644 --- a/drivers/video/aty/radeonfb.h +++ b/drivers/video/aty/radeonfb.h @@ -20,6 +20,8 @@ #ifdef CONFIG_PPC_OF #include <asm/prom.h> #endif +#include <linux/gpu_layer.h> +#include <linux/radeon_gpu.h> #include <video/radeon.h> /*************************************************************** @@ -27,65 +29,6 @@ #include <video/radeon.h> ***************************************************************/ -/* - * Chip families. Must fit in the low 16 bits of a long word - */ -enum radeon_family { - CHIP_FAMILY_UNKNOW, - CHIP_FAMILY_LEGACY, - CHIP_FAMILY_RADEON, - CHIP_FAMILY_RV100, - CHIP_FAMILY_RS100, /* U1 (IGP320M) or A3 (IGP320)*/ - CHIP_FAMILY_RV200, - CHIP_FAMILY_RS200, /* U2 (IGP330M/340M/350M) or A4 (IGP330/340/345/350), - RS250 (IGP 7000) */ - CHIP_FAMILY_R200, - CHIP_FAMILY_RV250, - CHIP_FAMILY_RS300, /* Radeon 9000 IGP */ - CHIP_FAMILY_RV280, - CHIP_FAMILY_R300, - CHIP_FAMILY_R350, - CHIP_FAMILY_RV350, - CHIP_FAMILY_RV380, /* RV370/RV380/M22/M24 */ - CHIP_FAMILY_R420, /* R420/R423/M18 */ - CHIP_FAMILY_LAST, -}; - -#define IS_RV100_VARIANT(rinfo) (((rinfo)->family == CHIP_FAMILY_RV100) || \ - ((rinfo)->family == CHIP_FAMILY_RV200) || \ - ((rinfo)->family == CHIP_FAMILY_RS100) || \ - ((rinfo)->family == CHIP_FAMILY_RS200) || \ - ((rinfo)->family == CHIP_FAMILY_RV250) || \ - ((rinfo)->family == CHIP_FAMILY_RV280) || \ - ((rinfo)->family == CHIP_FAMILY_RS300)) - - -#define IS_R300_VARIANT(rinfo) (((rinfo)->family == CHIP_FAMILY_R300) || \ - ((rinfo)->family == CHIP_FAMILY_RV350) || \ - ((rinfo)->family == CHIP_FAMILY_R350) || \ - ((rinfo)->family == CHIP_FAMILY_RV380) || \ - ((rinfo)->family == CHIP_FAMILY_R420)) - -/* - * Chip flags - */ -enum radeon_chip_flags { - CHIP_FAMILY_MASK = 0x0000ffffUL, - CHIP_FLAGS_MASK = 0xffff0000UL, - CHIP_IS_MOBILITY = 0x00010000UL, - CHIP_IS_IGP = 0x00020000UL, - CHIP_HAS_CRTC2 = 0x00040000UL, -}; - -/* - * Errata workarounds - */ -enum radeon_errata { - CHIP_ERRATA_R300_CG = 0x00000001, - CHIP_ERRATA_PLL_DUMMYREADS = 0x00000002, - CHIP_ERRATA_PLL_DELAY = 0x00000004, -}; - /* * Monitor types @@ -276,20 +219,18 @@ enum radeon_pm_mode { struct radeonfb_info { struct fb_info *info; + struct radeon_gpu_info *gpu_info; struct radeon_regs state; struct radeon_regs init_state; + struct gpu_device *gdev; char name[DEVICE_NAME_SIZE]; - unsigned long mmio_base_phys; - unsigned long fb_base_phys; - void __iomem *mmio_base; void __iomem *fb_base; unsigned long fb_local_base; - struct pci_dev *pdev; #ifdef CONFIG_PPC_OF struct device_node *of_node; #endif @@ -301,10 +242,6 @@ #endif struct { u8 red, green, blue, pad; } palette[256]; - int chipset; - u8 family; - u8 rev; - unsigned int errata; unsigned long video_ram; unsigned long mapped_vram; int vram_width; @@ -312,9 +249,6 @@ #endif int pitch, bpp, depth; - int has_CRTC2; - int is_mobility; - int is_IGP; int reversed_DAC; int reversed_TMDS; struct panel_info panel_info; @@ -435,7 +369,7 @@ #define OUTREGP(addr,val,mask) _OUTREGP( */ static inline void radeon_pll_errata_after_index(struct radeonfb_info *rinfo) { - if (!(rinfo->errata & CHIP_ERRATA_PLL_DUMMYREADS)) + if (!(rinfo->gpu_info->errata & CHIP_ERRATA_PLL_DUMMYREADS)) return; (void)INREG(CLOCK_CNTL_DATA); @@ -444,11 +378,11 @@ static inline void radeon_pll_errata_aft static inline void radeon_pll_errata_after_data(struct radeonfb_info *rinfo) { - if (rinfo->errata & CHIP_ERRATA_PLL_DELAY) { + if (rinfo->gpu_info->errata & CHIP_ERRATA_PLL_DELAY) { /* we can't deal with posted writes here ... */ _radeon_msleep(rinfo, 5); } - if (rinfo->errata & CHIP_ERRATA_R300_CG) { + if (rinfo->gpu_info->errata & CHIP_ERRATA_R300_CG) { u32 save, tmp; save = INREG(CLOCK_CNTL_INDEX); tmp = save & ~(0x3f | PLL_WR_EN); @@ -598,8 +532,8 @@ extern void radeon_delete_i2c_busses(str extern int radeon_probe_i2c_connector(struct radeonfb_info *rinfo, int conn, u8 **out_edid); /* PM Functions */ -extern int radeonfb_pci_suspend(struct pci_dev *pdev, pm_message_t state); -extern int radeonfb_pci_resume(struct pci_dev *pdev); +extern int radeonfb_gpu_suspend(struct device *dev, pm_message_t state); +extern int radeonfb_gpu_resume(struct device *dev); extern void radeonfb_pm_init(struct radeonfb_info *rinfo, int dynclk); extern void radeonfb_pm_exit(struct radeonfb_info *rinfo); -- 1.4.1.ga3e6 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH] gpu/drm: Add GPU layer support to generic DRM (06/07) 2006-07-22 15:38 ` [PATCH] gpu/radeonfb: add GPU support to radeonfb (05/07) Dave Airlie @ 2006-07-22 15:38 ` Dave Airlie 2006-07-22 15:38 ` [PATCH] drm/gpu/radeon: Add radeon DRM support to use GPU layer (07/07) Dave Airlie 0 siblings, 1 reply; 16+ messages in thread From: Dave Airlie @ 2006-07-22 15:38 UTC (permalink / raw) To: linux-kernel; +Cc: Dave Airlie This patch adds the GPU layer support to the drm library. It doesn't touch any drivers just adds the gpu layer to the drm code. Signed-off-by: Dave Airlie <airlied@linux.ie> --- drivers/char/drm/Makefile | 2 + drivers/char/drm/drmP.h | 16 ++++++++++ drivers/char/drm/drm_drv.c | 10 +++++-- drivers/char/drm/drm_gpu.c | 63 +++++++++++++++++++++++++++++++++++++++++ drivers/char/drm/drm_ioctl.c | 8 +++-- drivers/char/drm/drm_memory.c | 1 + drivers/char/drm/drm_stub.c | 31 +++++++++----------- drivers/char/drm/drm_sysfs.c | 14 +++++++-- 8 files changed, 116 insertions(+), 29 deletions(-) diff --git a/drivers/char/drm/Makefile b/drivers/char/drm/Makefile index 9d180c4..150d735 100644 --- a/drivers/char/drm/Makefile +++ b/drivers/char/drm/Makefile @@ -6,7 +6,7 @@ drm-objs := drm_auth.o drm_bufs.o drm drm_drv.o drm_fops.o drm_ioctl.o drm_irq.o \ drm_lock.o drm_memory.o drm_proc.o drm_stub.o drm_vm.o \ drm_agpsupport.o drm_scatter.o ati_pcigart.o drm_pci.o \ - drm_sysfs.o + drm_sysfs.o drm_gpu.o tdfx-objs := tdfx_drv.o r128-objs := r128_drv.o r128_cce.o r128_state.o r128_irq.o diff --git a/drivers/char/drm/drmP.h b/drivers/char/drm/drmP.h index 4dd28e1..ae590d5 100644 --- a/drivers/char/drm/drmP.h +++ b/drivers/char/drm/drmP.h @@ -52,6 +52,7 @@ #include <linux/proc_fs.h> #include <linux/init.h> #include <linux/file.h> #include <linux/pci.h> +#include <linux/gpu_layer.h> #include <linux/jiffies.h> #include <linux/smp_lock.h> /* For (un)lock_kernel */ #include <linux/mm.h> @@ -532,6 +533,10 @@ typedef struct ati_pcigart_info { * a family of cards. There will one drm_device for each card present * in this family */ + +#define DRM_DRV_PCI 1 +#define DRM_DRV_GPU 2 + struct drm_device; struct drm_driver { @@ -592,6 +597,9 @@ struct drm_driver { drm_ioctl_desc_t *ioctls; int num_ioctls; struct file_operations fops; + int drv_type; + + struct gpu_driver gpu_driver; struct pci_driver pci_driver; }; @@ -710,6 +718,8 @@ typedef struct drm_device { drm_agp_head_t *agp; /**< AGP data */ + /* a pointer to the GPU device */ + struct gpu_device *gdev; struct pci_dev *pdev; /**< PCI device structure */ #ifdef __alpha__ struct pci_controller *hose; @@ -791,9 +801,12 @@ #endif /******************************************************************/ /** \name Internal function definitions */ /*@{*/ +extern void drm_gpu_cleanup(struct gpu_device *gdev); +extern int drm_gpu_get_dev(struct gpu_device *gdev, struct drm_driver *driver, void *driver_id, struct pci_dev *pdev); /* Driver support (drm_drv.h) */ extern int drm_init(struct drm_driver *driver); +extern void drm_cleanup(drm_device_t * dev); extern void drm_exit(struct drm_driver *driver); extern int drm_ioctl(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg); @@ -972,9 +985,12 @@ extern int drm_agp_bind_memory(DRM_AGP_M extern int drm_agp_unbind_memory(DRM_AGP_MEM * handle); /* Stub support (drm_stub.h) */ +extern int drm_fill_in_dev(drm_device_t * dev, unsigned long driver_data, + struct drm_driver *driver); extern int drm_get_dev(struct pci_dev *pdev, const struct pci_device_id *ent, struct drm_driver *driver); extern int drm_put_dev(drm_device_t * dev); +extern int drm_get_head(drm_device_t * dev, drm_head_t * head); extern int drm_put_head(drm_head_t * head); extern unsigned int drm_debug; extern unsigned int drm_cards_limit; diff --git a/drivers/char/drm/drm_drv.c b/drivers/char/drm/drm_drv.c index 3c0b882..04443d0 100644 --- a/drivers/char/drm/drm_drv.c +++ b/drivers/char/drm/drm_drv.c @@ -260,6 +260,8 @@ int drm_init(struct drm_driver *driver) drm_mem_init(); + driver->drv_type = DRM_DRV_PCI; + for (i = 0; driver->pci_driver.id_table[i].vendor != 0; i++) { pid = (struct pci_device_id *)&driver->pci_driver.id_table[i]; @@ -285,7 +287,7 @@ EXPORT_SYMBOL(drm_init); * * \sa drm_init */ -static void drm_cleanup(drm_device_t * dev) +void drm_cleanup(drm_device_t * dev) { DRM_DEBUG("\n"); @@ -344,8 +346,10 @@ void drm_exit(struct drm_driver *driver) dev = head->dev; if (dev) { /* release the pci driver */ - if (dev->pdev) - pci_dev_put(dev->pdev); + if (dev->pdev && (dev->driver->drv_type == DRM_DRV_PCI)) { + if (dev->pdev) + pci_dev_put(dev->pdev); + } drm_cleanup(dev); } } diff --git a/drivers/char/drm/drm_gpu.c b/drivers/char/drm/drm_gpu.c new file mode 100644 index 0000000..1ab750a --- /dev/null +++ b/drivers/char/drm/drm_gpu.c @@ -0,0 +1,63 @@ +/* + * drivers/char/drm/drm_gpu.c + * + * Copyright (C) Dave Airlie <airlied@linux.ie> + * + * Unlike the rest of the DRM this is actually GPL licensed + * as it doesn't make much sense for it to be MIT. + */ +#include "drmP.h" + +/* DRM GPU Interface layer */ + +int drm_gpu_get_dev(struct gpu_device *gdev, struct drm_driver *driver, void *driver_id, struct pci_dev *pdev) +{ + drm_device_t *dev; + int ret; + struct pci_device_id *id = (struct pci_device_id *)driver_id; + unsigned long driver_data = id->driver_data; + + DRM_DEBUG("\n"); + + dev = drm_calloc(1, sizeof(*dev), DRM_MEM_STUB); + if (!dev) + return -ENOMEM; + + dev->gdev = gdev; + dev->pdev = pdev; +#ifdef __alpha__ + dev->hose = pdev->sysdata; +#endif + dev->irq = pdev->irq; + + if ((ret = drm_fill_in_dev(dev, driver_data, driver))) { + printk(KERN_ERR "DRM: Fill_in_dev failed.\n"); + goto err_g1; + } + + if ((ret = drm_get_head(dev, &dev->primary))) + goto err_g1; + + gpu_set_drvdata(gdev, dev); + + DRM_INFO("Initialized GPU %s %d.%d.%d %s on minor %d\n", + driver->name, driver->major, driver->minor, driver->patchlevel, + driver->date, dev->primary.minor); + return 0; + +err_g1: + drm_free(dev, sizeof(*dev), DRM_MEM_STUB); + return 0; +} +EXPORT_SYMBOL(drm_gpu_get_dev); + +void drm_gpu_cleanup(struct gpu_device *gdev) +{ + drm_device_t *dev = gpu_get_drvdata(gdev); + + gpu_set_drvdata(gdev, NULL); + if (dev) + drm_cleanup(dev); +} +EXPORT_SYMBOL(drm_gpu_cleanup); + diff --git a/drivers/char/drm/drm_ioctl.c b/drivers/char/drm/drm_ioctl.c index 9d9f988..74fb274 100644 --- a/drivers/char/drm/drm_ioctl.c +++ b/drivers/char/drm/drm_ioctl.c @@ -110,12 +110,12 @@ int drm_setunique(struct inode *inode, s dev->unique[dev->unique_len] = '\0'; dev->devname = - drm_alloc(strlen(dev->driver->pci_driver.name) + + drm_alloc(strlen(dev->driver->name) + strlen(dev->unique) + 2, DRM_MEM_DRIVER); if (!dev->devname) return -ENOMEM; - sprintf(dev->devname, "%s@%s", dev->driver->pci_driver.name, + sprintf(dev->devname, "%s@%s", dev->driver->name, dev->unique); /* Return error if the busid submitted doesn't match the device's actual @@ -157,12 +157,12 @@ static int drm_set_busid(drm_device_t * DRM_ERROR("Unique buffer overflowed\n"); dev->devname = - drm_alloc(strlen(dev->driver->pci_driver.name) + dev->unique_len + + drm_alloc(strlen(dev->driver->name) + dev->unique_len + 2, DRM_MEM_DRIVER); if (dev->devname == NULL) return ENOMEM; - sprintf(dev->devname, "%s@%s", dev->driver->pci_driver.name, + sprintf(dev->devname, "%s@%s", dev->driver->name, dev->unique); return 0; diff --git a/drivers/char/drm/drm_memory.c b/drivers/char/drm/drm_memory.c index 5681cae..96d962d 100644 --- a/drivers/char/drm/drm_memory.c +++ b/drivers/char/drm/drm_memory.c @@ -44,6 +44,7 @@ #else void drm_mem_init(void) { } +EXPORT_SYMBOL(drm_mem_init); /** * Called when "/proc/dri/%dev%/mem" is read. diff --git a/drivers/char/drm/drm_stub.c b/drivers/char/drm/drm_stub.c index 96449d5..b2e63c8 100644 --- a/drivers/char/drm/drm_stub.c +++ b/drivers/char/drm/drm_stub.c @@ -53,9 +53,8 @@ drm_head_t **drm_heads; struct class *drm_class; struct proc_dir_entry *drm_proc_root; -static int drm_fill_in_dev(drm_device_t * dev, struct pci_dev *pdev, - const struct pci_device_id *ent, - struct drm_driver *driver) +int drm_fill_in_dev(drm_device_t * dev, unsigned long driver_data, + struct drm_driver *driver) { int retcode; @@ -64,16 +63,6 @@ static int drm_fill_in_dev(drm_device_t mutex_init(&dev->struct_mutex); mutex_init(&dev->ctxlist_mutex); - dev->pdev = pdev; - -#ifdef __alpha__ - dev->hose = pdev->sysdata; - dev->pci_domain = dev->hose->bus->number; -#else - dev->pci_domain = 0; -#endif - dev->irq = pdev->irq; - dev->maplist = drm_calloc(1, sizeof(*dev->maplist), DRM_MEM_MAPS); if (dev->maplist == NULL) return -ENOMEM; @@ -91,7 +80,7 @@ #endif dev->driver = driver; if (dev->driver->load) - if ((retcode = dev->driver->load(dev, ent->driver_data))) + if ((retcode = dev->driver->load(dev, driver_data))) goto error_out_unreg; if (drm_core_has_AGP(dev)) { @@ -137,7 +126,7 @@ #endif * create the proc init entry via proc_init(). This routines assigns * minor numbers to secondary heads of multi-headed cards */ -static int drm_get_head(drm_device_t * dev, drm_head_t * head) +int drm_get_head(drm_device_t * dev, drm_head_t * head) { drm_head_t **heads = drm_heads; int ret; @@ -208,14 +197,22 @@ int drm_get_dev(struct pci_dev *pdev, co pci_enable_device(pdev); - if ((ret = drm_fill_in_dev(dev, pdev, ent, driver))) { + /* setup up PCI pointers */ + dev->pdev = pdev; + +#ifdef __alpha__ + dev->hose = pdev->sysdata; +#endif + dev->irq = pdev->irq; + + if ((ret = drm_fill_in_dev(dev, ent->driver_data, driver))) { printk(KERN_ERR "DRM: Fill_in_dev failed.\n"); goto err_g1; } if ((ret = drm_get_head(dev, &dev->primary))) goto err_g1; - DRM_INFO("Initialized %s %d.%d.%d %s on minor %d\n", + DRM_INFO("Initialized PCI %s %d.%d.%d %s on minor %d\n", driver->name, driver->major, driver->minor, driver->patchlevel, driver->date, dev->primary.minor); diff --git a/drivers/char/drm/drm_sysfs.c b/drivers/char/drm/drm_sysfs.c index 51ad98c..eff610c 100644 --- a/drivers/char/drm/drm_sysfs.c +++ b/drivers/char/drm/drm_sysfs.c @@ -98,10 +98,16 @@ struct class_device *drm_sysfs_device_ad struct class_device *class_dev; int i; - class_dev = class_device_create(cs, NULL, - MKDEV(DRM_MAJOR, head->minor), - &(head->dev->pdev)->dev, - "card%d", head->minor); + if (head->dev->driver->drv_type == DRM_DRV_PCI) + class_dev = class_device_create(cs, NULL, + MKDEV(DRM_MAJOR, head->minor), + &(head->dev->pdev)->dev, + "card%d", head->minor); + else + class_dev = class_device_create(cs, NULL, + MKDEV(DRM_MAJOR, head->minor), + &(head->dev->gdev)->dev, + "card%d", head->minor); if (!class_dev) return NULL; -- 1.4.1.ga3e6 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH] drm/gpu/radeon: Add radeon DRM support to use GPU layer (07/07) 2006-07-22 15:38 ` [PATCH] gpu/drm: Add GPU layer support to generic DRM (06/07) Dave Airlie @ 2006-07-22 15:38 ` Dave Airlie 0 siblings, 0 replies; 16+ messages in thread From: Dave Airlie @ 2006-07-22 15:38 UTC (permalink / raw) To: linux-kernel; +Cc: Dave Airlie This ports the radeon DRM to use the GPU layer to bind to the PCI device. Signed-off-by: Dave Airlie <airlied@linux.ie> --- drivers/char/drm/Kconfig | 1 drivers/char/drm/drm_pciids.h | 178 ++++++++++++++++++++------------------- drivers/char/drm/radeon_cp.c | 40 ++++----- drivers/char/drm/radeon_drv.c | 60 +++++++++++-- drivers/char/drm/radeon_drv.h | 22 ++--- drivers/char/drm/radeon_state.c | 10 +- 6 files changed, 178 insertions(+), 133 deletions(-) diff --git a/drivers/char/drm/Kconfig b/drivers/char/drm/Kconfig index 5278c38..d73cda7 100644 --- a/drivers/char/drm/Kconfig +++ b/drivers/char/drm/Kconfig @@ -34,6 +34,7 @@ config DRM_R128 config DRM_RADEON tristate "ATI Radeon" depends on DRM && PCI + select GPU_RADEON help Choose this option if you have an ATI Radeon graphics card. There are both PCI and AGP versions. You don't need to choose this to diff --git a/drivers/char/drm/drm_pciids.h b/drivers/char/drm/drm_pciids.h index b1bb3c7..dedfa93 100644 --- a/drivers/char/drm/drm_pciids.h +++ b/drivers/char/drm/drm_pciids.h @@ -3,13 +3,13 @@ Please contact dri-devel@lists.sf.net to add new cards to this list */ #define radeon_PCI_IDS \ - {0x1002, 0x3150, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|CHIP_IS_MOBILITY}, \ - {0x1002, 0x3152, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|CHIP_IS_MOBILITY|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x3154, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|CHIP_IS_MOBILITY|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x3E50, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x3E54, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x4136, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS100|CHIP_IS_IGP}, \ - {0x1002, 0x4137, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS200|CHIP_IS_IGP}, \ + {0x1002, 0x3150, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY}, \ + {0x1002, 0x3152, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x3154, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x3E50, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x3E54, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x4136, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS100|RADEON_IS_IGP}, \ + {0x1002, 0x4137, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS200|RADEON_IS_IGP}, \ {0x1002, 0x4144, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R300}, \ {0x1002, 0x4145, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R300}, \ {0x1002, 0x4146, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R300}, \ @@ -25,35 +25,35 @@ #define radeon_PCI_IDS \ {0x1002, 0x4154, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350}, \ {0x1002, 0x4155, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350}, \ {0x1002, 0x4156, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350}, \ - {0x1002, 0x4237, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS200|CHIP_IS_IGP}, \ + {0x1002, 0x4237, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS200|RADEON_IS_IGP}, \ {0x1002, 0x4242, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R200}, \ {0x1002, 0x4243, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R200}, \ - {0x1002, 0x4336, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS100|CHIP_IS_IGP|CHIP_IS_MOBILITY}, \ - {0x1002, 0x4337, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS200|CHIP_IS_IGP|CHIP_IS_MOBILITY}, \ - {0x1002, 0x4437, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS200|CHIP_IS_IGP|CHIP_IS_MOBILITY}, \ + {0x1002, 0x4336, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS100|RADEON_IS_IGP|RADEON_IS_MOBILITY}, \ + {0x1002, 0x4337, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS200|RADEON_IS_IGP|RADEON_IS_MOBILITY}, \ + {0x1002, 0x4437, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS200|RADEON_IS_IGP|RADEON_IS_MOBILITY}, \ {0x1002, 0x4966, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV250}, \ {0x1002, 0x4967, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV250}, \ - {0x1002, 0x4A48, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x4A49, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x4A4A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x4A4B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x4A4C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x4A4D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x4A4E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_IS_MOBILITY|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x4A4F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x4A50, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x4A54, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x4B49, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x4B4A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x4B4B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x4B4C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x4C57, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV200|CHIP_IS_MOBILITY}, \ - {0x1002, 0x4C58, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV200|CHIP_IS_MOBILITY}, \ - {0x1002, 0x4C59, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV100|CHIP_IS_MOBILITY}, \ - {0x1002, 0x4C5A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV100|CHIP_IS_MOBILITY}, \ - {0x1002, 0x4C64, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV250|CHIP_IS_MOBILITY}, \ - {0x1002, 0x4C66, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV250|CHIP_IS_MOBILITY}, \ - {0x1002, 0x4C67, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV250|CHIP_IS_MOBILITY}, \ + {0x1002, 0x4A48, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x4A49, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x4A4A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x4A4B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x4A4C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x4A4D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x4A4E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x4A4F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x4A50, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x4A54, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x4B49, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x4B4A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x4B4B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x4B4C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x4C57, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV200|RADEON_IS_MOBILITY}, \ + {0x1002, 0x4C58, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV200|RADEON_IS_MOBILITY}, \ + {0x1002, 0x4C59, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV100|RADEON_IS_MOBILITY}, \ + {0x1002, 0x4C5A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV100|RADEON_IS_MOBILITY}, \ + {0x1002, 0x4C64, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV250|RADEON_IS_MOBILITY}, \ + {0x1002, 0x4C66, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV250|RADEON_IS_MOBILITY}, \ + {0x1002, 0x4C67, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV250|RADEON_IS_MOBILITY}, \ {0x1002, 0x4E44, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R300}, \ {0x1002, 0x4E45, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R300}, \ {0x1002, 0x4E46, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R300}, \ @@ -62,16 +62,16 @@ #define radeon_PCI_IDS \ {0x1002, 0x4E49, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R350}, \ {0x1002, 0x4E4A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R350}, \ {0x1002, 0x4E4B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R350}, \ - {0x1002, 0x4E50, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350|CHIP_IS_MOBILITY}, \ - {0x1002, 0x4E51, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350|CHIP_IS_MOBILITY}, \ - {0x1002, 0x4E52, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350|CHIP_IS_MOBILITY}, \ - {0x1002, 0x4E53, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350|CHIP_IS_MOBILITY}, \ - {0x1002, 0x4E54, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350|CHIP_IS_MOBILITY}, \ - {0x1002, 0x4E56, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350|CHIP_IS_MOBILITY}, \ - {0x1002, 0x5144, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R100|CHIP_SINGLE_CRTC}, \ - {0x1002, 0x5145, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R100|CHIP_SINGLE_CRTC}, \ - {0x1002, 0x5146, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R100|CHIP_SINGLE_CRTC}, \ - {0x1002, 0x5147, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R100|CHIP_SINGLE_CRTC}, \ + {0x1002, 0x4E50, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350|RADEON_IS_MOBILITY}, \ + {0x1002, 0x4E51, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350|RADEON_IS_MOBILITY}, \ + {0x1002, 0x4E52, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350|RADEON_IS_MOBILITY}, \ + {0x1002, 0x4E53, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350|RADEON_IS_MOBILITY}, \ + {0x1002, 0x4E54, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350|RADEON_IS_MOBILITY}, \ + {0x1002, 0x4E56, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350|RADEON_IS_MOBILITY}, \ + {0x1002, 0x5144, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R100|RADEON_SINGLE_CRTC}, \ + {0x1002, 0x5145, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R100|RADEON_SINGLE_CRTC}, \ + {0x1002, 0x5146, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R100|RADEON_SINGLE_CRTC}, \ + {0x1002, 0x5147, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R100|RADEON_SINGLE_CRTC}, \ {0x1002, 0x5148, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R200}, \ {0x1002, 0x514C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R200}, \ {0x1002, 0x514D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R200}, \ @@ -80,59 +80,59 @@ #define radeon_PCI_IDS \ {0x1002, 0x5159, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV100}, \ {0x1002, 0x515A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV100}, \ {0x1002, 0x515E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV100}, \ - {0x1002, 0x5460, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|CHIP_IS_MOBILITY}, \ - {0x1002, 0x5462, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|CHIP_IS_MOBILITY}, \ - {0x1002, 0x5464, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|CHIP_IS_MOBILITY}, \ - {0x1002, 0x5548, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x5549, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x554A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x554B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x554C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x554D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x554E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x554F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x5550, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x5551, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x5552, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x5554, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x564A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|CHIP_IS_MOBILITY|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x564B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|CHIP_IS_MOBILITY|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x564F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|CHIP_IS_MOBILITY|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x5652, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|CHIP_IS_MOBILITY|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x5653, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|CHIP_IS_MOBILITY|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x5834, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS300|CHIP_IS_IGP}, \ - {0x1002, 0x5835, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS300|CHIP_IS_IGP|CHIP_IS_MOBILITY}, \ + {0x1002, 0x5460, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY}, \ + {0x1002, 0x5462, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY}, \ + {0x1002, 0x5464, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY}, \ + {0x1002, 0x5548, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x5549, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x554A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x554B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x554C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x554D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x554E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x554F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x5550, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x5551, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x5552, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x5554, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x564A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x564B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x564F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x5652, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x5653, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x5834, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS300|RADEON_IS_IGP}, \ + {0x1002, 0x5835, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS300|RADEON_IS_IGP|RADEON_IS_MOBILITY}, \ {0x1002, 0x5960, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280}, \ {0x1002, 0x5961, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280}, \ {0x1002, 0x5962, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280}, \ {0x1002, 0x5964, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280}, \ {0x1002, 0x5965, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280}, \ {0x1002, 0x5969, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV100}, \ - {0x1002, 0x5b60, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x5b62, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x5b63, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x5b64, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x5b65, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x5c61, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280|CHIP_IS_MOBILITY}, \ - {0x1002, 0x5c63, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280|CHIP_IS_MOBILITY}, \ - {0x1002, 0x5d48, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_IS_MOBILITY|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x5d49, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_IS_MOBILITY|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x5d4a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_IS_MOBILITY|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x5d4c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x5d4d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x5d4e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x5d4f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x5d50, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x5d52, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x5d57, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x5e48, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x5e4a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x5e4b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x5e4c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x5e4d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x5e4f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x7834, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS300|CHIP_IS_IGP|CHIP_NEW_MEMMAP}, \ - {0x1002, 0x7835, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS300|CHIP_IS_IGP|CHIP_IS_MOBILITY|CHIP_NEW_MEMMAP}, \ + {0x1002, 0x5b60, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x5b62, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x5b63, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x5b64, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x5b65, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x5c61, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280|RADEON_IS_MOBILITY}, \ + {0x1002, 0x5c63, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280|RADEON_IS_MOBILITY}, \ + {0x1002, 0x5d48, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x5d49, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x5d4a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x5d4c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x5d4d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x5d4e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x5d4f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x5d50, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x5d52, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x5d57, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x5e48, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x5e4a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x5e4b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x5e4c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x5e4d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x5e4f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x7834, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS300|RADEON_IS_IGP|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x7835, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS300|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ {0, 0, 0} #define r128_PCI_IDS \ diff --git a/drivers/char/drm/radeon_cp.c b/drivers/char/drm/radeon_cp.c index 5ad43ba..37fbbfe 100644 --- a/drivers/char/drm/radeon_cp.c +++ b/drivers/char/drm/radeon_cp.c @@ -1130,7 +1130,7 @@ static void radeon_cp_init_ring_buffer(d | (dev_priv->fb_location >> 16)); #if __OS_HAS_AGP - if (dev_priv->flags & CHIP_IS_AGP) { + if (dev_priv->flags & RADEON_IS_AGP) { RADEON_WRITE(RADEON_AGP_BASE, (unsigned int)dev->agp->base); RADEON_WRITE(RADEON_MC_AGP_LOCATION, (((dev_priv->gart_vm_start - 1 + @@ -1158,7 +1158,7 @@ #endif dev_priv->ring.tail = cur_read_ptr; #if __OS_HAS_AGP - if (dev_priv->flags & CHIP_IS_AGP) { + if (dev_priv->flags & RADEON_IS_AGP) { RADEON_WRITE(RADEON_CP_RB_RPTR_ADDR, dev_priv->ring_rptr->offset - dev->agp->base + dev_priv->gart_vm_start); @@ -1295,7 +1295,7 @@ static void radeon_set_pcigart(drm_radeo { u32 tmp; - if (dev_priv->flags & CHIP_IS_PCIE) { + if (dev_priv->flags & RADEON_IS_PCIE) { radeon_set_pciegart(dev_priv, on); return; } @@ -1333,20 +1333,20 @@ static int radeon_do_init_cp(drm_device_ DRM_DEBUG("\n"); /* if we require new memory map but we don't have it fail */ - if ((dev_priv->flags & CHIP_NEW_MEMMAP) && !dev_priv->new_memmap) + if ((dev_priv->flags & RADEON_NEW_MEMMAP) && !dev_priv->new_memmap) { DRM_ERROR("Cannot initialise DRM on this card\nThis card requires a new X.org DDX\n"); radeon_do_cleanup_cp(dev); return DRM_ERR(EINVAL); } - if (init->is_pci && (dev_priv->flags & CHIP_IS_AGP)) + if (init->is_pci && (dev_priv->flags & RADEON_IS_AGP)) { DRM_DEBUG("Forcing AGP card to PCI mode\n"); - dev_priv->flags &= ~CHIP_IS_AGP; + dev_priv->flags &= ~RADEON_IS_AGP; } - if ((!(dev_priv->flags & CHIP_IS_AGP)) && !dev->sg) { + if ((!(dev_priv->flags & RADEON_IS_AGP)) && !dev->sg) { DRM_ERROR("PCI GART memory not allocated!\n"); radeon_do_cleanup_cp(dev); return DRM_ERR(EINVAL); @@ -1489,7 +1489,7 @@ static int radeon_do_init_cp(drm_device_ init->sarea_priv_offset); #if __OS_HAS_AGP - if (dev_priv->flags & CHIP_IS_AGP) { + if (dev_priv->flags & RADEON_IS_AGP) { drm_core_ioremap(dev_priv->cp_ring, dev); drm_core_ioremap(dev_priv->ring_rptr, dev); drm_core_ioremap(dev->agp_buffer_map, dev); @@ -1548,7 +1548,7 @@ #endif * align it down. */ #if __OS_HAS_AGP - if (dev_priv->flags & CHIP_IS_AGP) { + if (dev_priv->flags & RADEON_IS_AGP) { base = dev->agp->base; /* Check if valid */ if ((base + dev_priv->gart_size) > dev_priv->fb_location && @@ -1578,7 +1578,7 @@ #endif } #if __OS_HAS_AGP - if (dev_priv->flags & CHIP_IS_AGP) + if (dev_priv->flags & RADEON_IS_AGP) dev_priv->gart_buffers_offset = (dev->agp_buffer_map->offset - dev->agp->base + dev_priv->gart_vm_start); @@ -1604,7 +1604,7 @@ #endif dev_priv->ring.high_mark = RADEON_RING_HIGH_MARK; #if __OS_HAS_AGP - if (dev_priv->flags & CHIP_IS_AGP) { + if (dev_priv->flags & RADEON_IS_AGP) { /* Turn off PCI GART */ radeon_set_pcigart(dev_priv, 0); } else @@ -1624,7 +1624,7 @@ #endif dev_priv->gart_info.mapping.handle; dev_priv->gart_info.is_pcie = - !!(dev_priv->flags & CHIP_IS_PCIE); + !!(dev_priv->flags & RADEON_IS_PCIE); dev_priv->gart_info.gart_table_location = DRM_ATI_GART_FB; @@ -1636,7 +1636,7 @@ #endif DRM_ATI_GART_MAIN; dev_priv->gart_info.addr = NULL; dev_priv->gart_info.bus_addr = 0; - if (dev_priv->flags & CHIP_IS_PCIE) { + if (dev_priv->flags & RADEON_IS_PCIE) { DRM_ERROR ("Cannot use PCI Express without GART in FB memory\n"); radeon_do_cleanup_cp(dev); @@ -1678,7 +1678,7 @@ static int radeon_do_cleanup_cp(drm_devi drm_irq_uninstall(dev); #if __OS_HAS_AGP - if (dev_priv->flags & CHIP_IS_AGP) { + if (dev_priv->flags & RADEON_IS_AGP) { if (dev_priv->cp_ring != NULL) { drm_core_ioremapfree(dev_priv->cp_ring, dev); dev_priv->cp_ring = NULL; @@ -1733,7 +1733,7 @@ static int radeon_do_resume_cp(drm_devic DRM_DEBUG("Starting radeon_do_resume_cp()\n"); #if __OS_HAS_AGP - if (dev_priv->flags & CHIP_IS_AGP) { + if (dev_priv->flags & RADEON_IS_AGP) { /* Turn off PCI GART */ radeon_set_pcigart(dev_priv, 0); } else @@ -2177,13 +2177,13 @@ int radeon_driver_load(struct drm_device dev->dev_private = (void *)dev_priv; dev_priv->flags = flags; - switch (flags & CHIP_FAMILY_MASK) { + switch (flags & RADEON_FAMILY_MASK) { case CHIP_R100: case CHIP_RV200: case CHIP_R200: case CHIP_R300: case CHIP_R420: - dev_priv->flags |= CHIP_HAS_HIERZ; + dev_priv->flags |= RADEON_HAS_HIERZ; break; default: /* all other chips have no hierarchical z buffer */ @@ -2191,13 +2191,13 @@ int radeon_driver_load(struct drm_device } if (drm_device_is_agp(dev)) - dev_priv->flags |= CHIP_IS_AGP; + dev_priv->flags |= RADEON_IS_AGP; if (drm_device_is_pcie(dev)) - dev_priv->flags |= CHIP_IS_PCIE; + dev_priv->flags |= RADEON_IS_PCIE; DRM_DEBUG("%s card detected\n", - ((dev_priv->flags & CHIP_IS_AGP) ? "AGP" : (((dev_priv->flags & CHIP_IS_PCIE) ? "PCIE" : "PCI")))); + ((dev_priv->flags & RADEON_IS_AGP) ? "AGP" : (((dev_priv->flags & RADEON_IS_PCIE) ? "PCIE" : "PCI")))); return ret; } diff --git a/drivers/char/drm/radeon_drv.c b/drivers/char/drm/radeon_drv.c index eb985c2..50b2e6a 100644 --- a/drivers/char/drm/radeon_drv.c +++ b/drivers/char/drm/radeon_drv.c @@ -31,6 +31,8 @@ #include "drmP.h" #include "drm.h" +#include <linux/pm.h> +#include <linux/radeon_gpu.h> #include "radeon_drm.h" #include "radeon_drv.h" @@ -44,7 +46,7 @@ module_param_named(no_wb, radeon_no_wb, static int dri_library_name(struct drm_device *dev, char *buf) { drm_radeon_private_t *dev_priv = dev->dev_private; - int family = dev_priv->flags & CHIP_FAMILY_MASK; + int family = dev_priv->flags & RADEON_FAMILY_MASK; return snprintf(buf, PAGE_SIZE, "%s\n", (family < CHIP_R200) ? "radeon" : @@ -52,10 +54,27 @@ static int dri_library_name(struct drm_d "r300")); } +static int __devinit radeondrm_gpu_register (struct gpu_device *gdev, void *driver_id); +static void __devexit radeondrm_gpu_unregister (struct gpu_device *gdev); + static struct pci_device_id pciidlist[] = { radeon_PCI_IDS }; +static int radeondrm_suspend(struct device *dev, pm_message_t state) +{ +// struct gpu_device *gdev = to_gpu_device(dev); + printk("%s: called\n", __FUNCTION__); + return 0; +} + +static int radeondrm_resume(struct device *dev) +{ +// struct gpu_device *gdev = to_gpu_device(dev); + printk("%s: called\n", __FUNCTION__); + return 0; +} + static struct drm_driver driver = { .driver_features = DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG | @@ -92,12 +111,18 @@ #ifdef CONFIG_COMPAT .compat_ioctl = radeon_compat_ioctl, #endif }, - - .pci_driver = { + .drv_type = DRM_DRV_GPU, + .gpu_driver = { .name = DRIVER_NAME, - .id_table = pciidlist, - }, - + .drv_type = GPU_DRM, + .driver = { + .suspend = radeondrm_suspend, + .resume = radeondrm_resume, + }, + .probe = radeondrm_gpu_register, + .remove = __devexit_p(radeondrm_gpu_unregister), + .id_table = (void *)pciidlist, + }, .name = DRIVER_NAME, .desc = DRIVER_DESC, .date = DRIVER_DATE, @@ -106,15 +131,34 @@ #endif .patchlevel = DRIVER_PATCHLEVEL, }; + +static int __devinit radeondrm_gpu_register(struct gpu_device *gdev, void *driver_id) +{ + int retval; + struct radeon_gpu_info *gpu_info; + + gpu_info = dev_get_drvdata(gdev->dev.parent); + + retval = drm_gpu_get_dev(gdev, &driver, driver_id, gpu_info->pdev); + return retval; +} + +static void __devexit radeondrm_gpu_unregister (struct gpu_device *gdev) +{ + drm_gpu_cleanup(gdev); +} + static int __init radeon_init(void) { driver.num_ioctls = radeon_max_ioctl; - return drm_init(&driver); + drm_mem_init(); + + return radeon_gpu_register_driver(&driver.gpu_driver, THIS_MODULE); } static void __exit radeon_exit(void) { - drm_exit(&driver); + gpu_unregister_driver(&driver.gpu_driver); } module_init(radeon_init); diff --git a/drivers/char/drm/radeon_drv.h b/drivers/char/drm/radeon_drv.h index e5a256f..e9e20b3 100644 --- a/drivers/char/drm/radeon_drv.h +++ b/drivers/char/drm/radeon_drv.h @@ -103,7 +103,7 @@ #define DRIVER_PATCHLEVEL 0 /* * Radeon chip families */ -enum radeon_family { +enum radeondrm_family { CHIP_R100, CHIP_RV100, CHIP_RS100, @@ -132,16 +132,16 @@ enum radeon_cp_microcode_version { /* * Chip flags */ -enum radeon_chip_flags { - CHIP_FAMILY_MASK = 0x0000ffffUL, - CHIP_FLAGS_MASK = 0xffff0000UL, - CHIP_IS_MOBILITY = 0x00010000UL, - CHIP_IS_IGP = 0x00020000UL, - CHIP_SINGLE_CRTC = 0x00040000UL, - CHIP_IS_AGP = 0x00080000UL, - CHIP_HAS_HIERZ = 0x00100000UL, - CHIP_IS_PCIE = 0x00200000UL, - CHIP_NEW_MEMMAP = 0x00400000UL, +enum radeondrm_chip_flags { + RADEON_FAMILY_MASK = 0x0000ffffUL, + RADEON_FLAGS_MASK = 0xffff0000UL, + RADEON_IS_MOBILITY = 0x00010000UL, + RADEON_IS_IGP = 0x00020000UL, + RADEON_SINGLE_CRTC = 0x00040000UL, + RADEON_IS_AGP = 0x00080000UL, + RADEON_HAS_HIERZ = 0x00100000UL, + RADEON_IS_PCIE = 0x00200000UL, + RADEON_NEW_MEMMAP = 0x00400000UL, }; #define GET_RING_HEAD(dev_priv) (dev_priv->writeback_works ? \ diff --git a/drivers/char/drm/radeon_state.c b/drivers/char/drm/radeon_state.c index 5bb2234..220e060 100644 --- a/drivers/char/drm/radeon_state.c +++ b/drivers/char/drm/radeon_state.c @@ -862,7 +862,7 @@ static void radeon_cp_dispatch_clear(drm */ dev_priv->sarea_priv->ctx_owner = 0; - if ((dev_priv->flags & CHIP_HAS_HIERZ) + if ((dev_priv->flags & RADEON_HAS_HIERZ) && (flags & RADEON_USE_HIERZ)) { /* FIXME : reverse engineer that for Rx00 cards */ /* FIXME : the mask supposedly contains low-res z values. So can't set @@ -907,7 +907,7 @@ static void radeon_cp_dispatch_clear(drm for (i = 0; i < nbox; i++) { int tileoffset, nrtilesx, nrtilesy, j; /* it looks like r200 needs rv-style clears, at least if hierz is not enabled? */ - if ((dev_priv->flags & CHIP_HAS_HIERZ) + if ((dev_priv->flags & RADEON_HAS_HIERZ) && !(dev_priv->microcode_version == UCODE_R200)) { /* FIXME : figure this out for r200 (when hierz is enabled). Or maybe r200 actually doesn't need to put the low-res z value into @@ -991,7 +991,7 @@ static void radeon_cp_dispatch_clear(drm } /* TODO don't always clear all hi-level z tiles */ - if ((dev_priv->flags & CHIP_HAS_HIERZ) + if ((dev_priv->flags & RADEON_HAS_HIERZ) && (dev_priv->microcode_version == UCODE_R200) && (flags & RADEON_USE_HIERZ)) /* r100 and cards without hierarchical z-buffer have no high-level z-buffer */ @@ -2982,9 +2982,9 @@ #endif break; case RADEON_PARAM_CARD_TYPE: - if (dev_priv->flags & CHIP_IS_PCIE) + if (dev_priv->flags & RADEON_IS_PCIE) value = RADEON_CARD_PCIE; - else if (dev_priv->flags & CHIP_IS_AGP) + else if (dev_priv->flags & RADEON_IS_AGP) value = RADEON_CARD_AGP; else value = RADEON_CARD_PCI; -- 1.4.1.ga3e6 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: [PATCH] gpu: Initial GPU layer addition. (03/07) 2006-07-22 15:38 ` [PATCH] gpu: Initial GPU layer addition. (03/07) Dave Airlie 2006-07-22 15:38 ` [PATCH] gpu/radeon: add a radeon lowlevel GPU driver (04/07) Dave Airlie @ 2006-07-22 19:54 ` Jesse Barnes 2006-07-22 21:04 ` Nix 2006-07-23 20:04 ` Luca 3 siblings, 0 replies; 16+ messages in thread From: Jesse Barnes @ 2006-07-22 19:54 UTC (permalink / raw) To: Dave Airlie; +Cc: linux-kernel On Saturday, July 22, 2006 8:38 am, Dave Airlie wrote: > +config GPU > + bool > + default n > + Does this change existing userspace ABI or just add a new one (via new files in sysfs)? If the latter, can this config option just be enabled by default or killed entirely, making the build dependent on the higher level CONFIG_DRM option? > +/* GPUs we manage */ > +LIST_HEAD(gpu_bus_list); > + > +/* used when allocating bus numbers */ > +#define GPU_MAXBUS 16 > +struct gpu_busmap { > + unsigned long busmap [GPU_MAXBUS / (8*sizeof (unsigned long))]; > +}; > +static struct gpu_busmap busmap; > + > +/* used when updating list of gpus */ > +DEFINE_MUTEX(gpu_bus_list_lock); Why 16? Isn't there only one logical 'GPU bus' on the system containing all the graphics devices? Or is this a limit on how many devices can be registered? Or is each device considered a GPU bus in itself? > + * This registers a GPU bus with the GPU layer, > + * it fills in a default bus match function, and adds the device to > the list + */ > +int gpu_register_bus(struct gpu_bus *bus) > +{ > + int busnum; > + > + mutex_lock(&gpu_bus_list_lock); > + > + busnum = find_next_zero_bit(busmap.busmap, GPU_MAXBUS, 1); > + if (busnum < GPU_MAXBUS) { > + set_bit(busnum, busmap.busmap); > + bus->busnum = busnum; > + } else { > + printk(KERN_ERR "%s: to many buses\n", "gpu"); > + mutex_unlock(&gpu_bus_list_lock); > + return -E2BIG; Is this the right return value or should it be -ENOSPC? Also, I think you mean "too" on the previous line (figured I'd metion it before the spelling nazis get to you :). Overall, seems like a nice layer to help with fb/drm coordination and possibly power management & suspend/resume. Thanks, Jesse ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH] gpu: Initial GPU layer addition. (03/07) 2006-07-22 15:38 ` [PATCH] gpu: Initial GPU layer addition. (03/07) Dave Airlie 2006-07-22 15:38 ` [PATCH] gpu/radeon: add a radeon lowlevel GPU driver (04/07) Dave Airlie 2006-07-22 19:54 ` [PATCH] gpu: Initial GPU layer addition. (03/07) Jesse Barnes @ 2006-07-22 21:04 ` Nix 2006-07-23 20:04 ` Luca 3 siblings, 0 replies; 16+ messages in thread From: Nix @ 2006-07-22 21:04 UTC (permalink / raw) To: Dave Airlie; +Cc: linux-kernel Nice stuff! A couple of total nits and a check to see if I'm understanding something. On 22 Jul 2006, Dave Airlie noted: > + * If the driver type matches thte device, call the bus match function. Typo. > + printk(KERN_ERR "%s: to many buses\n", "gpu"); Another typo. > +/** > + * gpu_alloc_devices > + * > + * Allocate and initialise the GPU sub-devices. > + */ > +int gpu_alloc_devices(struct gpu_bus *bus) > +{ > + struct gpu_device *dev; > + int i; > + > + for (i=0; i<bus->num_subdev; i++) { > + dev = kzalloc(sizeof(*dev), GFP_KERNEL); > + if (!dev) > + return -ENOMEM; > + > + bus = gpu_bus_get(bus); > + if (!bus) { > + kfree(dev); > + return -ENOMEM; > + } If we fall out of either of these paths, what does the bus look like? Does it end up with half its sub-devices on? (I don't *think* we end up leaking dev's allocated earlier....) > +/** > + * gpu_unregister_devices > + */ > +int gpu_unregister_devices(struct gpu_bus *bus) > +{ > + int i; > + > + for (i = 0; i < bus->num_subdev; i++) { > + struct gpu_device *gpu_dev = bus->devices[i]; > + > + device_del(&gpu_dev->dev); > + > + kfree(gpu_dev); > + bus->devices[i] = NULL; > + } > + return 0; > +} ... because I think this would still catch them. Am I right? -- `We're sysadmins. We deal with the inconceivable so often I can clearly see the need to define levels of inconceivability.' --- Rik Steenwinkel ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH] gpu: Initial GPU layer addition. (03/07) 2006-07-22 15:38 ` [PATCH] gpu: Initial GPU layer addition. (03/07) Dave Airlie ` (2 preceding siblings ...) 2006-07-22 21:04 ` Nix @ 2006-07-23 20:04 ` Luca 3 siblings, 0 replies; 16+ messages in thread From: Luca @ 2006-07-23 20:04 UTC (permalink / raw) To: linux-kernel; +Cc: Dave Airlie Dave Airlie <airlied@linux.ie> ha scritto: > diff --git a/drivers/video/gpu_layer.c b/drivers/video/gpu_layer.c > new file mode 100644 > index 0000000..36e7037 > --- /dev/null > +++ b/drivers/video/gpu_layer.c > @@ -0,0 +1,393 @@ > +/* > + * drivers/video/gpu_layer.c > + * > + * (C) Copyright Dave Airlie 2006 > + * > + */ > +#include <linux/device.h> > +#include <linux/list.h> > +#include <linux/mutex.h> > +#include <linux/pci.h> > +#include <linux/gpu_layer.h> > + > +/* GPUs we manage */ > +LIST_HEAD(gpu_bus_list); > + > +/* used when allocating bus numbers */ > +#define GPU_MAXBUS 16 > +struct gpu_busmap { > + unsigned long busmap [GPU_MAXBUS / (8*sizeof (unsigned long))]; > +}; 16 / (8 * 4) is zero (the same with sizeof(long) == 8). When doing bit ops on that zero-sized array you are probably corrupting the BSS. Luca -- Home: http://kronoz.cjb.net Recursion n.: See Recursion. ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH] drm: remove pci domain local copy (02/07) 2006-07-22 15:38 ` [PATCH] drm: remove pci domain local copy (02/07) Dave Airlie 2006-07-22 15:38 ` [PATCH] gpu: Initial GPU layer addition. (03/07) Dave Airlie @ 2006-07-22 16:34 ` Jeff Garzik 2006-07-22 16:53 ` Dave Airlie 1 sibling, 1 reply; 16+ messages in thread From: Jeff Garzik @ 2006-07-22 16:34 UTC (permalink / raw) To: Dave Airlie; +Cc: linux-kernel Dave Airlie wrote: > Just call a function to retrieve the pci domain, this isn't exactly > hotpath code. > > Signed-off-by: Dave Airlie <airlied@linux.ie> > (cherry picked from 01852d755753bbfcd5434c55d4d7375580f8338f commit) > --- > drivers/char/drm/drmP.h | 10 +++++++++- > drivers/char/drm/drm_ioctl.c | 4 ++-- > drivers/char/drm/drm_irq.c | 2 +- > 3 files changed, 12 insertions(+), 4 deletions(-) > > diff --git a/drivers/char/drm/drmP.h b/drivers/char/drm/drmP.h > index 5c8f245..4dd28e1 100644 > --- a/drivers/char/drm/drmP.h > +++ b/drivers/char/drm/drmP.h > @@ -711,7 +711,6 @@ typedef struct drm_device { > drm_agp_head_t *agp; /**< AGP data */ > > struct pci_dev *pdev; /**< PCI device structure */ > - int pci_domain; /**< PCI bus domain number */ > #ifdef __alpha__ > struct pci_controller *hose; > #endif > @@ -733,6 +732,15 @@ static __inline__ int drm_core_check_fea I would presume that hose goes away too? > +static inline int drm_get_pci_domain(struct drm_device *dev) > +{ > +#ifdef __alpha__ > + return dev->hose->bus->number; > +#else > + return 0; > +#endif > +} Please use the always-present pci_domain_nr() rather than inventing a DRM-specific function that does the same thing. Jeff ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH] drm: remove pci domain local copy (02/07) 2006-07-22 16:34 ` [PATCH] drm: remove pci domain local copy (02/07) Jeff Garzik @ 2006-07-22 16:53 ` Dave Airlie 0 siblings, 0 replies; 16+ messages in thread From: Dave Airlie @ 2006-07-22 16:53 UTC (permalink / raw) To: Jeff Garzik; +Cc: linux-kernel > I would presume that hose goes away too? Well not yet as I used it below... > >> +static inline int drm_get_pci_domain(struct drm_device *dev) >> +{ >> +#ifdef __alpha__ >> + return dev->hose->bus->number; >> +#else >> + return 0; >> +#endif >> +} > > Please use the always-present pci_domain_nr() rather than inventing a > DRM-specific function that does the same thing. Ah well I didn't know that existed, I merely was just moving some code in the DRM into another function in the DRM, it didn't occur that someone might have a generic function and not put it into the DRM code.. I'll look into it thanks, Dave. -- David Airlie, Software Engineer http://www.skynet.ie/~airlied / airlied at skynet.ie Linux kernel - DRI, VAX / pam_smb / ILUG ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [RFC] GPU device layer patchset (00/07) 2006-07-22 15:38 [RFC] GPU device layer patchset (00/07) Dave Airlie 2006-07-22 15:38 ` [PATCH] drm: remove local copies of pci bus/slot/func (01/07) Dave Airlie @ 2006-07-22 16:35 ` Jeff Garzik 2006-07-22 17:00 ` Dave Airlie 1 sibling, 1 reply; 16+ messages in thread From: Jeff Garzik @ 2006-07-22 16:35 UTC (permalink / raw) To: Dave Airlie; +Cc: linux-kernel Dave Airlie wrote: > This patchset contains 7 patches to implement the GPU device layer. Where can I find more info on why this might be nice? Or simply more info on what this actually does for me? Jeff ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [RFC] GPU device layer patchset (00/07) 2006-07-22 16:35 ` [RFC] GPU device layer patchset (00/07) Jeff Garzik @ 2006-07-22 17:00 ` Dave Airlie 2006-07-31 12:42 ` Pavel Machek 0 siblings, 1 reply; 16+ messages in thread From: Dave Airlie @ 2006-07-22 17:00 UTC (permalink / raw) To: Jeff Garzik; +Cc: linux-kernel > > Where can I find more info on why this might be nice? > Or simply more info on what this actually does for me? It does nothing for you yet, it is just step one for getting the DRM and framebuffer drivers to co-exist in the driver model world, with the next step being allowing a channel of communication between the two layers with a view that later I can ask the DRM to disable fbdev or pass info to it.. Why do we not want fbdev and DRM in one driver? as it would break way too many existing systems.. It also allows DRM to get called at suspend/resume time. Dave. -- David Airlie, Software Engineer http://www.skynet.ie/~airlied / airlied at skynet.ie Linux kernel - DRI, VAX / pam_smb / ILUG ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [RFC] GPU device layer patchset (00/07) 2006-07-22 17:00 ` Dave Airlie @ 2006-07-31 12:42 ` Pavel Machek 0 siblings, 0 replies; 16+ messages in thread From: Pavel Machek @ 2006-07-31 12:42 UTC (permalink / raw) To: Dave Airlie; +Cc: Jeff Garzik, linux-kernel, vojtech Hi! > >Where can I find more info on why this might be nice? > >Or simply more info on what this actually does for me? > > It does nothing for you yet, it is just step one for getting the DRM and > framebuffer drivers to co-exist in the driver model world, with the next > step being allowing a channel of communication between the two layers with > a view that later I can ask the DRM to disable fbdev or pass info to it.. > > Why do we not want fbdev and DRM in one driver? as it would break way too > many existing systems.. > > It also allows DRM to get called at suspend/resume time. Looks good to me. I guess I should get DRM working... I actually tried a bit, and got some reasonably-recent Xserver here, but now I get root@amd:/home/pavel# glxinfo name of display: :0.0 ERROR! sizeof(I830DRIRec) does not match passed size from device driver libGL warning: 3D driver returned no fbconfigs. libGL error: InitDriver failed libGL error: reverting to (slow) indirect rendering display: :0 screen: 0 direct rendering: No server glx vendor string: SGI server glx version string: 1.2 server glx extensions: :-( Pavel -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html ^ permalink raw reply [flat|nested] 16+ messages in thread
end of thread, other threads:[~2006-07-31 12:43 UTC | newest] Thread overview: 16+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2006-07-22 15:38 [RFC] GPU device layer patchset (00/07) Dave Airlie 2006-07-22 15:38 ` [PATCH] drm: remove local copies of pci bus/slot/func (01/07) Dave Airlie 2006-07-22 15:38 ` [PATCH] drm: remove pci domain local copy (02/07) Dave Airlie 2006-07-22 15:38 ` [PATCH] gpu: Initial GPU layer addition. (03/07) Dave Airlie 2006-07-22 15:38 ` [PATCH] gpu/radeon: add a radeon lowlevel GPU driver (04/07) Dave Airlie 2006-07-22 15:38 ` [PATCH] gpu/radeonfb: add GPU support to radeonfb (05/07) Dave Airlie 2006-07-22 15:38 ` [PATCH] gpu/drm: Add GPU layer support to generic DRM (06/07) Dave Airlie 2006-07-22 15:38 ` [PATCH] drm/gpu/radeon: Add radeon DRM support to use GPU layer (07/07) Dave Airlie 2006-07-22 19:54 ` [PATCH] gpu: Initial GPU layer addition. (03/07) Jesse Barnes 2006-07-22 21:04 ` Nix 2006-07-23 20:04 ` Luca 2006-07-22 16:34 ` [PATCH] drm: remove pci domain local copy (02/07) Jeff Garzik 2006-07-22 16:53 ` Dave Airlie 2006-07-22 16:35 ` [RFC] GPU device layer patchset (00/07) Jeff Garzik 2006-07-22 17:00 ` Dave Airlie 2006-07-31 12:42 ` Pavel Machek
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