From: Alan Cox <alan@lxorguk.ukuu.org.uk>
To: "Bryan O'Sullivan" <bos@serpentine.com>
Cc: Bill Waddington <william.waddington@beezmo.com>,
linux-kernel@vger.kernel.org
Subject: Re: Flushing writes to PCI devices
Date: Thu, 21 Sep 2006 19:45:56 +0100 [thread overview]
Message-ID: <1158864356.11109.171.camel@localhost.localdomain> (raw)
In-Reply-To: <1158862442.29551.22.camel@sardonyx>
Ar Iau, 2006-09-21 am 11:14 -0700, ysgrifennodd Bryan O'Sullivan:
> Yes. If your device requires that writes to some locations in MMIO
> space be performed in a specific order, you must explicitly do this in
> your driver. Intel CPUs will flush posted writes out of order, for
> example.
According to the docs I have here if the pci target area is
prefetchable/postwritable or has MTRRs set specifically to do this (eg
video ram).
There is no ordering guarantee between PCI and main memory however.
Alan
next prev parent reply other threads:[~2006-09-21 18:21 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <fa.gbsNbubc34pqWPOxWCntrwUyt68@ifi.uio.no>
2006-09-20 18:28 ` Flushing writes to PCI devices Alan Stern
2006-09-20 19:10 ` linux-os (Dick Johnson)
[not found] ` <fa.V4O8HKrhUddxYm5+ixVbyZzPybE@ifi.uio.no>
2006-09-20 19:41 ` Bill Waddington
2006-09-20 20:17 ` linux-os (Dick Johnson)
2006-09-21 18:14 ` Bryan O'Sullivan
2006-09-21 18:45 ` Alan Cox [this message]
2006-09-21 20:56 ` Roland Dreier
2006-09-21 21:04 ` Bryan O'Sullivan
2006-09-20 22:39 ` Alan Cox
2006-09-20 23:22 ` Robert Hancock
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