From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1422857AbWJFTCE (ORCPT ); Fri, 6 Oct 2006 15:02:04 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1422879AbWJFTCD (ORCPT ); Fri, 6 Oct 2006 15:02:03 -0400 Received: from palinux.external.hp.com ([192.25.206.14]:55216 "EHLO mail.parisc-linux.org") by vger.kernel.org with ESMTP id S1422877AbWJFTBg (ORCPT ); Fri, 6 Oct 2006 15:01:36 -0400 From: Matthew Wilcox To: Val Henson , Greg Kroah-Hartman Cc: netdev@vger.kernel.org, linux-pci@atrey.karlin.mff.cuni.cz, linux-kernel@vger.kernel.org, Matthew Wilcox Subject: From: Matthew Wilcox Reply-To: Matthew Wilcox Date: Fri, 06 Oct 2006 13:01:34 -0600 Message-Id: <1160161294850-git-send-email-matthew@wil.cx> X-Mailer: git-send-email 1.4.1.1 In-Reply-To: <11601612941804-git-send-email-matthew@wil.cx> References: <11601612941804-git-send-email-matthew@wil.cx> Sender: linux-kernel-owner@vger.kernel.org X-Mailing-List: linux-kernel@vger.kernel.org We used to check whether pci_set_mwi() had succeeded by testing the hardware MWI bit. Now we need only check the return value (and failing to do so is a warning). Also, pci_set_mwi() will fail if the cache line size is 0, so we don't need to check that ourselves any more. Signed-off-by: Matthew Wilcox diff --git a/drivers/net/tulip/tulip_core.c b/drivers/net/tulip/tulip_core.c index d11d28c..64d999b 100644 --- a/drivers/net/tulip/tulip_core.c +++ b/drivers/net/tulip/tulip_core.c @@ -1135,7 +1135,6 @@ static void __devinit tulip_mwi_config ( { struct tulip_private *tp = netdev_priv(dev); u8 cache; - u16 pci_command; u32 csr0; if (tulip_debug > 3) @@ -1153,21 +1152,15 @@ static void __devinit tulip_mwi_config ( /* set or disable MWI in the standard PCI command bit. * Check for the case where mwi is desired but not available */ - if (csr0 & MWI) pci_set_mwi(pdev); - else pci_clear_mwi(pdev); - - /* read result from hardware (in case bit refused to enable) */ - pci_read_config_word(pdev, PCI_COMMAND, &pci_command); - if ((csr0 & MWI) && (!(pci_command & PCI_COMMAND_INVALIDATE))) - csr0 &= ~MWI; - - /* if cache line size hardwired to zero, no MWI */ - pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache); - if ((csr0 & MWI) && (cache == 0)) { - csr0 &= ~MWI; + if (csr0 & MWI) { + if (pci_set_mwi(pdev)) + csr0 &= ~MWI; + } else { pci_clear_mwi(pdev); } + pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache); + /* assign per-cacheline-size cache alignment and * burst length values */