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From: Dean Jenkins <djenkins@mvista.co.uk>
To: Pierre Ossman <drzeus-mmc@drzeus.cx>
Cc: Linux kernel mailing list <linux-kernel@vger.kernel.org>
Subject: Re: [Fwd: MMC sub-system: SDIO block-mode with increment address issue]
Date: Tue, 20 Nov 2007 14:52:37 +0000	[thread overview]
Message-ID: <1195570357.13874.17.camel@libdev3.libertesoft.co.uk> (raw)
In-Reply-To: <20071120115104.163810ea@poseidon.drzeus.cx>

Hi Pierre,

My card driver needed to set the R/W E4MI bit in the Card Capability
register (0x08) in CCCR (function 0). Perhaps it is unnecessary ?

BTW. It is easy to for the card driver to access function 0 registers by
doing the following...

...
	int old_num = func->num;   /* note the current function number */

	/* force access to function 0 area */
	func->num = 0;

	/* enable the e4mi in the card capability register */
	x = sdio_readb(func, 0x000008, &ret);

	if ( ret == 0 ) {
		x |= 0x20;
		sdio_writeb(func, x, 0x000008, &ret);
	}

	/* restore to original function number */
	func->num = old_num; 

...

Regards,
Dean.


On Tue, 2007-11-20 at 11:51 +0100, Pierre Ossman wrote:
> On Tue, 20 Nov 2007 10:28:53 +0000
> Dean Jenkins <djenkins@...> wrote:
> 
> > Hi Pierre,
> > 
> > I've managed to find your E-mail address in the Linux kernel mailing
> > list. I hope it is OK to directly E-mail you ?
> > 
> 
> You should also find my address in the MAINTAINERS file, which is where you should look for contact info. But yes, you can contact me directly. I prefer that you also add a relevant mailing list though.
> 
> > I work for MontaVista Software in the UK. I guess you know that
> > MontaVista are using the MMC/SDIO sub-system in their latest Mobilinux
> > 5.0 product ? It is using a 2.6.21 kernel.
> > 
> > Yesterday, I sent an E-mail to you (attached) to the Linux kernel
> > mailing list. Do you have any comments to make ?
> > 
> 
> Didn't notice it. I'll have a look.
> 
> > Do you have any bug reporting facility for the MMC/SDIO sub-system ? I
> > would like to report some SDIO API limitations for the SDIO card drivers
> > that I needed to workaround. For example, my SDIO driver needs to modify
> > the contents of the Card Capability register in function 0 to enable
> > block-mode support but the card driver has been restricted to only be
> > able to use function 1. There are other registers as well that the card
> > driver needs access to.
> > 
> 
> That is by design (as you probably can tell). Letting function drivers touch card global stuff under the feet of the SDIO core is a big layering violation and bound to screw things up eventually.
> 
> Could you explain more in detail what it is you need to fiddle with in function 0 and why?
> 
> Rgds
-- 
Dean Jenkins
Embedded Software Engineer
MontaVista Software (UK)
Professional Services Division


       reply	other threads:[~2007-11-20 14:53 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <1195554533.18869.111.camel@libdev3.libertesoft.co.uk>
     [not found] ` <20071120115104.163810ea@poseidon.drzeus.cx>
2007-11-20 14:52   ` Dean Jenkins [this message]
2007-11-20 16:39     ` [Fwd: MMC sub-system: SDIO block-mode with increment address issue] Pierre Ossman

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