From: Glauber de Oliveira Costa <gcosta@redhat.com>
To: linux-kernel@vger.kernel.org
Cc: akpm@linux-foundation.org, glommer@gmail.com, tglx@linutronix.de,
mingo@elte.hu, ehabkost@redhat.com, jeremy@goop.org,
avi@qumranet.com, anthony@codemonkey.ws,
virtualization@lists.linux-foundation.org, rusty@rustcorp.com.au,
ak@suse.de, chrisw@sous-sol.org, rostedt@goodmis.org,
hpa@zytor.com, zach@vmware.com, roland@redhat.com,
Glauber de Oliveira Costa <gcosta@redhat.com>
Subject: [PATCH 13/21] [PATCH] change bitwise operations to get a void parameter.
Date: Mon, 17 Dec 2007 20:52:36 -0200 [thread overview]
Message-ID: <11979320302030-git-send-email-gcosta@redhat.com> (raw)
In-Reply-To: <11979320252102-git-send-email-gcosta@redhat.com>
This patch changes the bitwise operations in bitops.h to get
a void pointers as a parameter. Before this patch, a lot of warnings
can be seen. They're gone after it.
Signed-off-by: Glauber de Oliveira Costa <gcosta@redhat.com>
---
include/asm-x86/bitops.h | 39 ++++++++++++++++++++-------------------
1 files changed, 20 insertions(+), 19 deletions(-)
Index: linux-2.6-x86/include/asm-x86/bitops.h
===================================================================
--- linux-2.6-x86.orig/include/asm-x86/bitops.h
+++ linux-2.6-x86/include/asm-x86/bitops.h
@@ -43,7 +43,7 @@
* Note that @nr may be almost arbitrarily large; this function is not
* restricted to acting on a single-word quantity.
*/
-static inline void set_bit(int nr, volatile unsigned long *addr)
+static inline void set_bit(int nr, volatile void *addr)
{
asm volatile(LOCK_PREFIX "bts %1,%0"
: ADDR
@@ -59,7 +59,7 @@ static inline void set_bit(int nr, volat
* If it's called on the same region of memory simultaneously, the effect
* may be that only one operation succeeds.
*/
-static inline void __set_bit(int nr, volatile unsigned long *addr)
+static inline void __set_bit(int nr, volatile void *addr)
{
asm volatile("bts %1,%0"
: ADDR
@@ -77,7 +77,7 @@ static inline void __set_bit(int nr, vol
* you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
* in order to ensure changes are visible on other processors.
*/
-static inline void clear_bit(int nr, volatile unsigned long *addr)
+static inline void clear_bit(int nr, volatile void *addr)
{
asm volatile(LOCK_PREFIX "btr %1,%0"
: ADDR
@@ -92,13 +92,13 @@ static inline void clear_bit(int nr, vol
* clear_bit() is atomic and implies release semantics before the memory
* operation. It can be used for an unlock.
*/
-static inline void clear_bit_unlock(unsigned nr, volatile unsigned long *addr)
+static inline void clear_bit_unlock(unsigned nr, volatile void *addr)
{
barrier();
clear_bit(nr, addr);
}
-static inline void __clear_bit(int nr, volatile unsigned long *addr)
+static inline void __clear_bit(int nr, volatile void *addr)
{
asm volatile("btr %1,%0" : ADDR : "Ir" (nr));
}
@@ -115,7 +115,7 @@ static inline void __clear_bit(int nr, v
* No memory barrier is required here, because x86 cannot reorder stores past
* older loads. Same principle as spin_unlock.
*/
-static inline void __clear_bit_unlock(unsigned nr, volatile unsigned long *addr)
+static inline void __clear_bit_unlock(unsigned nr, volatile void *addr)
{
barrier();
__clear_bit(nr, addr);
@@ -133,7 +133,7 @@ static inline void __clear_bit_unlock(un
* If it's called on the same region of memory simultaneously, the effect
* may be that only one operation succeeds.
*/
-static inline void __change_bit(int nr, volatile unsigned long *addr)
+static inline void __change_bit(int nr, volatile void *addr)
{
asm volatile("btc %1,%0" : ADDR : "Ir" (nr));
}
@@ -147,7 +147,7 @@ static inline void __change_bit(int nr,
* Note that @nr may be almost arbitrarily large; this function is not
* restricted to acting on a single-word quantity.
*/
-static inline void change_bit(int nr, volatile unsigned long *addr)
+static inline void change_bit(int nr, volatile void *addr)
{
asm volatile(LOCK_PREFIX "btc %1,%0"
: ADDR : "Ir" (nr));
@@ -161,7 +161,7 @@ static inline void change_bit(int nr, vo
* This operation is atomic and cannot be reordered.
* It also implies a memory barrier.
*/
-static inline int test_and_set_bit(int nr, volatile unsigned long *addr)
+static inline int test_and_set_bit(int nr, volatile void *addr)
{
int oldbit;
@@ -180,7 +180,7 @@ static inline int test_and_set_bit(int n
*
* This is the same as test_and_set_bit on x86.
*/
-static inline int test_and_set_bit_lock(int nr, volatile unsigned long *addr)
+static inline int test_and_set_bit_lock(int nr, volatile void *addr)
{
return test_and_set_bit(nr, addr);
}
@@ -194,7 +194,7 @@ static inline int test_and_set_bit_lock(
* If two examples of this operation race, one can appear to succeed
* but actually fail. You must protect multiple accesses with a lock.
*/
-static inline int __test_and_set_bit(int nr, volatile unsigned long *addr)
+static inline int __test_and_set_bit(int nr, volatile void *addr)
{
int oldbit;
@@ -213,7 +213,7 @@ static inline int __test_and_set_bit(int
* This operation is atomic and cannot be reordered.
* It also implies a memory barrier.
*/
-static inline int test_and_clear_bit(int nr, volatile unsigned long *addr)
+static inline int test_and_clear_bit(int nr, volatile void *addr)
{
int oldbit;
@@ -234,7 +234,7 @@ static inline int test_and_clear_bit(int
* If two examples of this operation race, one can appear to succeed
* but actually fail. You must protect multiple accesses with a lock.
*/
-static inline int __test_and_clear_bit(int nr, volatile unsigned long *addr)
+static inline int __test_and_clear_bit(int nr, volatile void *addr)
{
int oldbit;
@@ -246,7 +246,7 @@ static inline int __test_and_clear_bit(i
}
/* WARNING: non atomic and it can be reordered! */
-static inline int __test_and_change_bit(int nr, volatile unsigned long *addr)
+static inline int __test_and_change_bit(int nr, volatile void *addr)
{
int oldbit;
@@ -266,7 +266,7 @@ static inline int __test_and_change_bit(
* This operation is atomic and cannot be reordered.
* It also implies a memory barrier.
*/
-static inline int test_and_change_bit(int nr, volatile unsigned long *addr)
+static inline int test_and_change_bit(int nr, volatile void *addr)
{
int oldbit;
@@ -278,19 +278,20 @@ static inline int test_and_change_bit(in
return oldbit;
}
-static inline int constant_test_bit(int nr, const volatile unsigned long *addr)
+static inline int constant_test_bit(int nr, const volatile void *addr)
{
- return ((1UL << (nr % BITS_PER_LONG)) & (addr[nr / BITS_PER_LONG])) != 0;
+ return ((1UL << (nr % BITS_PER_LONG)) &
+ (((unsigned long *)addr)[nr / BITS_PER_LONG])) != 0;
}
-static inline int variable_test_bit(int nr, volatile const unsigned long *addr)
+static inline int variable_test_bit(int nr, volatile const void *addr)
{
int oldbit;
asm volatile("bt %2,%1\n\t"
"sbb %0,%0"
: "=r" (oldbit)
- : "m" (*addr), "Ir" (nr));
+ : "m" (*(unsigned long *)addr), "Ir" (nr));
return oldbit;
}
next prev parent reply other threads:[~2007-12-18 1:45 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-12-17 22:52 [PATCH 0/21] Integrate processor.h Glauber de Oliveira Costa
2007-12-17 22:52 ` [PATCH 1/21] move tsc definitions to were they belong Glauber de Oliveira Costa
2007-12-17 22:52 ` [PATCH 2/21] [PATCH] get rid of _MASK flags Glauber de Oliveira Costa
2007-12-17 22:52 ` [PATCH 3/21] [PATCH] move desc_empty to where they belong Glauber de Oliveira Costa
2007-12-17 22:52 ` [PATCH 4/21] [PATCH] move load_cr3 to a common place Glauber de Oliveira Costa
2007-12-17 22:52 ` [PATCH 5/21] [PATCH] unify paravirt pieces of processor.h Glauber de Oliveira Costa
2007-12-17 22:52 ` [PATCH 6/21] [PATCH] move the definition of set_iopl_mask to common header Glauber de Oliveira Costa
2007-12-17 22:52 ` [PATCH 7/21] [PATCH] unify common parts of processor.h Glauber de Oliveira Costa
2007-12-17 22:52 ` [PATCH 8/21] [PATCH] unify current_text_addr Glauber de Oliveira Costa
2007-12-17 22:52 ` [PATCH 9/21] [PATCH] unify tss_struct Glauber de Oliveira Costa
2007-12-17 22:52 ` [PATCH 10/21] [PATCH] provide x86_64 with a load_sp0 function Glauber de Oliveira Costa
2007-12-17 22:52 ` [PATCH 11/21] [PATCH] unify thread struct Glauber de Oliveira Costa
2007-12-17 22:52 ` [PATCH 12/21] [PATCH] unify TASK_ALIGN definitions Glauber de Oliveira Costa
2007-12-17 22:52 ` Glauber de Oliveira Costa [this message]
2007-12-17 22:52 ` [PATCH 14/21] [PATCH] unify x86_cpuinfo struct Glauber de Oliveira Costa
2007-12-17 22:52 ` [PATCH 15/21] [PATCH] remove legacy stuff from processor_64.h Glauber de Oliveira Costa
2007-12-17 22:52 ` [PATCH 16/21] [PATCH] unify mm_segment_t definition Glauber de Oliveira Costa
2007-12-17 22:52 ` [PATCH 17/21] [PATCH] move definitions to processor.h Glauber de Oliveira Costa
2007-12-17 22:52 ` [PATCH 18/21] [PATCH] unify prefetch operations Glauber de Oliveira Costa
2007-12-17 22:52 ` [PATCH 19/21] [PATCH] unify asm nops Glauber de Oliveira Costa
2007-12-17 22:52 ` [PATCH 20/21] [PATCH] move i387 definitions to processor.h Glauber de Oliveira Costa
2007-12-17 22:52 ` [PATCH 21/21] [PATCH] finish processor.h integration Glauber de Oliveira Costa
2007-12-18 13:19 ` Ingo Molnar
2007-12-18 13:38 ` Ingo Molnar
2007-12-18 13:40 ` Ingo Molnar
2007-12-18 13:49 ` Glauber de Oliveira Costa
2007-12-18 15:44 ` Ingo Molnar
2007-12-18 13:48 ` Glauber de Oliveira Costa
2007-12-18 15:43 ` Ingo Molnar
2007-12-18 5:18 ` [PATCH 13/21] [PATCH] change bitwise operations to get a void parameter Rusty Russell
2007-12-18 5:38 ` H. Peter Anvin
2007-12-18 12:40 ` Glauber de Oliveira Costa
2007-12-18 17:26 ` H. Peter Anvin
2007-12-18 11:45 ` [PATCH 7/21] [PATCH] unify common parts of processor.h Ingo Molnar
2007-12-18 12:05 ` Glauber de Oliveira Costa
2007-12-18 14:00 ` Ingo Molnar
2007-12-18 5:14 ` [PATCH 3/21] [PATCH] move desc_empty to where they belong Rusty Russell
2007-12-18 5:35 ` Roland McGrath
2007-12-18 5:50 ` Roland McGrath
2007-12-18 5:59 ` [PATCH x86/mm] x86: TLS desc_struct cleanup Roland McGrath
2007-12-18 12:03 ` [PATCH 3/21] [PATCH] move desc_empty to where they belong Glauber de Oliveira Costa
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