[PATCH 2/5] x86: c_p_a clflush_cache_range fix

["Huang, Ying" <ying.huang@intel.com>]

Because in i386 early boot stage, boot_cpu_data may be not available,
which makes clflush_cach_range() into infinite loop, which is called
by change_page_attr(). This patch fixes this by providing a default
clflush_size of 64. But the better method may be providing a
early_identify_cpu() for i386.

Signed-off-by: Huang Ying <ying.huang@intel.com>

---
 arch/x86/mm/pageattr.c |    5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -36,11 +36,14 @@ within(unsigned long addr, unsigned long
  */
 void clflush_cache_range(void *vaddr, unsigned int size)
 {
+	int clflush_size;
 	void *vend = vaddr + size - 1;
 
 	mb();
 
-	for (; vaddr < vend; vaddr += boot_cpu_data.x86_clflush_size)
+	/* In boot stage, boot_cpu_data may be not available */
+	clflush_size = boot_cpu_data.x86_clflush_size ? : 64;
+	for (; vaddr < vend; vaddr += clflush_size)
 		clflush(vaddr);
 	/*
 	 * Flush any possible final partial cacheline: