From: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
To: "H. Peter Anvin" <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>,
Ben Maurer <bmaurer@fb.com>, Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>,
Russell King <linux@arm.linux.org.uk>,
linux-api <linux-api@vger.kernel.org>,
Andrew Morton <akpm@linux-foundation.org>,
Michael Kerrisk <mtk.manpages@gmail.com>,
Dave Watson <davejwatson@fb.com>, rostedt <rostedt@goodmis.org>,
Andy Lutomirski <luto@amacapital.net>,
Will Deacon <will.deacon@arm.com>,
"Paul E. McKenney" <paulmck@linux.vnet.ibm.com>,
Chris Lameter <cl@linux.com>, Andi Kleen <andi@firstfloor.org>,
Josh Triplett <josh@joshtriplett.org>,
Paul Turner <pjt@google.com>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Andrew Hunter <ahh@google.com>,
Peter Zijlstra <peterz@infradead.org>
Subject: Re: [PATCH v4 1/5] getcpu_cache system call: cache CPU number of running thread
Date: Tue, 1 Mar 2016 18:40:52 +0000 (UTC) [thread overview]
Message-ID: <1210401936.13016.1456857652856.JavaMail.zimbra@efficios.com> (raw)
In-Reply-To: <56D5DEA8.3040908@zytor.com>
----- On Mar 1, 2016, at 1:25 PM, H. Peter Anvin hpa@zytor.com wrote:
> On 02/27/16 16:39, Mathieu Desnoyers wrote:
>>
>> Very good points! Would the following interfaces be acceptable ?
>>
>> /* This structure needs to be aligned cache line size. */
>> struct thread_local_abi {
>> int32_t cpu_id; /* Aligned on
>> 32-bit. */
>> uint32_t rseq_seqnum; /* Aligned on 32-bit. */
>> uint64_t rseq_post_commit_ip; /* Aligned on 64-bit. */
>> /* Add new fields at the end. */
>> } __attribute__((packed));
>>
>
> First of all, DO NOT use __attribute__((packed)). First of all, it
> buggers up the alignment of the *entire structure* (the alignment of a
> packed structure defaults to 1, and gcc will assume the whole structure
> is misaligned, generating unaligned access instructions on architectures
> which need them.)
>
> Sadly gcc doesn't currently have an __attribute__ to express "error out
> on padding" which is what you actually want here.
Good point.
>
> You may, however, want to add an explicit alignment attribute to make
> sure it is cache line aligned.
Good idea, will do!
>
> Second, as far as the 32/64 bit issue is concerned, you have to order
> the fields so you always access the LSB. This is probably the best way
> to do it:
>
> #ifdef __LP64__
> # define __FIELD_32_64(field,n) uint64_t field;
> #elif __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
> # define __FIELD_32_64(field,n) uint32_t field, _unused ## n;
> #else
> # define __FIELD_32_64(field,n) uint32_t _unused ## n, field;
> #endif
>
> All these macros are intrinsic to gcc (and hopefully to gcc-compatible
> compilers) so there are no header file dependencies.
Thanks for the hint. I'll try it out.
Mathieu
>
> -hpa
--
Mathieu Desnoyers
EfficiOS Inc.
http://www.efficios.com
next prev parent reply other threads:[~2016-03-01 18:41 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-23 23:28 [PATCH v4 0/5] getcpu_cache system call for 4.6 Mathieu Desnoyers
2016-02-23 23:28 ` [PATCH v4 1/5] getcpu_cache system call: cache CPU number of running thread Mathieu Desnoyers
2016-02-24 11:11 ` Thomas Gleixner
2016-02-24 17:17 ` Mathieu Desnoyers
2016-02-25 23:32 ` Rasmus Villemoes
2016-02-26 17:47 ` Mathieu Desnoyers
2016-02-25 9:56 ` Peter Zijlstra
2016-02-25 16:55 ` Mathieu Desnoyers
2016-02-25 17:04 ` Peter Zijlstra
2016-02-25 17:17 ` Mathieu Desnoyers
2016-02-26 11:33 ` Peter Zijlstra
2016-02-26 16:29 ` Thomas Gleixner
2016-02-26 17:20 ` Mathieu Desnoyers
2016-02-26 18:01 ` Thomas Gleixner
2016-02-26 20:24 ` Mathieu Desnoyers
2016-02-26 23:04 ` H. Peter Anvin
2016-02-27 0:40 ` Mathieu Desnoyers
2016-02-27 6:24 ` H. Peter Anvin
2016-02-27 14:15 ` Mathieu Desnoyers
2016-02-27 14:58 ` Peter Zijlstra
2016-02-27 18:35 ` Linus Torvalds
2016-02-27 19:01 ` H. Peter Anvin
2016-02-27 23:53 ` Mathieu Desnoyers
[not found] ` <CA+55aFwcgwRxvVBz5kk_3O8dESXAGJ4KHBkf=pSXjiS7Xh4NwA@mail.gmail.com>
[not found] ` <1082926946.10326.1456619994590.JavaMail.zimbra@efficios.com>
2016-02-28 0:57 ` Linus Torvalds
2016-02-28 14:32 ` Mathieu Desnoyers
2016-02-29 10:35 ` Peter Zijlstra
2016-03-01 20:23 ` Mathieu Desnoyers
2016-03-01 21:32 ` Peter Zijlstra
2016-03-01 21:36 ` Peter Zijlstra
2016-03-01 21:47 ` H. Peter Anvin
2016-03-02 10:34 ` Peter Zijlstra
2016-02-29 10:32 ` Peter Zijlstra
2016-02-29 10:39 ` Arnd Bergmann
2016-02-29 12:41 ` Mathieu Desnoyers
2016-02-29 13:08 ` Arnd Bergmann
2016-02-29 18:19 ` H. Peter Anvin
2016-03-02 10:44 ` Geert Uytterhoeven
2016-03-01 18:25 ` H. Peter Anvin
2016-03-01 18:40 ` Mathieu Desnoyers [this message]
2016-02-28 13:07 ` Geert Uytterhoeven
2016-02-28 16:21 ` Linus Torvalds
2016-02-29 10:01 ` Peter Zijlstra
2016-02-27 15:04 ` H. Peter Anvin
2016-02-23 23:28 ` [PATCH v4 2/5] getcpu_cache: ARM resume notifier Mathieu Desnoyers
2016-02-23 23:28 ` [PATCH v4 3/5] getcpu_cache: wire up ARM system call Mathieu Desnoyers
2016-02-24 0:54 ` kbuild test robot
2016-02-24 1:05 ` [PATCH v4 (updated)] " Mathieu Desnoyers
2016-02-24 5:28 ` kbuild test robot
2016-02-24 6:54 ` kbuild test robot
2016-02-23 23:28 ` [PATCH v4 4/5] getcpu_cache: x86 32/64 resume notifier Mathieu Desnoyers
2016-02-23 23:28 ` [PATCH v4 5/5] getcpu_cache: wire up x86 32/64 system call Mathieu Desnoyers
2016-02-24 1:36 ` [PATCH v4 0/5] getcpu_cache system call for 4.6 H. Peter Anvin
2016-02-24 4:09 ` Mathieu Desnoyers
2016-02-24 20:07 ` H. Peter Anvin
2016-02-24 22:38 ` Mathieu Desnoyers
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