Re: MMIO and gcc re-ordering issue

Paul Mackerras
2008-05-27T23:04:30Z

Chris Friesen writes:

> Roland Dreier wrote:
>
> > Writes are posted yes, but not reordered arbitrarily. If I have code like:
> >
> > spin_lock(&mmio_lock);
> > writel(val1, reg1);
> > writel(val2, reg2);
> > spin_unlock(&mmio_lock);
> >
> > then I have a reasonable expectation that if two CPUs run this at the
> > same time, their writes to reg1/reg2 won't be interleaved with each
> > other (because the whole section is inside a spinlock). And Altix
> > violates that expectation.
>
> Does that necessarily follow?
>
> If you've got a large system with multiple pci bridges, could you end up
> with posted writes coming from different cpus taking a different amount
> of time to propagate to a device and thus colliding?

On powerpc we explicitly make sure that can't happen. That's the "do
a sync in spin_unlock if there were any writels since the last
spin_lock" magic. The sync instruction makes sure the writes have got
to the host bridge before the spinlock is unlocked.

Paul.