[PATCH 1/3] x86: add mtrr_cleanup_debug command line

[PATCH 1/3] x86: add mtrr_cleanup_debug command line

[Yinghai Lu]

 add mtrr_cleanup_debug to print out more info about layout

Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>

---
 arch/x86/kernel/cpu/mtrr/main.c |   14 +++++++++++---
 1 file changed, 11 insertions(+), 3 deletions(-)

Index: linux-2.6/arch/x86/kernel/cpu/mtrr/main.c
===================================================================
--- linux-2.6.orig/arch/x86/kernel/cpu/mtrr/main.c
+++ linux-2.6/arch/x86/kernel/cpu/mtrr/main.c
@@ -836,6 +836,13 @@ static int __init enable_mtrr_cleanup_se
 }
 early_param("enble_mtrr_cleanup", enable_mtrr_cleanup_setup);
 
+static int __init mtrr_cleanup_debug_setup(char *str)
+{
+	debug_print = 1;
+	return 0;
+}
+early_param("mtrr_cleanup_debug", mtrr_cleanup_debug_setup);
+
 struct var_mtrr_state {
 	unsigned long	range_startk;
 	unsigned long	range_sizek;
@@ -1231,7 +1238,7 @@ static int __init mtrr_cleanup(unsigned
 	if (mtrr_chunk_size && mtrr_gran_size) {
 		int num_reg;
 
-		debug_print = 1;
+		debug_print++;
 		/* convert ranges to var ranges state */
 		num_reg = x86_setup_var_mtrrs(range, nr_range, mtrr_chunk_size,
 					      mtrr_gran_size);
@@ -1267,7 +1274,7 @@ static int __init mtrr_cleanup(unsigned
 		}
 		printk(KERN_INFO "invalid mtrr_gran_size or mtrr_chunk_size, "
 		       "will find optimal one\n");
-		debug_print = 0;
+		debug_print--;
 		memset(result, 0, sizeof(result[0]));
 	}
 
@@ -1370,8 +1377,9 @@ static int __init mtrr_cleanup(unsigned
 		chunk_size <<= 10;
 		gran_size = result[i].gran_sizek;
 		gran_size <<= 10;
-		debug_print = 1;
+		debug_print++;
 		x86_setup_var_mtrrs(range, nr_range, chunk_size, gran_size);
+		debug_print--;
 		set_var_mtrr_all(address_bits);
 		return 1;
 	}

[PATCH 2/3] x86: don't need to go to chunksize to 4G

[Yinghai Lu]

change back chunksize max to 2g
   otherwise will get strange layout in 2G ram system like
     0 - 4g WB, 2040M - 2048M UC, 2048M -  4G NC
   instead of
     0 - 2g WB, 2040M - 2048M UC

Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>

---
 arch/x86/kernel/cpu/mtrr/main.c |    8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

Index: linux-2.6/arch/x86/kernel/cpu/mtrr/main.c
===================================================================
--- linux-2.6.orig/arch/x86/kernel/cpu/mtrr/main.c
+++ linux-2.6/arch/x86/kernel/cpu/mtrr/main.c
@@ -1162,10 +1162,10 @@ struct mtrr_cleanup_result {
 
 /*
  * gran_size: 1M, 2M, ..., 2G
- * chunk size: gran_size, ..., 4G
- * so we need (2+13)*6
+ * chunk size: gran_size, ..., 2G
+ * so we need (1+12)*6
  */
-#define NUM_RESULT	90
+#define NUM_RESULT	78
 #define PSHIFT		(PAGE_SHIFT - 10)
 
 static struct mtrr_cleanup_result __initdata result[NUM_RESULT];
@@ -1282,7 +1282,7 @@ static int __init mtrr_cleanup(unsigned
 	memset(min_loss_pfn, 0xff, sizeof(min_loss_pfn));
 	memset(result, 0, sizeof(result));
 	for (gran_size = (1ULL<<20); gran_size < (1ULL<<32); gran_size <<= 1) {
-		for (chunk_size = gran_size; chunk_size < (1ULL<<33);
+		for (chunk_size = gran_size; chunk_size < (1ULL<<32);
 		     chunk_size <<= 1) {
 			int num_reg;
 

[PATCH 3/3] x86: mtrr_cleanup optimization v2

[Yinghai Lu]

fix hpa's t61 with 4g ram
   change layout from
	(n - 1)*chunksize + chunk_size - NC
   to
	n*chunksize - NC

Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>

---
 arch/x86/kernel/cpu/mtrr/main.c |   81 ++++++++++++++++++----------------------
 1 file changed, 38 insertions(+), 43 deletions(-)

Index: linux-2.6/arch/x86/kernel/cpu/mtrr/main.c
===================================================================
--- linux-2.6.orig/arch/x86/kernel/cpu/mtrr/main.c
+++ linux-2.6/arch/x86/kernel/cpu/mtrr/main.c
@@ -977,6 +977,8 @@ range_to_mtrr_with_hole(struct var_mtrr_
 	/* try to append some small hole */
 	range0_basek = state->range_startk;
 	range0_sizek = ALIGN(state->range_sizek, chunk_sizek);
+
+	/* no increase */
 	if (range0_sizek == state->range_sizek) {
 		if (debug_print)
 			printk(KERN_DEBUG "rangeX: %016lx - %016lx\n",
@@ -987,13 +989,13 @@ range_to_mtrr_with_hole(struct var_mtrr_
 		return 0;
 	}
 
-	range0_sizek -= chunk_sizek;
-	if (range0_sizek && sizek) {
-	    while (range0_basek + range0_sizek > (basek + sizek)) {
-		range0_sizek -= chunk_sizek;
-		if (!range0_sizek)
-			break;
-	    }
+	/* only cut back, when it is not the last */
+	if (sizek) {
+		while (range0_basek + range0_sizek > (basek + sizek)) {
+			range0_sizek -= chunk_sizek;
+			if (!range0_sizek)
+				break;
+		}
 	}
 
 	if (range0_sizek) {
@@ -1007,46 +1009,39 @@ range_to_mtrr_with_hole(struct var_mtrr_
 	}
 
 	range_basek = range0_basek + range0_sizek;
-	range_sizek = chunk_sizek;
-
-	if (range_basek + range_sizek > basek &&
-	    range_basek + range_sizek <= (basek + sizek)) {
-		/* one hole */
-		second_basek = basek;
-		second_sizek = range_basek + range_sizek - basek;
-	}
 
-	/* if last piece, only could one hole near end */
-	if ((second_basek || !basek) &&
-	    range_sizek - (state->range_sizek - range0_sizek) - second_sizek <
-	    (chunk_sizek >> 1)) {
-		/*
-		 * one hole in middle (second_sizek is 0) or at end
-		 * (second_sizek is 0 )
-		 */
-		hole_sizek = range_sizek - (state->range_sizek - range0_sizek)
-				 - second_sizek;
-		hole_basek = range_basek + range_sizek - hole_sizek
-				 - second_sizek;
-	} else {
-		/* fallback for big hole, or several holes */
+	/* one hole in the middle */
+	if (range_basek > basek && range_basek <= (basek + sizek))
+		second_sizek = range_basek - basek;
+
+	if (range0_sizek > state->range_sizek) {
+		unsigned long hole_basek, hole_sizek;
+
+		/* one hole in middle or at end */
+		hole_sizek = range0_sizek - state->range_sizek - second_sizek;
+		if (hole_sizek) {
+			hole_basek = range_basek - hole_sizek - second_sizek;
+			if (debug_print)
+				printk(KERN_DEBUG "hole: %016lx - %016lx\n",
+					 hole_basek<<10,
+					 (hole_basek + hole_sizek)<<10);
+			state->reg = range_to_mtrr(state->reg, hole_basek,
+						   hole_sizek,
+						   MTRR_TYPE_UNCACHABLE);
+		}
+	} else  {
+		/* need to handle left over */
 		range_sizek = state->range_sizek - range0_sizek;
-		second_basek = 0;
-		second_sizek = 0;
-	}
 
-	if (debug_print)
-		printk(KERN_DEBUG "range: %016lx - %016lx\n", range_basek<<10,
-			 (range_basek + range_sizek)<<10);
-	state->reg = range_to_mtrr(state->reg, range_basek, range_sizek,
+		if (range_sizek) {
+			if (debug_print)
+				printk(KERN_DEBUG "range: %016lx - %016lx\n",
+					 range_basek<<10,
+					 (range_basek + range_sizek)<<10);
+			state->reg = range_to_mtrr(state->reg, range_basek,
+					 range_sizek,
 					 MTRR_TYPE_WRBACK);
-	if (hole_sizek) {
-		if (debug_print)
-			printk(KERN_DEBUG "hole: %016lx - %016lx\n",
-				 hole_basek<<10, (hole_basek + hole_sizek)<<10);
-		state->reg = range_to_mtrr(state->reg, hole_basek, hole_sizek,
-						 MTRR_TYPE_UNCACHABLE);
-
+		}
 	}
 
 	return second_sizek;

Re: [PATCH 3/3] x86: mtrr_cleanup optimization v2

[Ingo Molnar]

* Yinghai Lu <yhlu.kernel@gmail.com> wrote:

> fix hpa's t61 with 4g ram
>    change layout from
> 	(n - 1)*chunksize + chunk_size - NC
>    to
> 	n*chunksize - NC

applied the three patches to tip/x86/mtrr, thanks Yinghai!

i'm wondering, arent 2/3 and 3/3 also for v2.6.27?

	Ingo

Re: [PATCH 3/3] x86: mtrr_cleanup optimization v2

[Yinghai Lu]

On Sat, Sep 27, 2008 at 9:09 AM, Ingo Molnar <mingo@elte.hu> wrote:
>
> * Yinghai Lu <yhlu.kernel@gmail.com> wrote:
>
>> fix hpa's t61 with 4g ram
>>    change layout from
>>       (n - 1)*chunksize + chunk_size - NC
>>    to
>>       n*chunksize - NC
>
> applied the three patches to tip/x86/mtrr, thanks Yinghai!
>
> i'm wondering, arent 2/3 and 3/3 also for v2.6.27

let queue to 2.6.28, and later back port to 2.6.27 , 2.6.26 stable

YH

Re: [PATCH 3/3] x86: mtrr_cleanup optimization v2

[Ingo Molnar]

* Yinghai Lu <yinghai@kernel.org> wrote:

> On Sat, Sep 27, 2008 at 9:09 AM, Ingo Molnar <mingo@elte.hu> wrote:
> >
> > * Yinghai Lu <yhlu.kernel@gmail.com> wrote:
> >
> >> fix hpa's t61 with 4g ram
> >>    change layout from
> >>       (n - 1)*chunksize + chunk_size - NC
> >>    to
> >>       n*chunksize - NC
> >
> > applied the three patches to tip/x86/mtrr, thanks Yinghai!
> >
> > i'm wondering, arent 2/3 and 3/3 also for v2.6.27
> 
> let queue to 2.6.28, and later back port to 2.6.27 , 2.6.26 stable

ok.

	Ingo