[PATCH] disable CPU side GART accesses

Bob Montgomery
2008-10-15T21:48:36Z

This patch prevents improper access of the GART aperture from kdump
kernels running on AMD systems.

Symptoms of the problem include hangs, spurious restarts, and MCE
(Machine Check Exception) panics in some AMD Opteron systems that
enable the GART IOMMU and access /proc/vmcore or /dev/oldmem from a
kdump kernel. Note that the GART IOMMU will not be enabled on systems
with less than 4 GB of RAM, so symptoms will not appear. This problem
has been reproduced on Family 10H Quad-Core AMD Opteron systems.

This patch changes the initialization of the GART to set the DISGARTCPU
bit in the GART Aperture Control Register (AMD64_GARTAPERTURECTL).
Setting the bit prevents requests from the CPUs from accessing the
GART. In other words, CPU memory accesses to the aperture address
range will not cause the GART to perform an address translation.
The aperture area is currently being unmapped at the kernel level
with set_memory_np() in gart_iommu_init to prevent accesses from the
CPU, but that kernel level unmapping is not in effect in the kexec'd
kdump kernel. By disabling the CPU-side accesses within the GART,
which does persist through the kexec of the kdump kernel, the kdump
kernel is prevented from interacting with the GART during accesses
to the dump memory areas which include the address range of the GART
aperture. Although the patch can be applied to the kdump kernel,
it is not exercised there because the kdump kernel doesn't attempt
to initialize the GART, since it typically runs in less than 4 GB
of memory.

Signed-off-by: Bob Montgomery <bob.montgomery@hp.com>

--- linux-2.6.27/include/asm-x86/gart.h 2008-10-13 16:36:34.000000000 -0600
+++ linux-2.6.27-fix/include/asm-x86/gart.h 2008-10-14 10:37:32.000000000 -0600
@@ -44,7 +44,8 @@ static inline void enable_gart_translati
/* Enable GART translation for this hammer. */
pci_read_config_dword(dev, AMD64_GARTAPERTURECTL, &ctl);
ctl |= GARTEN;
- ctl &= ~(DISGARTCPU | DISGARTIO);
+ ctl |= DISGARTCPU;
+ ctl &= ~(DISGARTIO);
pci_write_config_dword(dev, AMD64_GARTAPERTURECTL, ctl);
}