Re: [PATCH RFC/RFB] x86_64, i386: interrupt dispatch changes

["Alexander van Heukelum" <heukelum@fastmail.fm>]

On Tue, 4 Nov 2008 18:05:01 +0100, "Andi Kleen" <andi@firstfloor.org>
said:
> > not taking into account the cost of cs reading (which I
> > don't suspect to be that expensive apart from writting,
> 
> GDT accesses have an implied LOCK prefix. Especially
> on some older CPUs that could be slow.
> 
> I don't know if it's a problem or not but it would need
> some careful benchmarking on different systems to make sure interrupt 
> latencies are not impacted.

That's good to know. I assume this LOCKed bus cycle only occurs
if the (hidden) segment information is not cached in some way?
How many segments are typically cached? In particular, does it
optimize switching between two segments?

> Another reason I would be also careful with this patch is that
> it will likely trigger slow paths in JITs like qemu/vmware/etc.

Software can be fixed ;).

> Also code segment switching is likely not something that
> current and future micro architectures will spend a lot of time
> optimizing.
> 
> I'm not sure that risk is worth the small improvement in code
> size.

I think it is worth exploring a bit more. I feel it should be
a neutral change worst-case performance-wise, but I really
think the new code is more readable/understandable.

> An alternative BTW to having all the stubs in the executable
> would be to just dynamically generate them when the interrupt
> is set up. Then you would only have the stubs around for the 
> interrupts which are actually used.

I was trying to simplify things, not make it even less
transparent ;).

> -Andi
-- 
  Alexander van Heukelum
  heukelum@fastmail.fm

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