From: Huang Ying <ying.huang@intel.com>
To: Herbert Xu <herbert@gondor.apana.org.au>
Cc: "Siddha, Suresh B" <suresh.b.siddha@intel.com>,
Sebastian Andrzej Siewior <linux-crypto@ml.breakpoint.cc>,
"akpm@linux-foundation.org" <akpm@linux-foundation.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-crypto@vger.kernel.org" <linux-crypto@vger.kernel.org>,
"mingo@elte.hu" <mingo@elte.hu>,
"tglx@linutronix.de" <tglx@linutronix.de>
Subject: Re: [RFC PATCH crypto] AES: Add support to Intel AES-NI instructions
Date: Mon, 15 Dec 2008 13:48:51 +0800 [thread overview]
Message-ID: <1229320131.5936.232.camel@yhuang-dev.sh.intel.com> (raw)
In-Reply-To: <20081215052106.GA29324@gondor.apana.org.au>
[-- Attachment #1: Type: text/plain, Size: 1193 bytes --]
On Mon, 2008-12-15 at 13:21 +0800, Herbert Xu wrote:
> On Mon, Dec 15, 2008 at 01:14:59PM +0800, Huang Ying wrote:
> >
> > The PadLock instructions don't use/touch SSE registers, but might cause
> > DNA fault when CR0.TS is set. So it is sufficient just to clear CR0.TS
> > before executed.
> >
> > The AES-NI instructions do use SSE registers. Considering the following
>
> This really sucks as more than half of the kernel AES users are
> in softirq context. Someone hit the guy who designed this with
> a clue-bat please!
>
> > To solve the above issue, the following methods can be used:
> >
> > a. Do not touch SSE state in soft_irq
> > b. Disable/restore soft_irq in kernel_fpu_begin/kernel_fpu_end
> > c. Use a per-CPU data structure to save kernel FPU state during
> > soft_irq.
> >
> > The mothod a is used in patch.
>
> Could you run the tcrypt speed test on this and measure the
> difference between the native AES vs. the fallback? Depending
> on the difference I think we'd want to consider b) or c).
I do not have appropriate machine at hand, I will contact my colleague
for testing and post the results later.
Best Regards,
Huang Ying
[-- Attachment #2: This is a digitally signed message part --]
[-- Type: application/pgp-signature, Size: 197 bytes --]
next prev parent reply other threads:[~2008-12-15 5:49 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-12-12 4:08 [RFC PATCH crypto] AES: Add support to Intel AES-NI instructions Huang Ying
2008-12-12 19:57 ` Sebastian Andrzej Siewior
2008-12-15 2:19 ` Huang Ying
2008-12-15 3:38 ` Herbert Xu
2008-12-15 5:14 ` Huang Ying
2008-12-15 5:21 ` Herbert Xu
2008-12-15 5:48 ` Huang Ying [this message]
2008-12-15 12:38 ` Herbert Xu
2008-12-16 23:31 ` Herbert Xu
2008-12-17 1:14 ` Huang Ying
2008-12-17 1:26 ` Herbert Xu
2008-12-17 3:33 ` Huang Ying
2008-12-17 3:39 ` Herbert Xu
2008-12-15 18:26 ` Suresh Siddha
2008-12-15 9:07 ` Sebastian Andrzej Siewior
2008-12-15 11:28 ` Herbert Xu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1229320131.5936.232.camel@yhuang-dev.sh.intel.com \
--to=ying.huang@intel.com \
--cc=akpm@linux-foundation.org \
--cc=herbert@gondor.apana.org.au \
--cc=linux-crypto@ml.breakpoint.cc \
--cc=linux-crypto@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mingo@elte.hu \
--cc=suresh.b.siddha@intel.com \
--cc=tglx@linutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox