Re: [PATCH] x86: Add clflush before monitor for Intel 7400 series - v2

["Pallipadi, Venkatesh" <venkatesh.pallipadi@intel.com>]

On Sun, 2009-02-08 at 21:53 -0800, Nick Piggin wrote:
> On Sunday 08 February 2009 03:47:07 Pallipadi, Venkatesh wrote:
> > On Sat, Feb 07, 2009 at 06:02:45AM -0800, Alan Cox wrote:
> > > On Fri, 6 Feb 2009 16:47:29 -0800
> > >
> > > "Pallipadi, Venkatesh" <venkatesh.pallipadi@intel.com> wrote:
> > > > For Intel 7400 series CPUs, the recommendation is to use a clflush on
> > > > the monitored address just before monitor and mwait pair [1]. This
> > > > clflush makes sure that there are no false wakeups from mwait when the
> > > > monitored address was recently written to.
> > >
> > > Given our mwait usages will very quickly go back to sleep in such a case
> > > and it would almost certainly be one sleep only is this really worth the
> > > effort ?
> >
> > Yes. If we only consider the CPU idle behavior, we really do not need the
> > patch as we will go back to idle. But, there are other factors:
> > - drivers/idle/i7300_idle.c  which tries to save memory power based on CPU
> >   idle time. It gets confused with these short idles.
> > - cpuidle menu governor  These platforms may also support more than one
> > C-state. C1 and CC3. So, we will go through the C-state policy in menu
> > governor, which again looks at idle time and may end up taking wrong
> > decisions due to these short idles.
> >
> > We can make the above code to be more clever, to ignore short idles. But,
> > this patch seems to be the easier and clean way as the errata is only in a
> > particular CPU model.
> 
> Have you benchmarked it? With something like tbench which IIRC should
> generate a good number of idle/busy transitions?
> 

We haven't run tbench specifically. But, we noticed this issue running
specpower workload on this platform. Especially the 10-20% point of
specpower, which also has notable idle/busy transitions, this patch
helps.

Thanks,
Venki