[PATCH 00/14] convert voyager over to the x86 quirks model

[PATCH 00/14] convert voyager over to the x86 quirks model

[James Bottomley]

Given the lack of actual technical feedback, I went ahead and
implemented the additions to smp_ops and x86_quirks (and a dynamic mca
NMI hook) to allow voyager to be plumbed in.

There also needs to be changes in the boot setup to make voyager work
dynamically: It has to be detected first, so the a20 gate check is
only executed if a voyager is not found.

I also completed some of the subarchitecture eliminations, so all the
include file infrastructure should be gone.

The result is that I can boot both my PC SMP x86 boxes and voyager
with the same kernel.

This patch series applies on git head (obviously with
965c7ecaf2e2b083d711a01ab33735a4bdeee1a4 reverted)


James Bottomley (14):
  [VOYAGER] x86: add {safe,hard}_smp_processor_id to smp_ops
  [VOYAGER] x86/mca: make mca_nmi_hook external
  [VOYAGER] x86: add prefill_possible_map to x86_quirks
  [VOYAGER] x86: use boot_cpu_id instead of zero for checking boot
    processor
  [VOYAGER] x86/voyager: Move voyager detection to a new bootparam area
  [VOYAGER] x86: eliminate subarchitecture file setup_arch.h
  [VOYAGER] x86: eliminate subarchitecture file entry_arch.h
  [VOYAGER] x86: eliminate subarchitecture file do_timer.h
  [VOYAGER] x86: redo irq2 cascade setup
  [VOYAGER] x86: make disabling the apics functional instead of a flag
  [VOYAGER] x86/Voyager: add missing QIC call function single gate
  [VOYAGER] x86/Voyager: replace inline io area reads with readX
    accessors
  [VOYAGER] x86/voyager: remove direct use of pg0 in favour of
    early_ioremap()
  [VOYAGER] x86/Voyager: Plumb voyager back into the build

 arch/x86/Kconfig                               |    4 +-
 arch/x86/Makefile                              |    2 +
 arch/x86/boot/Makefile                         |    4 +-
 arch/x86/boot/a20.c                            |   13 +-
 arch/x86/boot/boot.h                           |    2 +-
 arch/x86/boot/voyager.c                        |    5 +-
 arch/x86/include/asm/apic.h                    |    6 +
 arch/x86/include/asm/bootparam.h               |    5 +-
 arch/x86/include/asm/do_timer.h                |   16 -
 arch/x86/include/asm/entry_arch.h              |   59 ---
 arch/x86/include/asm/hw_irq.h                  |   11 +
 arch/x86/include/asm/mach-voyager/do_timer.h   |   17 -
 arch/x86/include/asm/mach-voyager/entry_arch.h |   26 --
 arch/x86/include/asm/mach-voyager/setup_arch.h |   12 -
 arch/x86/include/asm/mca.h                     |    3 +
 arch/x86/include/asm/setup.h                   |    6 +-
 arch/x86/include/asm/setup_arch.h              |    3 -
 arch/x86/include/asm/smp.h                     |   13 +-
 arch/x86/include/asm/voyager.h                 |   80 ++---
 arch/x86/include/asm/voyager_bios.h            |   21 +
 arch/x86/include/asm/voyager_boot.h            |   27 ++
 arch/x86/include/asm/voyager_vectors.h         |   37 ++
 arch/x86/kernel/apic/apic.c                    |    8 +-
 arch/x86/kernel/apic/ipi.c                     |    2 +-
 arch/x86/kernel/apic/probe_32.c                |    3 +
 arch/x86/kernel/entry_32.S                     |   72 +++-
 arch/x86/kernel/irqinit_32.c                   |   15 +-
 arch/x86/kernel/mca_32.c                       |   12 +
 arch/x86/kernel/probe_roms_32.c                |    1 -
 arch/x86/kernel/setup.c                        |   35 +--
 arch/x86/kernel/smp.c                          |    7 +
 arch/x86/kernel/smpboot.c                      |    2 +-
 arch/x86/kernel/time_32.c                      |   11 +-
 arch/x86/kernel/visws_quirks.c                 |    7 -
 arch/x86/mach-voyager/setup.c                  |   66 ++--
 arch/x86/mach-voyager/voyager_basic.c          |  111 +++---
 arch/x86/mach-voyager/voyager_smp.c            |  544 ++++++++----------------
 arch/x86/mach-voyager/voyager_thread.c         |    5 +-
 arch/x86/xen/smp.c                             |    7 +
 39 files changed, 554 insertions(+), 726 deletions(-)
 delete mode 100644 arch/x86/include/asm/do_timer.h
 delete mode 100644 arch/x86/include/asm/entry_arch.h
 delete mode 100644 arch/x86/include/asm/mach-voyager/do_timer.h
 delete mode 100644 arch/x86/include/asm/mach-voyager/entry_arch.h
 delete mode 100644 arch/x86/include/asm/mach-voyager/setup_arch.h
 delete mode 100644 arch/x86/include/asm/setup_arch.h
 create mode 100644 arch/x86/include/asm/voyager_bios.h
 create mode 100644 arch/x86/include/asm/voyager_boot.h
 create mode 100644 arch/x86/include/asm/voyager_vectors.h

[PATCH 01/14] [VOYAGER] x86: add {safe,hard}_smp_processor_id to smp_ops

[James Bottomley]

Not having apics, Voyager can't use the default apic implementation of
these, it has to read from a special port in the VIC to get the
processor ID, so abstract these functions in smp_ops to allow voyager
to live simultaneously with the apic code.

Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
---
 arch/x86/include/asm/smp.h  |   13 +++++++++++--
 arch/x86/kernel/apic/apic.c |    5 -----
 arch/x86/kernel/apic/ipi.c  |    2 +-
 arch/x86/kernel/smp.c       |    7 +++++++
 arch/x86/xen/smp.c          |    7 +++++++
 5 files changed, 26 insertions(+), 8 deletions(-)

diff --git a/arch/x86/include/asm/smp.h b/arch/x86/include/asm/smp.h
index 19e0d88..aac866f 100644
--- a/arch/x86/include/asm/smp.h
+++ b/arch/x86/include/asm/smp.h
@@ -60,6 +60,8 @@ struct smp_ops {
 
 	void (*send_call_func_ipi)(const struct cpumask *mask);
 	void (*send_call_func_single_ipi)(int cpu);
+	int (*hard_smp_processor_id)(void);
+	int (*safe_smp_processor_id)(void);
 };
 
 /* Globals due to paravirt */
@@ -159,7 +161,11 @@ extern unsigned disabled_cpus __cpuinitdata;
  * so this is correct in the x86 case.
  */
 #define raw_smp_processor_id() (percpu_read(cpu_number))
-extern int safe_smp_processor_id(void);
+int apic_safe_smp_processor_id(void);
+static inline int safe_smp_processor_id(void)
+{
+	return smp_ops.safe_smp_processor_id();
+}
 
 #elif defined(CONFIG_X86_64_SMP)
 #define raw_smp_processor_id() (percpu_read(cpu_number))
@@ -185,7 +191,10 @@ static inline int logical_smp_processor_id(void)
 
 #endif
 
-extern int hard_smp_processor_id(void);
+static inline int hard_smp_processor_id(void)
+{
+	return smp_ops.hard_smp_processor_id();
+}
 
 #else /* CONFIG_X86_LOCAL_APIC */
 
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index f287092..f9e830e 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -1885,11 +1885,6 @@ void __cpuinit generic_processor_info(int apicid, int version)
 	set_cpu_present(cpu, true);
 }
 
-int hard_smp_processor_id(void)
-{
-	return read_apic_id();
-}
-
 void default_init_apic_ldr(void)
 {
 	unsigned long val;
diff --git a/arch/x86/kernel/apic/ipi.c b/arch/x86/kernel/apic/ipi.c
index dbf5445..90bb775 100644
--- a/arch/x86/kernel/apic/ipi.c
+++ b/arch/x86/kernel/apic/ipi.c
@@ -146,7 +146,7 @@ static int convert_apicid_to_cpu(int apic_id)
 	return -1;
 }
 
-int safe_smp_processor_id(void)
+int apic_safe_smp_processor_id(void)
 {
 	int apicid, cpuid;
 
diff --git a/arch/x86/kernel/smp.c b/arch/x86/kernel/smp.c
index 13f33ea..29d0af7 100644
--- a/arch/x86/kernel/smp.c
+++ b/arch/x86/kernel/smp.c
@@ -192,6 +192,11 @@ void smp_call_function_single_interrupt(struct pt_regs *regs)
 	irq_exit();
 }
 
+static int native_hard_smp_processor_id(void)
+{
+	return read_apic_id();
+}
+
 struct smp_ops smp_ops = {
 	.smp_prepare_boot_cpu = native_smp_prepare_boot_cpu,
 	.smp_prepare_cpus = native_smp_prepare_cpus,
@@ -207,5 +212,7 @@ struct smp_ops smp_ops = {
 
 	.send_call_func_ipi = native_send_call_func_ipi,
 	.send_call_func_single_ipi = native_send_call_func_single_ipi,
+	.hard_smp_processor_id = native_hard_smp_processor_id,
+	.safe_smp_processor_id = apic_safe_smp_processor_id,
 };
 EXPORT_SYMBOL_GPL(smp_ops);
diff --git a/arch/x86/xen/smp.c b/arch/x86/xen/smp.c
index 429834e..eb795bf 100644
--- a/arch/x86/xen/smp.c
+++ b/arch/x86/xen/smp.c
@@ -454,6 +454,11 @@ static irqreturn_t xen_call_function_single_interrupt(int irq, void *dev_id)
 	return IRQ_HANDLED;
 }
 
+static int xen_hard_smp_processor_id(void)
+{
+	return read_apic_id();
+}
+
 static const struct smp_ops xen_smp_ops __initdata = {
 	.smp_prepare_boot_cpu = xen_smp_prepare_boot_cpu,
 	.smp_prepare_cpus = xen_smp_prepare_cpus,
@@ -469,6 +474,8 @@ static const struct smp_ops xen_smp_ops __initdata = {
 
 	.send_call_func_ipi = xen_smp_send_call_function_ipi,
 	.send_call_func_single_ipi = xen_smp_send_call_function_single_ipi,
+	.hard_smp_processor_id = xen_hard_smp_processor_id,
+	.safe_smp_processor_id = apic_safe_smp_processor_id,
 };
 
 void __init xen_smp_init(void)
-- 
1.6.2.1

[PATCH 02/14] [VOYAGER] x86/mca: make mca_nmi_hook external

[James Bottomley]

Part of the apic rework brought the mca_nmi_hook to a place where it
can't be accessed by architecture specific code.  Publish it again,
this time as a settable function vector so that voyager can use it.

If there were more than one possible architecture wanting to use this,
it could become a call chain, but there's only one and MCA is an old
bus, so leave it as a single call hook.

Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
---
 arch/x86/include/asm/mca.h |    3 +++
 arch/x86/kernel/mca_32.c   |   12 ++++++++++++
 2 files changed, 15 insertions(+), 0 deletions(-)

diff --git a/arch/x86/include/asm/mca.h b/arch/x86/include/asm/mca.h
index eedbb6c..785a2a4 100644
--- a/arch/x86/include/asm/mca.h
+++ b/arch/x86/include/asm/mca.h
@@ -4,6 +4,9 @@
 #ifndef _ASM_X86_MCA_H
 #define _ASM_X86_MCA_H
 
+/* hook for the bus chain of the MCA NMI */
+extern void (*mca_nmi_hook)(void);
+
 /* Maximal number of MCA slots - actually, some machines have less, but
  * they all have sufficient number of POS registers to cover 8.
  */
diff --git a/arch/x86/kernel/mca_32.c b/arch/x86/kernel/mca_32.c
index 845d80c..4bb3cc9 100644
--- a/arch/x86/kernel/mca_32.c
+++ b/arch/x86/kernel/mca_32.c
@@ -466,6 +466,13 @@ static int __kprobes mca_handle_nmi_callback(struct device *dev, void *data)
 	return 0;
 }
 
+/*
+ *     The MCA (Microchannel Architecture) has an NMI chain for NMI sources
+ *     along the MCA bus.  Use this to hook into that chain if you will need
+ *     it.
+ */
+void (*mca_nmi_hook)(void) = NULL;
+
 void __kprobes mca_handle_nmi(void)
 {
 	/*
@@ -473,4 +480,9 @@ void __kprobes mca_handle_nmi(void)
 	 * adapter was responsible for the error.
 	 */
 	bus_for_each_dev(&mca_bus_type, NULL, NULL, mca_handle_nmi_callback);
+
+	if (mca_nmi_hook)
+		mca_nmi_hook();
+	else
+		pr_warning("NMI generated from unknown source!\n");
 }
-- 
1.6.2.1

[PATCH 03/14] [VOYAGER] x86: add prefill_possible_map to x86_quirks

[James Bottomley]

Voyager needs a different prefill of the possible map, so abstract the
operation through the x86 quirks mechanism.

Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
---
 arch/x86/include/asm/setup.h |    1 +
 arch/x86/kernel/setup.c      |    5 ++++-
 2 files changed, 5 insertions(+), 1 deletions(-)

diff --git a/arch/x86/include/asm/setup.h b/arch/x86/include/asm/setup.h
index bdc2ada..56c99eb 100644
--- a/arch/x86/include/asm/setup.h
+++ b/arch/x86/include/asm/setup.h
@@ -31,6 +31,7 @@ struct x86_quirks {
 	void (*smp_read_mpc_oem)(struct mpc_oemtable *oemtable,
 				unsigned short oemsize);
 	int (*setup_ioapic_ids)(void);
+	void (*prefill_possible_map)(void);
 };
 
 extern void x86_quirk_pre_intr_init(void);
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index b415843..17fc85f 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -960,7 +960,10 @@ void __init setup_arch(char **cmdline_p)
 		get_smp_config();
 #endif
 
-	prefill_possible_map();
+	if (x86_quirks->prefill_possible_map)
+		x86_quirks->prefill_possible_map();
+	else
+		prefill_possible_map();
 
 #ifdef CONFIG_X86_64
 	init_cpu_to_node();
-- 
1.6.2.1

[PATCH 04/14] [VOYAGER] x86: use boot_cpu_id instead of zero for checking boot processor

[James Bottomley]

The function smp_store_cpu_info() checks zero to see if it's
identifying a secondary.  It should check boot_cpu_id.

Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
---
 arch/x86/kernel/smpboot.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index 58d24ef..0567c0a 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -357,7 +357,7 @@ void __cpuinit smp_store_cpu_info(int id)
 
 	copy_cpuinfo_x86(c, &boot_cpu_data);
 	c->cpu_index = id;
-	if (id != 0)
+	if (id != boot_cpu_id)
 		identify_secondary_cpu(c);
 }
 
-- 
1.6.2.1

[PATCH 05/14] [VOYAGER] x86/voyager: Move voyager detection to a new bootparam area

[James Bottomley]

For voyager to be detected in arbitrary configurations, it can no
longer hijack the apm_bios area and must have a bios area of its own,
which this patch implements.

Since the a20 test can't be done on voyager because of VIC
incompatibilities, the voyager detection must come first so the a20
test can do a runtime check of voyager presence.  The runtime check in
is_voyager() relies on boot_params, so move this outside of the _SETUP
include guard in asm/setup.h and remove the separate definition from
boot/boot.h.

Also added is an early printk if voyager is detected to aid in
debugging problems as they arise.

Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
---
 arch/x86/boot/Makefile                |    4 +++-
 arch/x86/boot/a20.c                   |   13 +++++++------
 arch/x86/boot/boot.h                  |    2 +-
 arch/x86/boot/voyager.c               |    5 +++--
 arch/x86/include/asm/bootparam.h      |    5 ++++-
 arch/x86/include/asm/setup.h          |    4 ++--
 arch/x86/include/asm/voyager.h        |   13 +++----------
 arch/x86/include/asm/voyager_bios.h   |   21 +++++++++++++++++++++
 arch/x86/include/asm/voyager_boot.h   |   27 +++++++++++++++++++++++++++
 arch/x86/mach-voyager/voyager_basic.c |    2 +-
 10 files changed, 72 insertions(+), 24 deletions(-)
 create mode 100644 arch/x86/include/asm/voyager_bios.h
 create mode 100644 arch/x86/include/asm/voyager_boot.h

diff --git a/arch/x86/boot/Makefile b/arch/x86/boot/Makefile
index 16bf13d..2c3e84d 100644
--- a/arch/x86/boot/Makefile
+++ b/arch/x86/boot/Makefile
@@ -26,11 +26,13 @@ targets		:= vmlinux.bin setup.bin setup.elf bzImage
 targets		+= fdimage fdimage144 fdimage288 image.iso mtools.conf
 subdir-		:= compressed
 
+# Voyager must come first because there's a condition in a20.c
+# that depends on voyager detection
+setup-$(CONFIG_X86_VOYAGER) += voyager.o
 setup-y		+= a20.o cmdline.o copy.o cpu.o cpucheck.o edd.o
 setup-y		+= header.o main.o mca.o memory.o pm.o pmjump.o
 setup-y		+= printf.o string.o tty.o video.o video-mode.o version.o
 setup-$(CONFIG_X86_APM_BOOT) += apm.o
-setup-$(CONFIG_X86_VOYAGER) += voyager.o
 
 # The link order of the video-*.o modules can matter.  In particular,
 # video-vga.o *must* be listed first, followed by video-vesa.o.
diff --git a/arch/x86/boot/a20.c b/arch/x86/boot/a20.c
index fba8e9c..ecd9561 100644
--- a/arch/x86/boot/a20.c
+++ b/arch/x86/boot/a20.c
@@ -126,11 +126,13 @@ static void enable_a20_fast(void)
 
 int enable_a20(void)
 {
-#ifdef CONFIG_X86_VOYAGER
-	/* On Voyager, a20_test() is unsafe? */
-	enable_a20_kbc();
-	return 0;
-#else
+	if (is_voyager()) {
+		/* On Voyager, a20_test() is unsafe becuase it pokes
+		 * about in areas that are VIC specific and causes
+		 * a crash */
+		enable_a20_kbc();
+		return 0;
+	}
        int loops = A20_ENABLE_LOOPS;
        int kbc_err;
 
@@ -164,5 +166,4 @@ int enable_a20(void)
        }
        
        return -1;
-#endif
 }
diff --git a/arch/x86/boot/boot.h b/arch/x86/boot/boot.h
index cc0ef13..d70323d 100644
--- a/arch/x86/boot/boot.h
+++ b/arch/x86/boot/boot.h
@@ -24,6 +24,7 @@
 #include <linux/edd.h>
 #include <asm/boot.h>
 #include <asm/setup.h>
+#include <asm/voyager_boot.h>
 #include "bitops.h"
 #include <asm/cpufeature.h>
 
@@ -33,7 +34,6 @@
 #define ARRAY_SIZE(x) (sizeof(x) / sizeof(*(x)))
 
 extern struct setup_header hdr;
-extern struct boot_params boot_params;
 
 /* Basic port I/O */
 static inline void outb(u8 v, u16 port)
diff --git a/arch/x86/boot/voyager.c b/arch/x86/boot/voyager.c
index 433909d..c599ff7 100644
--- a/arch/x86/boot/voyager.c
+++ b/arch/x86/boot/voyager.c
@@ -19,9 +19,9 @@ int query_voyager(void)
 	u8 err;
 	u16 es, di;
 	/* Abuse the apm_bios_info area for this */
-	u8 *data_ptr = (u8 *)&boot_params.apm_bios_info;
+	u8 *data_ptr = (u8 *)&boot_params.voyager_bios_info;
 
-	data_ptr[0] = 0xff;	/* Flag on config not found(?) */
+	data_ptr[0] = NOT_VOYAGER_BIOS_SIG;
 
 	asm("pushw %%es ; "
 	    "int $0x15 ; "
@@ -33,6 +33,7 @@ int query_voyager(void)
 
 	if (err)
 		return -1;	/* Not Voyager */
+	printf("Voyager detected\n");
 
 	set_fs(es);
 	copy_from_fs(data_ptr, di, 7);	/* Table is 7 bytes apparently */
diff --git a/arch/x86/include/asm/bootparam.h b/arch/x86/include/asm/bootparam.h
index 433adae..2a388a5 100644
--- a/arch/x86/include/asm/bootparam.h
+++ b/arch/x86/include/asm/bootparam.h
@@ -7,6 +7,7 @@
 #include <linux/edd.h>
 #include <asm/e820.h>
 #include <asm/ist.h>
+#include <asm/voyager_bios.h>
 #include <video/edid.h>
 
 /* setup data types */
@@ -105,7 +106,9 @@ struct boot_params {
 	struct e820entry e820_map[E820MAX];		/* 0x2d0 */
 	__u8  _pad8[48];				/* 0xcd0 */
 	struct edd_info eddbuf[EDDMAXNR];		/* 0xd00 */
-	__u8  _pad9[276];				/* 0xeec */
+	__u8  _pad9[20];				/* 0xeec */
+	struct voyager_bios_info voyager_bios_info;	/* 0xf00 */
+	__u8  _pad10[249];				/* 0xf07 */
 } __attribute__((packed));
 
 #endif /* _ASM_X86_BOOTPARAM_H */
diff --git a/arch/x86/include/asm/setup.h b/arch/x86/include/asm/setup.h
index 56c99eb..c4ff4ff 100644
--- a/arch/x86/include/asm/setup.h
+++ b/arch/x86/include/asm/setup.h
@@ -88,13 +88,13 @@ extern unsigned long saved_video_mode;
 #define paravirt_post_allocator_init()	do {} while (0)
 #endif
 
-#ifndef _SETUP
-
 /*
  * This is set up by the setup-routine at boot-time
  */
 extern struct boot_params boot_params;
 
+#ifndef _SETUP
+
 /*
  * Do NOT EVER look at the BIOS memory size location.
  * It does not work on many machines.
diff --git a/arch/x86/include/asm/voyager.h b/arch/x86/include/asm/voyager.h
index c1635d4..04fd0c9 100644
--- a/arch/x86/include/asm/voyager.h
+++ b/arch/x86/include/asm/voyager.h
@@ -4,6 +4,9 @@
  *
  * Standard include definitions for the NCR Voyager system */
 
+#include <asm/voyager_bios.h>
+#include <asm/voyager_boot.h>
+
 #undef	VOYAGER_DEBUG
 #undef	VOYAGER_CAT_DEBUG
 
@@ -305,16 +308,6 @@ typedef struct voyager_asic_data_table {
 
 
 
-struct voyager_bios_info {
-	__u8	len;
-	__u8	major;
-	__u8	minor;
-	__u8	debug;
-	__u8	num_classes;
-	__u8	class_1;
-	__u8	class_2;
-};
-
 /* The following structures and definitions are for the Kernel/SUS
  * interface these are needed to find out how SUS initialised any Quad
  * boards in the system */
diff --git a/arch/x86/include/asm/voyager_bios.h b/arch/x86/include/asm/voyager_bios.h
new file mode 100644
index 0000000..37b18ec
--- /dev/null
+++ b/arch/x86/include/asm/voyager_bios.h
@@ -0,0 +1,21 @@
+/*
+ * This file is designed to be included in the boot system
+ * so must be as minimal as possible
+ */
+#ifndef _ASM_VOYAGER_BIOS_H
+#define _ASM_VOYAGER_BIOS_H
+
+/* non voyager signature in the len field (voyager bios length is small) */
+#define NOT_VOYAGER_BIOS_SIG	0xff
+
+struct voyager_bios_info {
+	__u8	len;
+	__u8	major;
+	__u8	minor;
+	__u8	debug;
+	__u8	num_classes;
+	__u8	class_1;
+	__u8	class_2;
+};
+
+#endif /* _ASM_VOYAGER_BIOS_H */
diff --git a/arch/x86/include/asm/voyager_boot.h b/arch/x86/include/asm/voyager_boot.h
new file mode 100644
index 0000000..20656b7
--- /dev/null
+++ b/arch/x86/include/asm/voyager_boot.h
@@ -0,0 +1,27 @@
+/*
+ * This file is designed to be included in the boot system
+ * so must be as minimal as possible
+ */
+#ifndef _ASM_VOYAGER_BOOT_H
+#define _ASM_VOYAGER_BOOT_H
+
+#include <asm/setup.h>
+#include <asm/voyager_bios.h>
+
+#ifdef CONFIG_X86_VOYAGER
+
+static inline int is_voyager(void)
+{
+	return boot_params.voyager_bios_info.len != NOT_VOYAGER_BIOS_SIG;
+}
+
+#else
+
+static inline int is_voyager(void)
+{
+	return 0;
+}
+
+#endif /* CONFIG_X86_VOYAGER */
+
+#endif
diff --git a/arch/x86/mach-voyager/voyager_basic.c b/arch/x86/mach-voyager/voyager_basic.c
index 46d6f80..7581b5f 100644
--- a/arch/x86/mach-voyager/voyager_basic.c
+++ b/arch/x86/mach-voyager/voyager_basic.c
@@ -56,7 +56,7 @@ static struct sysrq_key_op sysrq_voyager_dump_op = {
 
 void voyager_detect(struct voyager_bios_info *bios)
 {
-	if (bios->len != 0xff) {
+	if (bios->len != NOT_VOYAGER_BIOS_SIG) {
 		int class = (bios->class_1 << 8)
 		    | (bios->class_2 & 0xff);
 
-- 
1.6.2.1

[PATCH 06/14] [VOYAGER] x86: eliminate subarchitecture file setup_arch.h

[James Bottomley]

This serves no purpose any longer since voyager will reappear as an
explicit quirk function call instead of via the ARCH_SETUP code
insertion.

Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
---
 arch/x86/include/asm/mach-voyager/setup_arch.h |   12 ------------
 arch/x86/include/asm/setup_arch.h              |    3 ---
 arch/x86/kernel/probe_roms_32.c                |    1 -
 arch/x86/kernel/setup.c                        |    7 -------
 4 files changed, 0 insertions(+), 23 deletions(-)
 delete mode 100644 arch/x86/include/asm/mach-voyager/setup_arch.h
 delete mode 100644 arch/x86/include/asm/setup_arch.h

diff --git a/arch/x86/include/asm/mach-voyager/setup_arch.h b/arch/x86/include/asm/mach-voyager/setup_arch.h
deleted file mode 100644
index 71729ca..0000000
--- a/arch/x86/include/asm/mach-voyager/setup_arch.h
+++ /dev/null
@@ -1,12 +0,0 @@
-#include <asm/voyager.h>
-#include <asm/setup.h>
-#define VOYAGER_BIOS_INFO ((struct voyager_bios_info *) \
-			(&boot_params.apm_bios_info))
-
-/* Hook to call BIOS initialisation function */
-
-/* for voyager, pass the voyager BIOS/SUS info area to the detection
- * routines */
-
-#define ARCH_SETUP	voyager_detect(VOYAGER_BIOS_INFO);
-
diff --git a/arch/x86/include/asm/setup_arch.h b/arch/x86/include/asm/setup_arch.h
deleted file mode 100644
index 3884620..0000000
--- a/arch/x86/include/asm/setup_arch.h
+++ /dev/null
@@ -1,3 +0,0 @@
-/* Hook to call BIOS initialisation function */
-
-/* no action for generic */
diff --git a/arch/x86/kernel/probe_roms_32.c b/arch/x86/kernel/probe_roms_32.c
index 071e7fe..d683a43 100644
--- a/arch/x86/kernel/probe_roms_32.c
+++ b/arch/x86/kernel/probe_roms_32.c
@@ -18,7 +18,6 @@
 #include <asm/setup.h>
 #include <asm/sections.h>
 #include <asm/io.h>
-#include <asm/setup_arch.h>
 
 static struct resource system_rom_resource = {
 	.name	= "System ROM",
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index 17fc85f..43f81f0 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -82,7 +82,6 @@
 #include <asm/io_apic.h>
 #include <asm/ist.h>
 #include <asm/vmi.h>
-#include <asm/setup_arch.h>
 #include <asm/bios_ebda.h>
 #include <asm/cacheflush.h>
 #include <asm/processor.h>
@@ -108,10 +107,6 @@
 #include <asm/numa_64.h>
 #endif
 
-#ifndef ARCH_SETUP
-#define ARCH_SETUP
-#endif
-
 RESERVE_BRK(dmi_alloc, 65536);
 
 unsigned int boot_cpu_id __read_mostly;
@@ -725,8 +720,6 @@ void __init setup_arch(char **cmdline_p)
 	}
 #endif
 
-	ARCH_SETUP
-
 	setup_memory_map();
 	parse_setup_data();
 	/* update the e820_saved too */
-- 
1.6.2.1

[PATCH 07/14] [VOYAGER] x86: eliminate subarchitecture file entry_arch.h

[James Bottomley]

This was a subarchitecture file designed to customise the vector gate
building functions.  Since only voyager and the standard PC
subarchitectures now have a copy, they can both be merged into
entry_32.S surrounded by the appropriate ifdefs.

As part of this reorganisation, split the voyager interrupt vectors
out into a separate include file (asm/voyager_vectors.h) that can be
included into a .S file rather than hacking voyager.h up to include
the appropriate _ASSEMBLY_ gates.

Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
---
 arch/x86/include/asm/entry_arch.h              |   59 -------------------
 arch/x86/include/asm/hw_irq.h                  |   11 ++++
 arch/x86/include/asm/mach-voyager/entry_arch.h |   26 ---------
 arch/x86/include/asm/voyager.h                 |   34 +-----------
 arch/x86/include/asm/voyager_vectors.h         |   37 ++++++++++++
 arch/x86/kernel/entry_32.S                     |   72 +++++++++++++++++++++++-
 6 files changed, 119 insertions(+), 120 deletions(-)
 delete mode 100644 arch/x86/include/asm/entry_arch.h
 delete mode 100644 arch/x86/include/asm/mach-voyager/entry_arch.h
 create mode 100644 arch/x86/include/asm/voyager_vectors.h

diff --git a/arch/x86/include/asm/entry_arch.h b/arch/x86/include/asm/entry_arch.h
deleted file mode 100644
index c2e6bed..0000000
--- a/arch/x86/include/asm/entry_arch.h
+++ /dev/null
@@ -1,59 +0,0 @@
-/*
- * This file is designed to contain the BUILD_INTERRUPT specifications for
- * all of the extra named interrupt vectors used by the architecture.
- * Usually this is the Inter Process Interrupts (IPIs)
- */
-
-/*
- * The following vectors are part of the Linux architecture, there
- * is no hardware IRQ pin equivalent for them, they are triggered
- * through the ICC by us (IPIs)
- */
-#ifdef CONFIG_SMP
-BUILD_INTERRUPT(reschedule_interrupt,RESCHEDULE_VECTOR)
-BUILD_INTERRUPT(call_function_interrupt,CALL_FUNCTION_VECTOR)
-BUILD_INTERRUPT(call_function_single_interrupt,CALL_FUNCTION_SINGLE_VECTOR)
-BUILD_INTERRUPT(irq_move_cleanup_interrupt,IRQ_MOVE_CLEANUP_VECTOR)
-
-BUILD_INTERRUPT3(invalidate_interrupt0,INVALIDATE_TLB_VECTOR_START+0,
-		 smp_invalidate_interrupt)
-BUILD_INTERRUPT3(invalidate_interrupt1,INVALIDATE_TLB_VECTOR_START+1,
-		 smp_invalidate_interrupt)
-BUILD_INTERRUPT3(invalidate_interrupt2,INVALIDATE_TLB_VECTOR_START+2,
-		 smp_invalidate_interrupt)
-BUILD_INTERRUPT3(invalidate_interrupt3,INVALIDATE_TLB_VECTOR_START+3,
-		 smp_invalidate_interrupt)
-BUILD_INTERRUPT3(invalidate_interrupt4,INVALIDATE_TLB_VECTOR_START+4,
-		 smp_invalidate_interrupt)
-BUILD_INTERRUPT3(invalidate_interrupt5,INVALIDATE_TLB_VECTOR_START+5,
-		 smp_invalidate_interrupt)
-BUILD_INTERRUPT3(invalidate_interrupt6,INVALIDATE_TLB_VECTOR_START+6,
-		 smp_invalidate_interrupt)
-BUILD_INTERRUPT3(invalidate_interrupt7,INVALIDATE_TLB_VECTOR_START+7,
-		 smp_invalidate_interrupt)
-#endif
-
-BUILD_INTERRUPT(generic_interrupt, GENERIC_INTERRUPT_VECTOR)
-
-/*
- * every pentium local APIC has two 'local interrupts', with a
- * soft-definable vector attached to both interrupts, one of
- * which is a timer interrupt, the other one is error counter
- * overflow. Linux uses the local APIC timer interrupt to get
- * a much simpler SMP time architecture:
- */
-#ifdef CONFIG_X86_LOCAL_APIC
-
-BUILD_INTERRUPT(apic_timer_interrupt,LOCAL_TIMER_VECTOR)
-BUILD_INTERRUPT(error_interrupt,ERROR_APIC_VECTOR)
-BUILD_INTERRUPT(spurious_interrupt,SPURIOUS_APIC_VECTOR)
-
-#ifdef CONFIG_PERF_COUNTERS
-BUILD_INTERRUPT(perf_counter_interrupt, LOCAL_PERF_VECTOR)
-#endif
-
-#ifdef CONFIG_X86_MCE_P4THERMAL
-BUILD_INTERRUPT(thermal_interrupt,THERMAL_APIC_VECTOR)
-#endif
-
-#endif
diff --git a/arch/x86/include/asm/hw_irq.h b/arch/x86/include/asm/hw_irq.h
index b762ea4..fff91c3 100644
--- a/arch/x86/include/asm/hw_irq.h
+++ b/arch/x86/include/asm/hw_irq.h
@@ -75,6 +75,17 @@ extern atomic_t irq_mis_count;
 /* EISA */
 extern void eisa_set_level_irq(unsigned int irq);
 
+/* Voyager functions */
+extern asmlinkage void vic_cpi_interrupt(void);
+extern asmlinkage void vic_sys_interrupt(void);
+extern asmlinkage void vic_cmn_interrupt(void);
+extern asmlinkage void qic_timer_interrupt(void);
+extern asmlinkage void qic_invalidate_interrupt(void);
+extern asmlinkage void qic_reschedule_interrupt(void);
+extern asmlinkage void qic_enable_irq_interrupt(void);
+extern asmlinkage void qic_call_function_interrupt(void);
+extern asmlinkage void qic_call_function_single_interrupt(void);
+
 /* SMP */
 extern void smp_apic_timer_interrupt(struct pt_regs *);
 extern void smp_spurious_interrupt(struct pt_regs *);
diff --git a/arch/x86/include/asm/mach-voyager/entry_arch.h b/arch/x86/include/asm/mach-voyager/entry_arch.h
deleted file mode 100644
index ae52624..0000000
--- a/arch/x86/include/asm/mach-voyager/entry_arch.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/* -*- mode: c; c-basic-offset: 8 -*- */
-
-/* Copyright (C) 2002
- *
- * Author: James.Bottomley@HansenPartnership.com
- *
- * linux/arch/i386/voyager/entry_arch.h
- *
- * This file builds the VIC and QIC CPI gates
- */
-
-/* initialise the voyager interrupt gates 
- *
- * This uses the macros in irq.h to set up assembly jump gates.  The
- * calls are then redirected to the same routine with smp_ prefixed */
-BUILD_INTERRUPT(vic_sys_interrupt, VIC_SYS_INT)
-BUILD_INTERRUPT(vic_cmn_interrupt, VIC_CMN_INT)
-BUILD_INTERRUPT(vic_cpi_interrupt, VIC_CPI_LEVEL0);
-
-/* do all the QIC interrupts */
-BUILD_INTERRUPT(qic_timer_interrupt, QIC_TIMER_CPI);
-BUILD_INTERRUPT(qic_invalidate_interrupt, QIC_INVALIDATE_CPI);
-BUILD_INTERRUPT(qic_reschedule_interrupt, QIC_RESCHEDULE_CPI);
-BUILD_INTERRUPT(qic_enable_irq_interrupt, QIC_ENABLE_IRQ_CPI);
-BUILD_INTERRUPT(qic_call_function_interrupt, QIC_CALL_FUNCTION_CPI);
-BUILD_INTERRUPT(qic_call_function_single_interrupt, QIC_CALL_FUNCTION_SINGLE_CPI);
diff --git a/arch/x86/include/asm/voyager.h b/arch/x86/include/asm/voyager.h
index 04fd0c9..c03a6aa 100644
--- a/arch/x86/include/asm/voyager.h
+++ b/arch/x86/include/asm/voyager.h
@@ -6,6 +6,7 @@
 
 #include <asm/voyager_bios.h>
 #include <asm/voyager_boot.h>
+#include <asm/voyager_vectors.h>
 
 #undef	VOYAGER_DEBUG
 #undef	VOYAGER_CAT_DEBUG
@@ -521,39 +522,6 @@ extern void voyager_smp_intr_init(void);
 #define VOYAGER_PSI_SUBWRITE	3
 extern void voyager_cat_psi(__u8, __u16, __u8 *);
 
-/* These define the CPIs we use in linux */
-#define VIC_CPI_LEVEL0			0
-#define VIC_CPI_LEVEL1			1
-/* now the fake CPIs */
-#define VIC_TIMER_CPI			2
-#define VIC_INVALIDATE_CPI		3
-#define VIC_RESCHEDULE_CPI		4
-#define VIC_ENABLE_IRQ_CPI		5
-#define VIC_CALL_FUNCTION_CPI		6
-#define VIC_CALL_FUNCTION_SINGLE_CPI	7
-
-/* Now the QIC CPIs:  Since we don't need the two initial levels,
- * these are 2 less than the VIC CPIs */
-#define QIC_CPI_OFFSET			1
-#define QIC_TIMER_CPI			(VIC_TIMER_CPI - QIC_CPI_OFFSET)
-#define QIC_INVALIDATE_CPI		(VIC_INVALIDATE_CPI - QIC_CPI_OFFSET)
-#define QIC_RESCHEDULE_CPI		(VIC_RESCHEDULE_CPI - QIC_CPI_OFFSET)
-#define QIC_ENABLE_IRQ_CPI		(VIC_ENABLE_IRQ_CPI - QIC_CPI_OFFSET)
-#define QIC_CALL_FUNCTION_CPI		(VIC_CALL_FUNCTION_CPI - QIC_CPI_OFFSET)
-#define QIC_CALL_FUNCTION_SINGLE_CPI	(VIC_CALL_FUNCTION_SINGLE_CPI - QIC_CPI_OFFSET)
-
-#define VIC_START_FAKE_CPI		VIC_TIMER_CPI
-#define VIC_END_FAKE_CPI		VIC_CALL_FUNCTION_SINGLE_CPI
-
-/* this is the SYS_INT CPI. */
-#define VIC_SYS_INT			8
-#define VIC_CMN_INT			15
-
-/* This is the boot CPI for alternate processors.  It gets overwritten
- * by the above once the system has activated all available processors */
-#define VIC_CPU_BOOT_CPI		VIC_CPI_LEVEL0
-#define VIC_CPU_BOOT_ERRATA_CPI		(VIC_CPI_LEVEL0 + 8)
-
 extern asmlinkage void vic_cpi_interrupt(void);
 extern asmlinkage void vic_sys_interrupt(void);
 extern asmlinkage void vic_cmn_interrupt(void);
diff --git a/arch/x86/include/asm/voyager_vectors.h b/arch/x86/include/asm/voyager_vectors.h
new file mode 100644
index 0000000..bd6c87b
--- /dev/null
+++ b/arch/x86/include/asm/voyager_vectors.h
@@ -0,0 +1,37 @@
+#ifndef _ASM_VOYAGER_VECTORS_H
+#define _ASM_VOYAGER_VECTORS_H
+
+/* These define the CPIs we use in linux */
+#define VIC_CPI_LEVEL0			0
+#define VIC_CPI_LEVEL1			1
+/* now the fake CPIs */
+#define VIC_TIMER_CPI			2
+#define VIC_INVALIDATE_CPI		3
+#define VIC_RESCHEDULE_CPI		4
+#define VIC_ENABLE_IRQ_CPI		5
+#define VIC_CALL_FUNCTION_CPI		6
+#define VIC_CALL_FUNCTION_SINGLE_CPI	7
+
+/* Now the QIC CPIs:  Since we don't need the two initial levels,
+ * these are 2 less than the VIC CPIs */
+#define QIC_CPI_OFFSET			1
+#define QIC_TIMER_CPI			(VIC_TIMER_CPI - QIC_CPI_OFFSET)
+#define QIC_INVALIDATE_CPI		(VIC_INVALIDATE_CPI - QIC_CPI_OFFSET)
+#define QIC_RESCHEDULE_CPI		(VIC_RESCHEDULE_CPI - QIC_CPI_OFFSET)
+#define QIC_ENABLE_IRQ_CPI		(VIC_ENABLE_IRQ_CPI - QIC_CPI_OFFSET)
+#define QIC_CALL_FUNCTION_CPI		(VIC_CALL_FUNCTION_CPI - QIC_CPI_OFFSET)
+#define QIC_CALL_FUNCTION_SINGLE_CPI	(VIC_CALL_FUNCTION_SINGLE_CPI - QIC_CPI_OFFSET)
+
+#define VIC_START_FAKE_CPI		VIC_TIMER_CPI
+#define VIC_END_FAKE_CPI		VIC_CALL_FUNCTION_SINGLE_CPI
+
+/* this is the SYS_INT CPI. */
+#define VIC_SYS_INT			8
+#define VIC_CMN_INT			15
+
+/* This is the boot CPI for alternate processors.  It gets overwritten
+ * by the above once the system has activated all available processors */
+#define VIC_CPU_BOOT_CPI		VIC_CPI_LEVEL0
+#define VIC_CPU_BOOT_ERRATA_CPI		(VIC_CPI_LEVEL0 + 8)
+
+#endif
diff --git a/arch/x86/kernel/entry_32.S b/arch/x86/kernel/entry_32.S
index c929add..f87439e 100644
--- a/arch/x86/kernel/entry_32.S
+++ b/arch/x86/kernel/entry_32.S
@@ -54,6 +54,7 @@
 #include <asm/processor-flags.h>
 #include <asm/ftrace.h>
 #include <asm/irq_vectors.h>
+#include <asm/voyager_vectors.h>
 
 /* Avoid __ASSEMBLER__'ifying <linux/audit.h> just for this.  */
 #include <linux/elf-em.h>
@@ -809,8 +810,75 @@ ENDPROC(name)
 
 #define BUILD_INTERRUPT(name, nr)	BUILD_INTERRUPT3(name, nr, smp_##name)
 
-/* The include is where all of the SMP etc. interrupts come from */
-#include <asm/entry_arch.h>
+/*
+ * The following vectors are part of the Linux architecture, there
+ * is no hardware IRQ pin equivalent for them, they are triggered
+ * through the ICC by us (IPIs)
+ */
+#ifdef CONFIG_SMP
+BUILD_INTERRUPT(reschedule_interrupt,RESCHEDULE_VECTOR)
+BUILD_INTERRUPT(call_function_interrupt,CALL_FUNCTION_VECTOR)
+BUILD_INTERRUPT(call_function_single_interrupt,CALL_FUNCTION_SINGLE_VECTOR)
+BUILD_INTERRUPT(irq_move_cleanup_interrupt,IRQ_MOVE_CLEANUP_VECTOR)
+
+BUILD_INTERRUPT3(invalidate_interrupt0,INVALIDATE_TLB_VECTOR_START+0,
+		 smp_invalidate_interrupt)
+BUILD_INTERRUPT3(invalidate_interrupt1,INVALIDATE_TLB_VECTOR_START+1,
+		 smp_invalidate_interrupt)
+BUILD_INTERRUPT3(invalidate_interrupt2,INVALIDATE_TLB_VECTOR_START+2,
+		 smp_invalidate_interrupt)
+BUILD_INTERRUPT3(invalidate_interrupt3,INVALIDATE_TLB_VECTOR_START+3,
+		 smp_invalidate_interrupt)
+BUILD_INTERRUPT3(invalidate_interrupt4,INVALIDATE_TLB_VECTOR_START+4,
+		 smp_invalidate_interrupt)
+BUILD_INTERRUPT3(invalidate_interrupt5,INVALIDATE_TLB_VECTOR_START+5,
+		 smp_invalidate_interrupt)
+BUILD_INTERRUPT3(invalidate_interrupt6,INVALIDATE_TLB_VECTOR_START+6,
+		 smp_invalidate_interrupt)
+BUILD_INTERRUPT3(invalidate_interrupt7,INVALIDATE_TLB_VECTOR_START+7,
+		 smp_invalidate_interrupt)
+#endif
+
+BUILD_INTERRUPT(generic_interrupt, GENERIC_INTERRUPT_VECTOR)
+
+/*
+ * every pentium local APIC has two 'local interrupts', with a
+ * soft-definable vector attached to both interrupts, one of
+ * which is a timer interrupt, the other one is error counter
+ * overflow. Linux uses the local APIC timer interrupt to get
+ * a much simpler SMP time architecture:
+ */
+#ifdef CONFIG_X86_LOCAL_APIC
+
+BUILD_INTERRUPT(apic_timer_interrupt,LOCAL_TIMER_VECTOR)
+BUILD_INTERRUPT(error_interrupt,ERROR_APIC_VECTOR)
+BUILD_INTERRUPT(spurious_interrupt,SPURIOUS_APIC_VECTOR)
+
+#ifdef CONFIG_PERF_COUNTERS
+BUILD_INTERRUPT(perf_counter_interrupt, LOCAL_PERF_VECTOR)
+#endif
+
+#ifdef CONFIG_X86_MCE_P4THERMAL
+BUILD_INTERRUPT(thermal_interrupt,THERMAL_APIC_VECTOR)
+#endif
+
+#if defined(CONFIG_X86_VOYAGER) && defined(CONFIG_SMP)
+BUILD_INTERRUPT(vic_sys_interrupt, VIC_SYS_INT)
+BUILD_INTERRUPT(vic_cmn_interrupt, VIC_CMN_INT)
+BUILD_INTERRUPT(vic_cpi_interrupt, VIC_CPI_LEVEL0);
+
+/* do all the QIC interrupts */
+BUILD_INTERRUPT(qic_timer_interrupt, QIC_TIMER_CPI);
+BUILD_INTERRUPT(qic_invalidate_interrupt, QIC_INVALIDATE_CPI);
+BUILD_INTERRUPT(qic_reschedule_interrupt, QIC_RESCHEDULE_CPI);
+BUILD_INTERRUPT(qic_enable_irq_interrupt, QIC_ENABLE_IRQ_CPI);
+BUILD_INTERRUPT(qic_call_function_interrupt, QIC_CALL_FUNCTION_CPI);
+BUILD_INTERRUPT(qic_call_function_single_interrupt,
+		 QIC_CALL_FUNCTION_SINGLE_CPI);
+#endif
+
+#endif
+
 
 ENTRY(coprocessor_error)
 	RING0_INT_FRAME
-- 
1.6.2.1

[PATCH 08/14] [VOYAGER] x86: eliminate subarchitecture file do_timer.h

[James Bottomley]

This one's a bit complex: voyager still needs a timer interrupt hook
because it doesn't have local apic timers and the scheduler relies on
each CPU ticking, so voyager must rebroadcast the pit clock.

Pull in the standard do_timer.h to time_32.c: all it was doing was
calling the global_clock_event event_handler.  However, also add a
specific voyager hook: voyager_timer_interrupt().

Hedge the asm/voyager.h file around with proper include guards and
make sure voyager_timer_interrupt() is inline empty if
CONFIG_X86_VOYAGER isn't defined.  Also add an is_voyager() check to
terminate the voyager_timer_interrupt() hook in case voyager is
compiled in but booted on a non-voayger architecture.

Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
---
 arch/x86/include/asm/do_timer.h              |   16 ----------------
 arch/x86/include/asm/mach-voyager/do_timer.h |   17 -----------------
 arch/x86/include/asm/voyager.h               |   14 ++++++++++++++
 arch/x86/kernel/time_32.c                    |   11 +++++++----
 arch/x86/mach-voyager/voyager_basic.c        |    3 +++
 5 files changed, 24 insertions(+), 37 deletions(-)
 delete mode 100644 arch/x86/include/asm/do_timer.h
 delete mode 100644 arch/x86/include/asm/mach-voyager/do_timer.h

diff --git a/arch/x86/include/asm/do_timer.h b/arch/x86/include/asm/do_timer.h
deleted file mode 100644
index 23ecda0..0000000
--- a/arch/x86/include/asm/do_timer.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/* defines for inline arch setup functions */
-#include <linux/clockchips.h>
-
-#include <asm/i8259.h>
-#include <asm/i8253.h>
-
-/**
- * do_timer_interrupt_hook - hook into timer tick
- *
- * Call the pit clock event handler. see asm/i8253.h
- **/
-
-static inline void do_timer_interrupt_hook(void)
-{
-	global_clock_event->event_handler(global_clock_event);
-}
diff --git a/arch/x86/include/asm/mach-voyager/do_timer.h b/arch/x86/include/asm/mach-voyager/do_timer.h
deleted file mode 100644
index 9e5a459..0000000
--- a/arch/x86/include/asm/mach-voyager/do_timer.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/* defines for inline arch setup functions */
-#include <linux/clockchips.h>
-
-#include <asm/voyager.h>
-#include <asm/i8253.h>
-
-/**
- * do_timer_interrupt_hook - hook into timer tick
- *
- * Call the pit clock event handler. see asm/i8253.h
- **/
-static inline void do_timer_interrupt_hook(void)
-{
-	global_clock_event->event_handler(global_clock_event);
-	voyager_timer_interrupt();
-}
-
diff --git a/arch/x86/include/asm/voyager.h b/arch/x86/include/asm/voyager.h
index c03a6aa..b38a241 100644
--- a/arch/x86/include/asm/voyager.h
+++ b/arch/x86/include/asm/voyager.h
@@ -3,11 +3,15 @@
  * Author: J.E.J.Bottomley@HansenPartnership.com
  *
  * Standard include definitions for the NCR Voyager system */
+#ifndef _ASM_VOYAGER_H
+#define _ASM_VOYAGER_H
 
 #include <asm/voyager_bios.h>
 #include <asm/voyager_boot.h>
 #include <asm/voyager_vectors.h>
 
+#ifdef CONFIG_X86_VOYAGER
+
 #undef	VOYAGER_DEBUG
 #undef	VOYAGER_CAT_DEBUG
 
@@ -530,3 +534,13 @@ extern asmlinkage void qic_invalidate_interrupt(void);
 extern asmlinkage void qic_reschedule_interrupt(void);
 extern asmlinkage void qic_enable_irq_interrupt(void);
 extern asmlinkage void qic_call_function_interrupt(void);
+
+#else /* CONFIG_X86_VOYAGER */
+
+static inline void voyager_timer_interrupt(void)
+{
+}
+
+#endif /* CONFIG_X86_VOYAGER */
+
+#endif
diff --git a/arch/x86/kernel/time_32.c b/arch/x86/kernel/time_32.c
index 5c5d87f..dcbe82a 100644
--- a/arch/x86/kernel/time_32.c
+++ b/arch/x86/kernel/time_32.c
@@ -28,6 +28,7 @@
  *	serialize accesses to xtime/lost_ticks).
  */
 
+#include <linux/clockchips.h>
 #include <linux/init.h>
 #include <linux/interrupt.h>
 #include <linux/time.h>
@@ -37,8 +38,9 @@
 #include <asm/hpet.h>
 #include <asm/time.h>
 #include <asm/timer.h>
-
-#include <asm/do_timer.h>
+#include <asm/i8253.h>
+#include <asm/i8259.h>
+#include <asm/voyager.h>
 
 int timer_ack;
 
@@ -91,8 +93,9 @@ irqreturn_t timer_interrupt(int irq, void *dev_id)
 		spin_unlock(&i8259A_lock);
 	}
 #endif
-
-	do_timer_interrupt_hook();
+	if (global_clock_event->event_handler)
+		global_clock_event->event_handler(global_clock_event);
+	voyager_timer_interrupt();
 
 #ifdef CONFIG_MCA
 	if (MCA_bus) {
diff --git a/arch/x86/mach-voyager/voyager_basic.c b/arch/x86/mach-voyager/voyager_basic.c
index 7581b5f..7c97c9a 100644
--- a/arch/x86/mach-voyager/voyager_basic.c
+++ b/arch/x86/mach-voyager/voyager_basic.c
@@ -161,6 +161,9 @@ int __init voyager_memory_detect(int region, __u32 * start, __u32 * length)
  * internal timer (The QIC does, but that's another story). */
 void voyager_timer_interrupt(void)
 {
+	if (!is_voyager())
+		return;
+
 	if ((jiffies & 0x3ff) == 0) {
 
 		/* There seems to be something flaky in either
-- 
1.6.2.1

[PATCH 09/14] [VOYAGER] x86: redo irq2 cascade setup

[James Bottomley]

The cascade setup really needs to be done as part of the
arch_intr_init() because you might need the machine vectors all
plumbed in before you set up the cascade.

Fix this by moving the current check in irqinit_32.c to the correct
place and also directly calling the x86_quirk hook from there.  Tidy
up visws (and eventually voyager) which do their own irq2
initialisation but which could quite easily use the generic one.

Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
---
 arch/x86/include/asm/setup.h   |    1 -
 arch/x86/kernel/irqinit_32.c   |   15 +++++++++------
 arch/x86/kernel/setup.c        |   17 -----------------
 arch/x86/kernel/visws_quirks.c |    7 -------
 arch/x86/mach-voyager/setup.c  |   11 -----------
 5 files changed, 9 insertions(+), 42 deletions(-)

diff --git a/arch/x86/include/asm/setup.h b/arch/x86/include/asm/setup.h
index c4ff4ff..2b149d6 100644
--- a/arch/x86/include/asm/setup.h
+++ b/arch/x86/include/asm/setup.h
@@ -35,7 +35,6 @@ struct x86_quirks {
 };
 
 extern void x86_quirk_pre_intr_init(void);
-extern void x86_quirk_intr_init(void);
 
 extern void x86_quirk_trap_init(void);
 
diff --git a/arch/x86/kernel/irqinit_32.c b/arch/x86/kernel/irqinit_32.c
index 368b0a8..bc8d528 100644
--- a/arch/x86/kernel/irqinit_32.c
+++ b/arch/x86/kernel/irqinit_32.c
@@ -186,14 +186,17 @@ void __init native_init_IRQ(void)
 	alloc_intr_gate(THERMAL_APIC_VECTOR, thermal_interrupt);
 #endif
 
-	if (!acpi_ioapic)
-		setup_irq(2, &irq2);
-
 	/*
-	 * Call quirks after call gates are initialised (usually add in
-	 * the architecture specific gates):
+	 * setup after call gates are initialised (usually add in the
+	 * architecture specific gates).  Populating the
+	 * arch_intr_init x86_quirk allows final gate setup.  If the
+	 * quirk returns true, the cascade interrupt will not be setup
+	 * unless acpi_ioapic is zero
 	 */
-	x86_quirk_intr_init();
+
+	if ((x86_quirks->arch_intr_init && !x86_quirks->arch_intr_init()) ||
+	    (!x86_quirks->arch_intr_init && !acpi_ioapic))
+		setup_irq(2, &irq2);
 
 	/*
 	 * External FPU? Set up irq13 if so, for
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index 43f81f0..bee0914 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -1011,23 +1011,6 @@ void __init x86_quirk_pre_intr_init(void)
 }
 
 /**
- * x86_quirk_intr_init - post gate setup interrupt initialisation
- *
- * Description:
- *	Fill in any interrupts that may have been left out by the general
- *	init_IRQ() routine.  interrupts having to do with the machine rather
- *	than the devices on the I/O bus (like APIC interrupts in intel MP
- *	systems) are started here.
- **/
-void __init x86_quirk_intr_init(void)
-{
-	if (x86_quirks->arch_intr_init) {
-		if (x86_quirks->arch_intr_init())
-			return;
-	}
-}
-
-/**
  * x86_quirk_trap_init - initialise system specific traps
  *
  * Description:
diff --git a/arch/x86/kernel/visws_quirks.c b/arch/x86/kernel/visws_quirks.c
index 31ffc24..42de9eb 100644
--- a/arch/x86/kernel/visws_quirks.c
+++ b/arch/x86/kernel/visws_quirks.c
@@ -645,12 +645,6 @@ static struct irqaction master_action = {
 	.name =		"PIIX4-8259",
 };
 
-static struct irqaction cascade_action = {
-	.handler = 	no_action,
-	.name =		"cascade",
-};
-
-
 void init_VISWS_APIC_irqs(void)
 {
 	int i;
@@ -683,5 +677,4 @@ void init_VISWS_APIC_irqs(void)
 	}
 
 	setup_irq(CO_IRQ_8259, &master_action);
-	setup_irq(2, &cascade_action);
 }
diff --git a/arch/x86/mach-voyager/setup.c b/arch/x86/mach-voyager/setup.c
index 88c3c55..e4516a8 100644
--- a/arch/x86/mach-voyager/setup.c
+++ b/arch/x86/mach-voyager/setup.c
@@ -16,22 +16,11 @@ void __init pre_intr_init_hook(void)
 	init_ISA_irqs();
 }
 
-/*
- * IRQ2 is cascade interrupt to second interrupt controller
- */
-static struct irqaction irq2 = {
-	.handler = no_action,
-	.mask = CPU_MASK_NONE,
-	.name = "cascade",
-};
-
 void __init intr_init_hook(void)
 {
 #ifdef CONFIG_SMP
 	voyager_smp_intr_init();
 #endif
-
-	setup_irq(2, &irq2);
 }
 
 static void voyager_disable_tsc(void)
-- 
1.6.2.1

[PATCH 10/14] [VOYAGER] x86: make disabling the apics functional instead of a flag

[James Bottomley]

This allows the elimination of some ifdef guards in setup.c.
Additionally probe_32.c doesn't need to run through the apics in
generic_apic_probe() if they're disabled.

Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
---
 arch/x86/include/asm/apic.h     |    6 ++++++
 arch/x86/kernel/apic/apic.c     |    3 +++
 arch/x86/kernel/apic/probe_32.c |    3 +++
 arch/x86/kernel/setup.c         |    4 +---
 4 files changed, 13 insertions(+), 3 deletions(-)

diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index 42f2f83..391c464 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -246,12 +246,18 @@ static inline int apic_is_clustered_box(void)
 extern u8 setup_APIC_eilvt_mce(u8 vector, u8 msg_type, u8 mask);
 extern u8 setup_APIC_eilvt_ibs(u8 vector, u8 msg_type, u8 mask);
 
+static inline void disable_APIC(void)
+{
+	disable_local_APIC();
+	disable_apic = 1;
+}
 
 #else /* !CONFIG_X86_LOCAL_APIC */
 static inline void lapic_shutdown(void) { }
 #define local_apic_timer_c2_ok		1
 static inline void init_apic_mappings(void) { }
 static inline void disable_local_APIC(void) { }
+static inline void disable_APIC(void) { }
 
 #endif /* !CONFIG_X86_LOCAL_APIC */
 
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index f9e830e..aa96dbe 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -1539,6 +1539,9 @@ void __init early_init_lapic_mapping(void)
  */
 void __init init_apic_mappings(void)
 {
+	if (disable_apic)
+		return;
+
 	if (x2apic) {
 		boot_cpu_physical_apicid = read_apic_id();
 		return;
diff --git a/arch/x86/kernel/apic/probe_32.c b/arch/x86/kernel/apic/probe_32.c
index 01eda2a..049d7a0 100644
--- a/arch/x86/kernel/apic/probe_32.c
+++ b/arch/x86/kernel/apic/probe_32.c
@@ -226,6 +226,9 @@ void __init generic_bigsmp_probe(void)
 
 void __init generic_apic_probe(void)
 {
+	if (disable_apic)
+		return;
+
 	if (!cmdline_apic) {
 		int i;
 		for (i = 0; apic_probe[i]; i++) {
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index bee0914..13779e2 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -770,9 +770,7 @@ void __init setup_arch(char **cmdline_p)
 	reserve_early_setup_data();
 
 	if (acpi_mps_check()) {
-#ifdef CONFIG_X86_LOCAL_APIC
-		disable_apic = 1;
-#endif
+		disable_APIC();
 		setup_clear_cpu_cap(X86_FEATURE_APIC);
 	}
 
-- 
1.6.2.1

[PATCH 11/14] [VOYAGER] x86/Voyager: add missing QIC call function single gate

[James Bottomley]

Apparently this was never plugged into the QIC (it was plugged into
the VIC).  The lack was detected during testing of smp_call_function()
based flushing.

Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
---
 arch/x86/mach-voyager/voyager_smp.c |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/arch/x86/mach-voyager/voyager_smp.c b/arch/x86/mach-voyager/voyager_smp.c
index 98e3c2b..84d1d7f 100644
--- a/arch/x86/mach-voyager/voyager_smp.c
+++ b/arch/x86/mach-voyager/voyager_smp.c
@@ -1266,6 +1266,8 @@ void __init voyager_smp_intr_init(void)
 	QIC_SET_GATE(QIC_RESCHEDULE_CPI, qic_reschedule_interrupt);
 	QIC_SET_GATE(QIC_ENABLE_IRQ_CPI, qic_enable_irq_interrupt);
 	QIC_SET_GATE(QIC_CALL_FUNCTION_CPI, qic_call_function_interrupt);
+	QIC_SET_GATE(QIC_CALL_FUNCTION_SINGLE_CPI,
+		     qic_call_function_single_interrupt);
 
 	/* now put the VIC descriptor into the first 48 IRQs
 	 *
-- 
1.6.2.1

[PATCH 12/14] [VOYAGER] x86/Voyager: replace inline io area reads with readX accessors

[James Bottomley]

Some of the memory manipulations done to reset QIC CPIs and to check
on booted processors rely on the read actually being issued.  With
newer versions of gcc this is no longer happening (presumably it sees
the read with no effect and optimises it away).  Replace the reads
with readX to assure volatile semantics for issuing the access.  This
fixes a bug where QIC based voyagers won't boot with certain versions
of gcc.

Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
---
 arch/x86/mach-voyager/voyager_smp.c |   22 ++++++----------------
 1 files changed, 6 insertions(+), 16 deletions(-)

diff --git a/arch/x86/mach-voyager/voyager_smp.c b/arch/x86/mach-voyager/voyager_smp.c
index 84d1d7f..d7c2a6a 100644
--- a/arch/x86/mach-voyager/voyager_smp.c
+++ b/arch/x86/mach-voyager/voyager_smp.c
@@ -70,7 +70,7 @@ cpumask_t phys_cpu_present_map = CPU_MASK_NONE;
 /* The internal functions */
 static void send_CPI(__u32 cpuset, __u8 cpi);
 static void ack_CPI(__u8 cpi);
-static int ack_QIC_CPI(__u8 cpi);
+static inline void ack_QIC_CPI(__u8 cpi);
 static void ack_special_QIC_CPI(__u8 cpi);
 static void ack_VIC_CPI(__u8 cpi);
 static void send_CPI_allbutself(__u8 cpi);
@@ -433,14 +433,9 @@ static void __init start_secondary(void *unused)
 
 	qic_setup();
 
-	if (is_cpu_quad() && !is_cpu_vic_boot()) {
+	if (is_cpu_quad() && !is_cpu_vic_boot())
 		/* clear the boot CPI */
-		__u8 dummy;
-
-		dummy =
-		    voyager_quad_cpi_addr[cpuid]->qic_cpi[VIC_CPU_BOOT_CPI].cpi;
-		printk("read dummy %d\n", dummy);
-	}
+		readw(&voyager_quad_cpi_addr[cpuid]->qic_cpi[VIC_CPU_BOOT_CPI].cpi);
 
 	/* lower the mask to receive CPIs */
 	vic_enable_cpi();
@@ -603,9 +598,7 @@ static void __init do_boot_cpu(__u8 cpu)
 		cpu_set(cpu, cpu_present_map);
 	} else {
 		printk("CPU%d FAILED TO BOOT: ", cpu);
-		if (*
-		    ((volatile unsigned char *)phys_to_virt(start_phys_address))
-		    == 0xA5)
+		if (readb(phys_to_virt(start_phys_address)) == 0xA5)
 			printk("Stuck.\n");
 		else
 			printk("Not responding.\n");
@@ -1306,18 +1299,15 @@ static void send_CPI(__u32 cpuset, __u8 cpi)
 
 /* Acknowledge receipt of CPI in the QIC, clear in QIC hardware and
  * set the cache line to shared by reading it.
- *
- * DON'T make this inline otherwise the cache line read will be
- * optimised away
  * */
-static int ack_QIC_CPI(__u8 cpi)
+static inline void ack_QIC_CPI(__u8 cpi)
 {
 	__u8 cpu = hard_smp_processor_id();
 
 	cpi &= 7;
 
 	outb(1 << cpi, QIC_INTERRUPT_CLEAR1);
-	return voyager_quad_cpi_addr[cpu]->qic_cpi[cpi].cpi;
+	readw(&voyager_quad_cpi_addr[cpu]->qic_cpi[cpi].cpi);
 }
 
 static void ack_special_QIC_CPI(__u8 cpi)
-- 
1.6.2.1

[PATCH 13/14] [VOYAGER] x86/voyager: remove direct use of pg0 in favour of early_ioremap()

[James Bottomley]

This was a hold over from the days when we didn't actually have an
early_ioremap() and we had to fiddle with the kernel page table
directly to read voyager cmos clickmap entries.

Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
---
 arch/x86/mach-voyager/voyager_basic.c |   13 ++-----------
 1 files changed, 2 insertions(+), 11 deletions(-)

diff --git a/arch/x86/mach-voyager/voyager_basic.c b/arch/x86/mach-voyager/voyager_basic.c
index 7c97c9a..5d37967 100644
--- a/arch/x86/mach-voyager/voyager_basic.c
+++ b/arch/x86/mach-voyager/voyager_basic.c
@@ -123,7 +123,6 @@ int __init voyager_memory_detect(int region, __u32 * start, __u32 * length)
 	__u8 cmos[4];
 	ClickMap_t *map;
 	unsigned long map_addr;
-	unsigned long old;
 
 	if (region >= CLICK_ENTRIES) {
 		printk("Voyager: Illegal ClickMap region %d\n", region);
@@ -135,13 +134,7 @@ int __init voyager_memory_detect(int region, __u32 * start, __u32 * length)
 		    voyager_extended_cmos_read(VOYAGER_MEMORY_CLICKMAP + i);
 
 	map_addr = *(unsigned long *)cmos;
-
-	/* steal page 0 for this */
-	old = pg0[0];
-	pg0[0] = ((map_addr & PAGE_MASK) | _PAGE_RW | _PAGE_PRESENT);
-	local_flush_tlb();
-	/* now clear everything out but page 0 */
-	map = (ClickMap_t *) (map_addr & (~PAGE_MASK));
+	map = (ClickMap_t *)early_ioremap(map_addr, sizeof(*map));
 
 	/* zero length is the end of the clickmap */
 	if (map->Entry[region].Length != 0) {
@@ -149,10 +142,8 @@ int __init voyager_memory_detect(int region, __u32 * start, __u32 * length)
 		*start = map->Entry[region].Address;
 		retval = 1;
 	}
+	early_iounmap(map, sizeof(*map));
 
-	/* replace the mapping */
-	pg0[0] = old;
-	local_flush_tlb();
 	return retval;
 }
 
-- 
1.6.2.1

[PATCH 14/14] [VOYAGER] x86/Voyager: Plumb voyager back into the build

[James Bottomley]

Voyager can now be converted over to using x86 quirks thanks to the
prior additions.  Most of the internal voyager code is made static and
the rest has a voyager_ prefix to avoid symbol clashes.

The TLB flushing functions still have an apic entanglement, so give
voyager a temporary work around which can be removed when they're all
converted to smp_call_function().

Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
---
 arch/x86/Kconfig                       |    4 +-
 arch/x86/Makefile                      |    2 +
 arch/x86/include/asm/voyager.h         |   19 +-
 arch/x86/kernel/setup.c                |    2 +
 arch/x86/mach-voyager/setup.c          |   57 +++--
 arch/x86/mach-voyager/voyager_basic.c  |   95 +++---
 arch/x86/mach-voyager/voyager_smp.c    |  520 ++++++++++----------------------
 arch/x86/mach-voyager/voyager_thread.c |    5 +-
 8 files changed, 262 insertions(+), 442 deletions(-)

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 972c7c5..358bec1 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -437,8 +437,8 @@ config X86_ES7000
 
 config X86_VOYAGER
 	bool "Voyager (NCR)"
-	depends on SMP && !PCI && BROKEN
-	depends on X86_32_NON_STANDARD
+	depends on SMP && X86_32_NON_STANDARD
+	select MCA
 	---help---
 	  Voyager is an MCA-based 32-way capable SMP architecture proprietary
 	  to NCR Corp.  Machine classes 345x/35xx/4100/51xx are Voyager-based.
diff --git a/arch/x86/Makefile b/arch/x86/Makefile
index f05d8c9..5cd8bb2 100644
--- a/arch/x86/Makefile
+++ b/arch/x86/Makefile
@@ -127,6 +127,8 @@ core-$(CONFIG_XEN) += arch/x86/xen/
 # lguest paravirtualization support
 core-$(CONFIG_LGUEST_GUEST) += arch/x86/lguest/
 
+core-$(CONFIG_X86_VOYAGER) += arch/x86/mach-voyager/
+
 core-y += arch/x86/kernel/
 core-y += arch/x86/mm/
 
diff --git a/arch/x86/include/asm/voyager.h b/arch/x86/include/asm/voyager.h
index b38a241..a652890 100644
--- a/arch/x86/include/asm/voyager.h
+++ b/arch/x86/include/asm/voyager.h
@@ -503,22 +503,19 @@ extern struct voyager_status voyager_status;
 /* functions exported by the voyager and voyager_smp modules */
 extern int voyager_cat_readb(__u8 module, __u8 asic, int reg);
 extern void voyager_cat_init(void);
-extern void voyager_detect(struct voyager_bios_info *);
-extern void voyager_trap_init(void);
-extern void voyager_setup_irqs(void);
+extern void voyager_early_detect(void);
+extern void voyager_detect(void);
 extern int voyager_memory_detect(int region, __u32 *addr, __u32 *length);
-extern void voyager_smp_intr_init(void);
 extern __u8 voyager_extended_cmos_read(__u16 cmos_address);
 extern void voyager_smp_dump(void);
 extern void voyager_timer_interrupt(void);
-extern void smp_local_timer_interrupt(void);
 extern void voyager_power_off(void);
-extern void smp_voyager_power_off(void *dummy);
 extern void voyager_restart(void);
 extern void voyager_cat_power_off(void);
 extern void voyager_cat_do_common_interrupt(void);
 extern void voyager_handle_nmi(void);
 extern void voyager_smp_intr_init(void);
+
 /* Commands for the following are */
 #define	VOYAGER_PSI_READ	0
 #define VOYAGER_PSI_WRITE	1
@@ -535,12 +532,22 @@ extern asmlinkage void qic_reschedule_interrupt(void);
 extern asmlinkage void qic_enable_irq_interrupt(void);
 extern asmlinkage void qic_call_function_interrupt(void);
 
+#ifdef CONFIG_SMP
+extern void voyager_smp_detect(struct x86_quirks *);
+#else
+static inline void voyager_smp_detect(struct x86_quirks *) { }
+#endif
+
 #else /* CONFIG_X86_VOYAGER */
 
 static inline void voyager_timer_interrupt(void)
 {
 }
 
+static inline void voyager_early_detect(void)
+{
+}
+
 #endif /* CONFIG_X86_VOYAGER */
 
 #endif
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index 13779e2..29f1279 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -99,6 +99,7 @@
 
 #include <asm/paravirt.h>
 #include <asm/hypervisor.h>
+#include <asm/voyager.h>
 
 #include <asm/percpu.h>
 #include <asm/topology.h>
@@ -676,6 +677,7 @@ void __init setup_arch(char **cmdline_p)
 #ifdef CONFIG_X86_32
 	memcpy(&boot_cpu_data, &new_cpu_data, sizeof(new_cpu_data));
 	visws_early_detect();
+	voyager_early_detect();
 #else
 	printk(KERN_INFO "Command line: %s\n", boot_command_line);
 #endif
diff --git a/arch/x86/mach-voyager/setup.c b/arch/x86/mach-voyager/setup.c
index e4516a8..3fc2df7 100644
--- a/arch/x86/mach-voyager/setup.c
+++ b/arch/x86/mach-voyager/setup.c
@@ -4,23 +4,22 @@
 
 #include <linux/init.h>
 #include <linux/interrupt.h>
-#include <asm/arch_hooks.h>
+#include <asm/apic.h>
 #include <asm/voyager.h>
 #include <asm/e820.h>
 #include <asm/io.h>
 #include <asm/setup.h>
+#include <asm/timer.h>
 #include <asm/cpu.h>
 
-void __init pre_intr_init_hook(void)
-{
-	init_ISA_irqs();
-}
-
-void __init intr_init_hook(void)
+static int __init voyager_intr_init(void)
 {
 #ifdef CONFIG_SMP
 	voyager_smp_intr_init();
 #endif
+
+	/* need to do the irq2 cascade setup */
+	return 0;
 }
 
 static void voyager_disable_tsc(void)
@@ -30,18 +29,10 @@ static void voyager_disable_tsc(void)
 	setup_clear_cpu_cap(X86_FEATURE_TSC);
 }
 
-void __init pre_setup_arch_hook(void)
+int __init voyager_pre_time_init(void)
 {
 	voyager_disable_tsc();
-}
-
-void __init pre_time_init_hook(void)
-{
-	voyager_disable_tsc();
-}
-
-void __init trap_init_hook(void)
-{
+	return 0;
 }
 
 static struct irqaction irq0 = {
@@ -51,18 +42,20 @@ static struct irqaction irq0 = {
 	.name = "timer"
 };
 
-void __init time_init_hook(void)
+static int __init voyager_time_init(void)
 {
 	irq0.mask = cpumask_of_cpu(safe_smp_processor_id());
 	setup_irq(0, &irq0);
+
+	/* return 1 to not do standard timer setup */
+	return 1;
 }
 
 /* Hook for machine specific memory setup. */
 
-char *__init machine_specific_memory_setup(void)
+static char *__init voyager_memory_setup(void)
 {
 	char *who;
-	int new_nr;
 
 	who = "NOT VOYAGER";
 
@@ -104,5 +97,27 @@ char *__init machine_specific_memory_setup(void)
 		return who;
 	}
 
-	return default_machine_specific_memory_setup();
+	return NULL;
+}
+
+static struct x86_quirks voyager_x86_quirks __initdata = {
+	.arch_time_init		= voyager_time_init,
+	.arch_intr_init		= voyager_intr_init,
+	.arch_pre_time_init	= voyager_pre_time_init,
+	.arch_memory_setup	= voyager_memory_setup,
+};
+
+void __init voyager_early_detect(void)
+{
+	if (!is_voyager())
+		return;
+
+	voyager_detect();
+
+	skip_ioapic_setup = 1;
+	voyager_disable_tsc();
+	disable_APIC();
+	voyager_smp_detect(&voyager_x86_quirks);
+	x86_quirks = &voyager_x86_quirks;
+
 }
diff --git a/arch/x86/mach-voyager/voyager_basic.c b/arch/x86/mach-voyager/voyager_basic.c
index 5d37967..5e05334 100644
--- a/arch/x86/mach-voyager/voyager_basic.c
+++ b/arch/x86/mach-voyager/voyager_basic.c
@@ -22,24 +22,26 @@
 #include <linux/sysrq.h>
 #include <linux/smp.h>
 #include <linux/nodemask.h>
+#include <linux/mca.h>
 #include <asm/io.h>
 #include <asm/voyager.h>
 #include <asm/vic.h>
 #include <linux/pm.h>
 #include <asm/tlbflush.h>
-#include <asm/arch_hooks.h>
+#include <asm/hpet.h>
 #include <asm/i8253.h>
-
-/*
- * Power off function, if any
- */
-void (*pm_power_off) (void);
-EXPORT_SYMBOL(pm_power_off);
+#include <asm/setup.h>
+#include <asm/timer.h>
+#include <asm/reboot.h>
 
 int voyager_level = 0;
 
 struct voyager_SUS *voyager_SUS = NULL;
 
+static void voyager_machine_emergency_restart(void);
+static void voyager_machine_restart(char *);
+static void voyager_mca_nmi_hook(void);
+
 #ifdef CONFIG_SMP
 static void voyager_dump(int dummy1, struct tty_struct *dummy3)
 {
@@ -54,33 +56,41 @@ static struct sysrq_key_op sysrq_voyager_dump_op = {
 };
 #endif
 
-void voyager_detect(struct voyager_bios_info *bios)
+static void voyager_machine_shutdown(void)
 {
-	if (bios->len != NOT_VOYAGER_BIOS_SIG) {
-		int class = (bios->class_1 << 8)
-		    | (bios->class_2 & 0xff);
-
-		printk("Voyager System detected.\n"
-		       "        Class %x, Revision %d.%d\n",
-		       class, bios->major, bios->minor);
-		if (class == VOYAGER_LEVEL4)
-			voyager_level = 4;
-		else if (class < VOYAGER_LEVEL5_AND_ABOVE)
-			voyager_level = 3;
-		else
-			voyager_level = 5;
-		printk("        Architecture Level %d\n", voyager_level);
-		if (voyager_level < 4)
-			printk
-			    ("\n**WARNING**: Voyager HAL only supports Levels 4 and 5 Architectures at the moment\n\n");
-		/* install the power off handler */
-		pm_power_off = voyager_power_off;
+	/* Need to skip the usual x86 shutdown */
+}
+
+void voyager_detect(void)
+{
+	struct voyager_bios_info *bios = &boot_params.voyager_bios_info;
+
+	int class = (bios->class_1 << 8)
+		| (bios->class_2 & 0xff);
+
+	printk("Voyager System detected.\n"
+	       "        Class %x, Revision %d.%d\n",
+	       class, bios->major, bios->minor);
+	if (class == VOYAGER_LEVEL4)
+		voyager_level = 4;
+	else if (class < VOYAGER_LEVEL5_AND_ABOVE)
+		voyager_level = 3;
+	else
+		voyager_level = 5;
+	printk("        Architecture Level %d\n", voyager_level);
+	if (voyager_level < 4)
+		printk
+			("\n**WARNING**: Voyager HAL only supports Levels 4 and 5 Architectures at the moment\n\n");
+	/* install the power off handler */
+	pm_power_off = voyager_power_off;
+	machine_ops.emergency_restart = voyager_machine_emergency_restart;
+	machine_ops.restart = voyager_machine_restart;
+	machine_ops.shutdown = voyager_machine_shutdown;
+	mca_nmi_hook = voyager_mca_nmi_hook;
+	timer_ack = 0;
 #ifdef CONFIG_SMP
-		register_sysrq_key('v', &sysrq_voyager_dump_op);
+	register_sysrq_key('v', &sysrq_voyager_dump_op);
 #endif
-	} else {
-		printk("\n\n**WARNING**: No Voyager Subsystem Found\n");
-	}
 }
 
 void voyager_system_interrupt(int cpl, void *dev_id)
@@ -235,12 +245,7 @@ static inline void kb_wait(void)
 			break;
 }
 
-void machine_shutdown(void)
-{
-	/* Architecture specific shutdown needed before a kexec */
-}
-
-void machine_restart(char *cmd)
+static void voyager_machine_restart(char *cmd)
 {
 	printk("Voyager Warm Restart\n");
 	kb_wait();
@@ -265,13 +270,13 @@ void machine_restart(char *cmd)
 		halt();
 }
 
-void machine_emergency_restart(void)
+static void voyager_machine_emergency_restart(void)
 {
 	/*for now, just hook this to a warm restart */
 	machine_restart(NULL);
 }
 
-void mca_nmi_hook(void)
+static void voyager_mca_nmi_hook(void)
 {
 	__u8 dumpval __maybe_unused = inb(0xf823);
 	__u8 swnmi __maybe_unused = inb(0xf813);
@@ -297,15 +302,3 @@ void mca_nmi_hook(void)
 	show_stack(NULL, NULL);
 	show_state();
 }
-
-void machine_halt(void)
-{
-	/* treat a halt like a power off */
-	machine_power_off();
-}
-
-void machine_power_off(void)
-{
-	if (pm_power_off)
-		pm_power_off();
-}
diff --git a/arch/x86/mach-voyager/voyager_smp.c b/arch/x86/mach-voyager/voyager_smp.c
index d7c2a6a..9714975 100644
--- a/arch/x86/mach-voyager/voyager_smp.c
+++ b/arch/x86/mach-voyager/voyager_smp.c
@@ -19,30 +19,20 @@
 #include <linux/kernel.h>
 #include <linux/bootmem.h>
 #include <linux/completion.h>
+#include <asm/cpu.h>
 #include <asm/desc.h>
+#include <asm/hardirq.h>
 #include <asm/voyager.h>
 #include <asm/vic.h>
 #include <asm/mtrr.h>
 #include <asm/pgalloc.h>
 #include <asm/tlbflush.h>
-#include <asm/arch_hooks.h>
 #include <asm/trampoline.h>
 
-/* TLB state -- visible externally, indexed physically */
-DEFINE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate) = { &init_mm, 0 };
-
 /* CPU IRQ affinity -- set to all ones initially */
 static unsigned long cpu_irq_affinity[NR_CPUS] __cacheline_aligned =
 	{[0 ... NR_CPUS-1]  = ~0UL };
 
-/* per CPU data structure (for /proc/cpuinfo et al), visible externally
- * indexed physically */
-DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86, cpu_info);
-EXPORT_PER_CPU_SYMBOL(cpu_info);
-
-/* physical ID of the CPU used to boot the system */
-unsigned char boot_cpu_id;
-
 /* The memory line addresses for the Quad CPIs */
 struct voyager_qic_cpi *voyager_quad_cpi_addr[NR_CPUS] __cacheline_aligned;
 
@@ -60,12 +50,9 @@ __u32 voyager_quad_processors = 0;
  * activity count.  Finally exported by i386_ksyms.c */
 static int voyager_extended_cpus = 1;
 
-/* Used for the invalidate map that's also checked in the spinlock */
-static volatile unsigned long smp_invalidate_needed;
-
 /* Bitmask of CPUs present in the system - exported by i386_syms.c, used
  * by scheduler but indexed physically */
-cpumask_t phys_cpu_present_map = CPU_MASK_NONE;
+static cpumask_t voyager_cpu_present_map = CPU_MASK_NONE;
 
 /* The internal functions */
 static void send_CPI(__u32 cpuset, __u8 cpi);
@@ -87,9 +74,22 @@ static void vic_enable_cpi(void);
 static void do_boot_cpu(__u8 cpuid);
 static void do_quad_bootstrap(void);
 static void initialize_secondary(void);
+static void smp_local_timer_interrupt(void);
 
-int hard_smp_processor_id(void);
-int safe_smp_processor_id(void);
+static int voyager_hard_smp_processor_id(void)
+{
+	__u8 i;
+	__u8 cpumask = inb(VIC_PROC_WHO_AM_I);
+	if ((cpumask & QUAD_IDENTIFIER) == QUAD_IDENTIFIER)
+		return cpumask & 0x1F;
+
+	for (i = 0; i < 8; i++) {
+		if (cpumask & (1 << i))
+			return i;
+	}
+	printk(KERN_ERR "** WARNING ** Illegal cpuid returned by VIC: %d", cpumask);
+	return 0;
+}
 
 /* Inline functions */
 static inline void send_one_QIC_CPI(__u8 cpu, __u8 cpi)
@@ -108,14 +108,15 @@ static inline void send_QIC_CPI(__u32 cpuset, __u8 cpi)
 			if (!cpu_online(cpu))
 				VDEBUG(("CPU%d sending cpi %d to CPU%d not in "
 					"cpu_online_map\n",
-					hard_smp_processor_id(), cpi, cpu));
+					voyager_hard_smp_processor_id(), cpi, cpu));
 #endif
+
 			send_one_QIC_CPI(cpu, cpi - QIC_CPI_OFFSET);
 		}
 	}
 }
 
-static inline void wrapper_smp_local_timer_interrupt(void)
+static inline void voyager_local_timer_interrupt(void)
 {
 	irq_enter();
 	smp_local_timer_interrupt();
@@ -145,14 +146,14 @@ static inline int is_cpu_quad(void)
 
 static inline int is_cpu_extended(void)
 {
-	__u8 cpu = hard_smp_processor_id();
+	__u8 cpu = voyager_hard_smp_processor_id();
 
 	return (voyager_extended_vic_processors & (1 << cpu));
 }
 
 static inline int is_cpu_vic_boot(void)
 {
-	__u8 cpu = hard_smp_processor_id();
+	__u8 cpu = voyager_hard_smp_processor_id();
 
 	return (voyager_extended_vic_processors
 		& voyager_allowed_boot_processors & (1 << cpu));
@@ -198,11 +199,6 @@ static struct irq_chip vic_chip = {
 /* used to count up as CPUs are brought on line (starts at 0) */
 static int cpucount = 0;
 
-/* The per cpu profile stuff - used in smp_local_timer_interrupt */
-static DEFINE_PER_CPU(int, prof_multiplier) = 1;
-static DEFINE_PER_CPU(int, prof_old_multiplier) = 1;
-static DEFINE_PER_CPU(int, prof_counter) = 1;
-
 /* the map used to check if a CPU has booted */
 static __u32 cpu_booted_map;
 
@@ -316,7 +312,7 @@ static void do_quad_bootstrap(void)
 	if (is_cpu_quad() && is_cpu_vic_boot()) {
 		int i;
 		unsigned long flags;
-		__u8 cpuid = hard_smp_processor_id();
+		__u8 cpuid = voyager_hard_smp_processor_id();
 
 		local_irq_save(flags);
 
@@ -337,28 +333,23 @@ static void do_quad_bootstrap(void)
 	}
 }
 
-void prefill_possible_map(void)
-{
-	/* This is empty on voyager because we need a much
-	 * earlier detection which is done in find_smp_config */
-}
-
 /* Set up all the basic stuff: read the SMP config and make all the
  * SMP information reflect only the boot cpu.  All others will be
  * brought on-line later. */
-void __init find_smp_config(void)
+static int __init voyager_find_smp_config(unsigned int early)
 {
 	int i;
 
-	boot_cpu_id = hard_smp_processor_id();
+	if (!early)
+		return 1;
+
+	boot_cpu_id = voyager_hard_smp_processor_id();
 
 	printk("VOYAGER SMP: Boot cpu is %d\n", boot_cpu_id);
 
 	/* initialize the CPU structures (moved from smp_boot_cpus) */
 	for (i = 0; i < nr_cpu_ids; i++)
 		cpu_irq_affinity[i] = ~0;
-	cpu_online_map = cpumask_of_cpu(boot_cpu_id);
-
 	/* The boot CPU must be extended */
 	voyager_extended_vic_processors = 1 << boot_cpu_id;
 	/* initially, all of the first 8 CPUs can boot */
@@ -366,19 +357,18 @@ void __init find_smp_config(void)
 	/* set up everything for just this CPU, we can alter
 	 * this as we start the other CPUs later */
 	/* now get the CPU disposition from the extended CMOS */
-	cpus_addr(phys_cpu_present_map)[0] =
+	cpus_addr(voyager_cpu_present_map)[0] =
 	    voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK);
-	cpus_addr(phys_cpu_present_map)[0] |=
+	cpus_addr(voyager_cpu_present_map)[0] |=
 	    voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK + 1) << 8;
-	cpus_addr(phys_cpu_present_map)[0] |=
+	cpus_addr(voyager_cpu_present_map)[0] |=
 	    voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK +
 				       2) << 16;
-	cpus_addr(phys_cpu_present_map)[0] |=
+	cpus_addr(voyager_cpu_present_map)[0] |=
 	    voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK +
 				       3) << 24;
-	init_cpu_possible(&phys_cpu_present_map);
-	printk("VOYAGER SMP: phys_cpu_present_map = 0x%lx\n",
-	       cpus_addr(phys_cpu_present_map)[0]);
+	printk("VOYAGER SMP: voyager_cpu_present_map = 0x%lx\n",
+	       cpus_addr(voyager_cpu_present_map)[0]);
 	/* Here we set up the VIC to enable SMP */
 	/* enable the CPIs by writing the base vector to their register */
 	outb(VIC_DEFAULT_CPI_BASE, VIC_CPI_BASE_REGISTER);
@@ -399,27 +389,13 @@ void __init find_smp_config(void)
 	outb(inb(VOYAGER_SUS_IN_CONTROL_PORT) | VOYAGER_IN_CONTROL_FLAG,
 	     VOYAGER_SUS_IN_CONTROL_PORT);
 
-	current_thread_info()->cpu = boot_cpu_id;
-	percpu_write(cpu_number, boot_cpu_id);
-}
-
-/*
- *	The bootstrap kernel entry code has set these up. Save them
- *	for a given CPU, id is physical */
-void __init smp_store_cpu_info(int id)
-{
-	struct cpuinfo_x86 *c = &cpu_data(id);
-
-	*c = boot_cpu_data;
-	c->cpu_index = id;
-
-	identify_secondary_cpu(c);
+	return 1;
 }
 
 /* Routine initially called when a non-boot CPU is brought online */
 static void __init start_secondary(void *unused)
 {
-	__u8 cpuid = hard_smp_processor_id();
+	__u8 cpuid = voyager_hard_smp_processor_id();
 
 	cpu_init();
 
@@ -442,8 +418,6 @@ static void __init start_secondary(void *unused)
 
 	VDEBUG(("VOYAGER SMP: CPU%d, stack at about %p\n", cpuid, &cpuid));
 
-	notify_cpu_starting(cpuid);
-
 	/* enable interrupts */
 	local_irq_enable();
 
@@ -453,6 +427,8 @@ static void __init start_secondary(void *unused)
 	/* save our processor parameters */
 	smp_store_cpu_info(cpuid);
 
+	set_cpu_sibling_map(cpuid);
+
 	/* if we're a quad, we may need to bootstrap other CPUs */
 	do_quad_bootstrap();
 
@@ -461,18 +437,21 @@ static void __init start_secondary(void *unused)
 	 * permission to proceed.  Without this, the new per CPU stuff
 	 * in the softirqs will fail */
 	local_irq_disable();
-	cpu_set(cpuid, cpu_callin_map);
+	cpumask_set_cpu(cpuid, cpu_callin_mask);
 
 	/* signal that we're done */
 	cpu_booted_map = 1;
 
 	while (!cpu_isset(cpuid, smp_commenced_mask))
 		rep_nop();
+
+	notify_cpu_starting(cpuid);
+
 	local_irq_enable();
 
 	local_flush_tlb();
 
-	cpu_set(cpuid, cpu_online_map);
+	set_cpu_online(cpuid, true);
 	wmb();
 	cpu_idle();
 }
@@ -594,8 +573,8 @@ static void __init do_boot_cpu(__u8 cpu)
 		printk("CPU%d: ", cpu);
 		print_cpu_info(&cpu_data(cpu));
 		wmb();
-		cpu_set(cpu, cpu_callout_map);
-		cpu_set(cpu, cpu_present_map);
+		cpumask_set_cpu(cpu, cpu_callout_mask);
+		set_cpu_present(cpu, true);
 	} else {
 		printk("CPU%d FAILED TO BOOT: ", cpu);
 		if (readb(phys_to_virt(start_phys_address)) == 0xA5)
@@ -607,7 +586,7 @@ static void __init do_boot_cpu(__u8 cpu)
 	}
 }
 
-void __init smp_boot_cpus(void)
+static void __init smp_boot_cpus(void)
 {
 	int i;
 
@@ -620,15 +599,15 @@ void __init smp_boot_cpus(void)
 		/* now that the cat has probed the Voyager System Bus, sanity
 		 * check the cpu map */
 		if (((voyager_quad_processors | voyager_extended_vic_processors)
-		     & cpus_addr(phys_cpu_present_map)[0]) !=
-		    cpus_addr(phys_cpu_present_map)[0]) {
+		     & cpus_addr(voyager_cpu_present_map)[0]) !=
+		    cpus_addr(voyager_cpu_present_map)[0]) {
 			/* should panic */
 			printk("\n\n***WARNING*** "
 			       "Sanity check of CPU present map FAILED\n");
 		}
 	} else if (voyager_level == 4)
 		voyager_extended_vic_processors =
-		    cpus_addr(phys_cpu_present_map)[0];
+		    cpus_addr(voyager_cpu_present_map)[0];
 
 	/* this sets up the idle task to run on the current cpu */
 	voyager_extended_cpus = 1;
@@ -641,6 +620,7 @@ void __init smp_boot_cpus(void)
 	 smp_tune_scheduling();
 	 */
 	smp_store_cpu_info(boot_cpu_id);
+	set_cpu_sibling_map(boot_cpu_id);
 	/* setup the jump vector */
 	initial_code = (unsigned long)initialize_secondary;
 	printk("CPU%d: ", boot_cpu_id);
@@ -656,13 +636,10 @@ void __init smp_boot_cpus(void)
 	/* enable our own CPIs */
 	vic_enable_cpi();
 
-	cpu_set(boot_cpu_id, cpu_online_map);
-	cpu_set(boot_cpu_id, cpu_callout_map);
-
 	/* loop over all the extended VIC CPUs and boot them.  The
 	 * Quad CPUs must be bootstrapped by their extended VIC cpu */
 	for (i = 0; i < nr_cpu_ids; i++) {
-		if (i == boot_cpu_id || !cpu_isset(i, phys_cpu_present_map))
+		if (i == boot_cpu_id || !cpu_isset(i, voyager_cpu_present_map))
 			continue;
 		do_boot_cpu(i);
 		/* This udelay seems to be needed for the Quad boots
@@ -755,166 +732,13 @@ void smp_vic_cmn_interrupt(struct pt_regs *regs)
 /*
  * Reschedule call back. Nothing to do, all the work is done
  * automatically when we return from the interrupt.  */
-static void smp_reschedule_interrupt(void)
-{
-	/* do nothing */
-}
-
-static struct mm_struct *flush_mm;
-static unsigned long flush_va;
-static DEFINE_SPINLOCK(tlbstate_lock);
-
-/*
- * We cannot call mmdrop() because we are in interrupt context,
- * instead update mm->cpu_vm_mask.
- *
- * We need to reload %cr3 since the page tables may be going
- * away from under us..
- */
-static inline void voyager_leave_mm(unsigned long cpu)
+static void voyager_reschedule_interrupt(void)
 {
-	if (per_cpu(cpu_tlbstate, cpu).state == TLBSTATE_OK)
-		BUG();
-	cpu_clear(cpu, per_cpu(cpu_tlbstate, cpu).active_mm->cpu_vm_mask);
-	load_cr3(swapper_pg_dir);
+	inc_irq_stat(irq_resched_count);
 }
 
-/*
- * Invalidate call-back
- */
-static void smp_invalidate_interrupt(void)
-{
-	__u8 cpu = smp_processor_id();
-
-	if (!test_bit(cpu, &smp_invalidate_needed))
-		return;
-	/* This will flood messages.  Don't uncomment unless you see
-	 * Problems with cross cpu invalidation
-	 VDEBUG(("VOYAGER SMP: CPU%d received INVALIDATE_CPI\n",
-	 smp_processor_id()));
-	 */
-
-	if (flush_mm == per_cpu(cpu_tlbstate, cpu).active_mm) {
-		if (per_cpu(cpu_tlbstate, cpu).state == TLBSTATE_OK) {
-			if (flush_va == TLB_FLUSH_ALL)
-				local_flush_tlb();
-			else
-				__flush_tlb_one(flush_va);
-		} else
-			voyager_leave_mm(cpu);
-	}
-	smp_mb__before_clear_bit();
-	clear_bit(cpu, &smp_invalidate_needed);
-	smp_mb__after_clear_bit();
-}
-
-/* All the new flush operations for 2.4 */
-
-/* This routine is called with a physical cpu mask */
-static void
-voyager_flush_tlb_others(unsigned long cpumask, struct mm_struct *mm,
-			 unsigned long va)
-{
-	int stuck = 50000;
-
-	if (!cpumask)
-		BUG();
-	if ((cpumask & cpus_addr(cpu_online_map)[0]) != cpumask)
-		BUG();
-	if (cpumask & (1 << smp_processor_id()))
-		BUG();
-	if (!mm)
-		BUG();
-
-	spin_lock(&tlbstate_lock);
-
-	flush_mm = mm;
-	flush_va = va;
-	atomic_set_mask(cpumask, &smp_invalidate_needed);
-	/*
-	 * We have to send the CPI only to
-	 * CPUs affected.
-	 */
-	send_CPI(cpumask, VIC_INVALIDATE_CPI);
-
-	while (smp_invalidate_needed) {
-		mb();
-		if (--stuck == 0) {
-			printk("***WARNING*** Stuck doing invalidate CPI "
-			       "(CPU%d)\n", smp_processor_id());
-			break;
-		}
-	}
-
-	/* Uncomment only to debug invalidation problems
-	   VDEBUG(("VOYAGER SMP: Completed invalidate CPI (CPU%d)\n", cpu));
-	 */
-
-	flush_mm = NULL;
-	flush_va = 0;
-	spin_unlock(&tlbstate_lock);
-}
-
-void flush_tlb_current_task(void)
-{
-	struct mm_struct *mm = current->mm;
-	unsigned long cpu_mask;
-
-	preempt_disable();
-
-	cpu_mask = cpus_addr(mm->cpu_vm_mask)[0] & ~(1 << smp_processor_id());
-	local_flush_tlb();
-	if (cpu_mask)
-		voyager_flush_tlb_others(cpu_mask, mm, TLB_FLUSH_ALL);
-
-	preempt_enable();
-}
-
-void flush_tlb_mm(struct mm_struct *mm)
-{
-	unsigned long cpu_mask;
-
-	preempt_disable();
-
-	cpu_mask = cpus_addr(mm->cpu_vm_mask)[0] & ~(1 << smp_processor_id());
-
-	if (current->active_mm == mm) {
-		if (current->mm)
-			local_flush_tlb();
-		else
-			voyager_leave_mm(smp_processor_id());
-	}
-	if (cpu_mask)
-		voyager_flush_tlb_others(cpu_mask, mm, TLB_FLUSH_ALL);
-
-	preempt_enable();
-}
-
-void flush_tlb_page(struct vm_area_struct *vma, unsigned long va)
-{
-	struct mm_struct *mm = vma->vm_mm;
-	unsigned long cpu_mask;
-
-	preempt_disable();
-
-	cpu_mask = cpus_addr(mm->cpu_vm_mask)[0] & ~(1 << smp_processor_id());
-	if (current->active_mm == mm) {
-		if (current->mm)
-			__flush_tlb_one(va);
-		else
-			voyager_leave_mm(smp_processor_id());
-	}
-
-	if (cpu_mask)
-		voyager_flush_tlb_others(cpu_mask, mm, va);
-
-	preempt_enable();
-}
-
-EXPORT_SYMBOL(flush_tlb_page);
-
 /* enable the requested IRQs */
-static void smp_enable_irq_interrupt(void)
+static void voyager_enable_irq_interrupt(void)
 {
 	__u8 irq;
 	__u8 cpu = get_cpu();
@@ -939,7 +763,7 @@ static void smp_enable_irq_interrupt(void)
 static void smp_stop_cpu_function(void *dummy)
 {
 	VDEBUG(("VOYAGER SMP: CPU%d is STOPPING\n", smp_processor_id()));
-	cpu_clear(smp_processor_id(), cpu_online_map);
+	set_cpu_online(smp_processor_id(), false);
 	local_irq_disable();
 	for (;;)
 		halt();
@@ -949,80 +773,59 @@ static void smp_stop_cpu_function(void *dummy)
  * previously set up.  This is used to schedule a function for
  * execution on all CPUs - set up the function then broadcast a
  * function_interrupt CPI to come here on each CPU */
-static void smp_call_function_interrupt(void)
+static void voyager_call_function_interrupt(void)
 {
 	irq_enter();
 	generic_smp_call_function_interrupt();
-	__get_cpu_var(irq_stat).irq_call_count++;
+	inc_irq_stat(irq_call_count);
 	irq_exit();
 }
 
-static void smp_call_function_single_interrupt(void)
+static void voyager_call_function_single_interrupt(void)
 {
 	irq_enter();
 	generic_smp_call_function_single_interrupt();
-	__get_cpu_var(irq_stat).irq_call_count++;
+	inc_irq_stat(irq_call_count);
 	irq_exit();
 }
 
-/* Sorry about the name.  In an APIC based system, the APICs
- * themselves are programmed to send a timer interrupt.  This is used
- * by linux to reschedule the processor.  Voyager doesn't have this,
- * so we use the system clock to interrupt one processor, which in
- * turn, broadcasts a timer CPI to all the others --- we receive that
- * CPI here.  We don't use this actually for counting so losing
- * ticks doesn't matter
- *
- * FIXME: For those CPUs which actually have a local APIC, we could
- * try to use it to trigger this interrupt instead of having to
- * broadcast the timer tick.  Unfortunately, all my pentium DYADs have
- * no local APIC, so I can't do this
- *
- * This function is currently a placeholder and is unused in the code */
-void smp_apic_timer_interrupt(struct pt_regs *regs)
-{
-	struct pt_regs *old_regs = set_irq_regs(regs);
-	wrapper_smp_local_timer_interrupt();
-	set_irq_regs(old_regs);
-}
-
 /* All of the QUAD interrupt GATES */
 void smp_qic_timer_interrupt(struct pt_regs *regs)
 {
 	struct pt_regs *old_regs = set_irq_regs(regs);
 	ack_QIC_CPI(QIC_TIMER_CPI);
-	wrapper_smp_local_timer_interrupt();
+	voyager_local_timer_interrupt();
 	set_irq_regs(old_regs);
 }
 
 void smp_qic_invalidate_interrupt(struct pt_regs *regs)
 {
 	ack_QIC_CPI(QIC_INVALIDATE_CPI);
-	smp_invalidate_interrupt();
+	smp_invalidate_interrupt(regs);
 }
 
 void smp_qic_reschedule_interrupt(struct pt_regs *regs)
 {
 	ack_QIC_CPI(QIC_RESCHEDULE_CPI);
-	smp_reschedule_interrupt();
+	voyager_reschedule_interrupt();
 }
 
 void smp_qic_enable_irq_interrupt(struct pt_regs *regs)
 {
 	ack_QIC_CPI(QIC_ENABLE_IRQ_CPI);
-	smp_enable_irq_interrupt();
+	voyager_enable_irq_interrupt();
 }
 
 void smp_qic_call_function_interrupt(struct pt_regs *regs)
 {
 	ack_QIC_CPI(QIC_CALL_FUNCTION_CPI);
-	smp_call_function_interrupt();
+	voyager_call_function_interrupt();
 }
 
 void smp_qic_call_function_single_interrupt(struct pt_regs *regs)
 {
 	ack_QIC_CPI(QIC_CALL_FUNCTION_SINGLE_CPI);
-	smp_call_function_single_interrupt();
+	voyager_call_function_single_interrupt();
 }
 
 void smp_vic_cpi_interrupt(struct pt_regs *regs)
@@ -1036,61 +839,26 @@ void smp_vic_cpi_interrupt(struct pt_regs *regs)
 		ack_VIC_CPI(VIC_CPI_LEVEL0);
 
 	if (test_and_clear_bit(VIC_TIMER_CPI, &vic_cpi_mailbox[cpu]))
-		wrapper_smp_local_timer_interrupt();
+		voyager_local_timer_interrupt();
 	if (test_and_clear_bit(VIC_INVALIDATE_CPI, &vic_cpi_mailbox[cpu]))
-		smp_invalidate_interrupt();
+		smp_invalidate_interrupt(regs);
 	if (test_and_clear_bit(VIC_RESCHEDULE_CPI, &vic_cpi_mailbox[cpu]))
-		smp_reschedule_interrupt();
+		voyager_reschedule_interrupt();
 	if (test_and_clear_bit(VIC_ENABLE_IRQ_CPI, &vic_cpi_mailbox[cpu]))
-		smp_enable_irq_interrupt();
+		voyager_enable_irq_interrupt();
 	if (test_and_clear_bit(VIC_CALL_FUNCTION_CPI, &vic_cpi_mailbox[cpu]))
-		smp_call_function_interrupt();
+		voyager_call_function_interrupt();
 	if (test_and_clear_bit(VIC_CALL_FUNCTION_SINGLE_CPI, &vic_cpi_mailbox[cpu]))
-		smp_call_function_single_interrupt();
+		voyager_call_function_single_interrupt();
 	set_irq_regs(old_regs);
 }
 
-static void do_flush_tlb_all(void *info)
-{
-	unsigned long cpu = smp_processor_id();
-
-	__flush_tlb_all();
-	if (per_cpu(cpu_tlbstate, cpu).state == TLBSTATE_LAZY)
-		voyager_leave_mm(cpu);
-}
-
-/* flush the TLB of every active CPU in the system */
-void flush_tlb_all(void)
-{
-	on_each_cpu(do_flush_tlb_all, 0, 1);
-}
-
 /* send a reschedule CPI to one CPU by physical CPU number*/
 static void voyager_smp_send_reschedule(int cpu)
 {
 	send_one_CPI(cpu, VIC_RESCHEDULE_CPI);
 }
 
-int hard_smp_processor_id(void)
-{
-	__u8 i;
-	__u8 cpumask = inb(VIC_PROC_WHO_AM_I);
-	if ((cpumask & QUAD_IDENTIFIER) == QUAD_IDENTIFIER)
-		return cpumask & 0x1F;
-
-	for (i = 0; i < 8; i++) {
-		if (cpumask & (1 << i))
-			return i;
-	}
-	printk("** WARNING ** Illegal cpuid returned by VIC: %d", cpumask);
-	return 0;
-}
-
-int safe_smp_processor_id(void)
-{
-	return hard_smp_processor_id();
-}
-
 /* broadcast a halt to all other CPUs */
 static void voyager_smp_send_stop(void)
 {
@@ -1113,31 +881,14 @@ void smp_vic_timer_interrupt(void)
  * multiplier is 1 and it can be changed by writing the new multiplier
  * value into /proc/profile.
  */
-void smp_local_timer_interrupt(void)
+static void smp_local_timer_interrupt(void)
 {
 	int cpu = smp_processor_id();
 	long weight;
 
+	inc_irq_stat(apic_timer_irqs);
 	profile_tick(CPU_PROFILING);
-	if (--per_cpu(prof_counter, cpu) <= 0) {
-		/*
-		 * The multiplier may have changed since the last time we got
-		 * to this point as a result of the user writing to
-		 * /proc/profile. In this case we need to adjust the APIC
-		 * timer accordingly.
-		 *
-		 * Interrupts are already masked off at this point.
-		 */
-		per_cpu(prof_counter, cpu) = per_cpu(prof_multiplier, cpu);
-		if (per_cpu(prof_counter, cpu) !=
-		    per_cpu(prof_old_multiplier, cpu)) {
-			/* FIXME: need to update the vic timer tick here */
-			per_cpu(prof_old_multiplier, cpu) =
-			    per_cpu(prof_counter, cpu);
-		}
-
-		update_process_times(user_mode_vm(get_irq_regs()));
-	}
+	update_process_times(user_mode(get_irq_regs()));
 
 	if (((1 << cpu) & voyager_extended_vic_processors) == 0)
 		/* only extended VIC processors participate in
@@ -1203,25 +954,6 @@ void smp_local_timer_interrupt(void)
 #endif
 }
 
-/* setup the profiling timer */
-int setup_profiling_timer(unsigned int multiplier)
-{
-	int i;
-
-	if ((!multiplier))
-		return -EINVAL;
-
-	/*
-	 * Set the new multiplier for each CPU. CPUs don't start using the
-	 * new values until the next timer interrupt in which they do process
-	 * accounting.
-	 */
-	for (i = 0; i < nr_cpu_ids; ++i)
-		per_cpu(prof_multiplier, i) = multiplier;
-
-	return 0;
-}
-
 /* This is a bit of a mess, but forced on us by the genirq changes
  * there's no genirq handler that really does what voyager wants
  * so hack it up with the simple IRQ handler */
@@ -1262,12 +994,17 @@ void __init voyager_smp_intr_init(void)
 	QIC_SET_GATE(QIC_CALL_FUNCTION_SINGLE_CPI,
 		     qic_call_function_single_interrupt);
 
-	/* now put the VIC descriptor into the first 48 IRQs
+	/* now put the VIC descriptor into the first 16 IRQs
+	 *
+	 * This is for later: first 16 correspond to PC IRQs;
 	 *
-	 * This is for later: first 16 correspond to PC IRQs; next 16
-	 * are Primary MC IRQs and final 16 are Secondary MC IRQs */
-	for (i = 0; i < 48; i++)
-		set_irq_chip_and_handler(i, &vic_chip, handle_vic_irq);
+	 * Should have next 16 as Primary MC IRQs and final 16 as
+	 * Secondary MC IRQs but in order to fit into the Linux
+	 * scheme, we start each of the separate MC interrupts in the
+	 * same 0-16 legacy space */
+	for (i = 0; i < 16; i++)
+		set_irq_chip_and_handler_name(i, &vic_chip, handle_vic_irq,
+					      "level");
 }
 
 /* send a CPI at level cpi to a set of cpus in cpuset (set 1 bit per
@@ -1280,7 +1017,7 @@ static void send_CPI(__u32 cpuset, __u8 cpi)
 	if (cpi < VIC_START_FAKE_CPI) {
 		/* fake CPI are only used for booting, so send to the
 		 * extended quads as well---Quads must be VIC booted */
-		outb((__u8) (cpuset), VIC_CPI_Registers[cpi]);
+		outb((__u8) cpuset, VIC_CPI_Registers[cpi]);
 		return;
 	}
 	if (quad_cpuset)
@@ -1293,8 +1030,7 @@ static void send_CPI(__u32 cpuset, __u8 cpi)
 		if (cpuset & (1 << cpu))
 			set_bit(cpi, &vic_cpi_mailbox[cpu]);
 	}
-	if (cpuset)
-		outb((__u8) cpuset, VIC_CPI_Registers[VIC_CPI_LEVEL0]);
+	outb((__u8) cpuset, VIC_CPI_Registers[VIC_CPI_LEVEL0]);
 }
 
 /* Acknowledge receipt of CPI in the QIC, clear in QIC hardware and
@@ -1302,7 +1038,7 @@ static void send_CPI(__u32 cpuset, __u8 cpi)
  * */
 static inline void ack_QIC_CPI(__u8 cpi)
 {
-	__u8 cpu = hard_smp_processor_id();
+	__u8 cpu = voyager_hard_smp_processor_id();
 
 	cpi &= 7;
 
@@ -1588,7 +1324,7 @@ static void after_handle_vic_irq(unsigned int irq)
  * change the mask and then do an interrupt enable CPI to re-enable on
  * the selected processors */
 
-void set_vic_irq_affinity(unsigned int irq, const struct cpumask *mask)
+static void set_vic_irq_affinity(unsigned int irq, const struct cpumask *mask)
 {
 	/* Only extended processors handle interrupts */
 	unsigned long real_mask;
@@ -1720,7 +1456,7 @@ void voyager_smp_dump()
 	}
 }
 
-void smp_voyager_power_off(void *dummy)
+static void smp_voyager_power_off(void)
 {
 	if (smp_processor_id() == boot_cpu_id)
 		voyager_power_off();
@@ -1734,16 +1470,23 @@ static void __init voyager_smp_prepare_cpus(unsigned int max_cpus)
 	smp_boot_cpus();
 }
 
+static void __init voyager_prefill_possible_map(void)
+{
+	/* present map is initialised in voyager_find_smp_config */
+	init_cpu_possible(&voyager_cpu_present_map);
+}
+
 static void __cpuinit voyager_smp_prepare_boot_cpu(void)
 {
 	int cpu = smp_processor_id();
 	switch_to_new_gdt(cpu);
 
-	cpu_set(cpu, cpu_online_map);
-	cpu_set(cpu, cpu_callout_map);
-	cpu_set(cpu, cpu_possible_map);
-	cpu_set(cpu, cpu_present_map);
+	init_cpu_online(&cpumask_of_cpu(cpu));
+
+	cpumask_copy(cpu_callout_mask, &cpumask_of_cpu(cpu));
+	cpumask_copy(cpu_callin_mask, &CPU_MASK_NONE);
 
+	init_cpu_present(&cpumask_of_cpu(cpu));
 }
 
 static int __cpuinit voyager_cpu_up(unsigned int cpu)
@@ -1753,7 +1496,7 @@ static int __cpuinit voyager_cpu_up(unsigned int cpu)
 		return -ENOSYS;
 
 	/* In case one didn't come up */
-	if (!cpu_isset(cpu, cpu_callin_map))
+	if (!cpumask_test_cpu(cpu, cpu_callin_mask))
 		return -EIO;
 	/* Unleash the CPU! */
 	cpu_set(cpu, smp_commenced_mask);
@@ -1769,7 +1512,12 @@ static void __init voyager_smp_cpus_done(unsigned int max_cpus)
 
 void __init smp_setup_processor_id(void)
 {
-	current_thread_info()->cpu = hard_smp_processor_id();
+	if (is_voyager()) {
+		int cpu = voyager_hard_smp_processor_id();
+
+		current_thread_info()->cpu = cpu;
+		percpu_write(cpu_number, cpu);
+	}
 }
 
 static void voyager_send_call_func(const struct cpumask *callmask)
@@ -1783,7 +1531,7 @@ static void voyager_send_call_func_single(int cpu)
 	send_CPI(1 << cpu, VIC_CALL_FUNCTION_SINGLE_CPI);
 }
 
-struct smp_ops smp_ops = {
+static struct smp_ops voyager_smp_ops = {
 	.smp_prepare_boot_cpu = voyager_smp_prepare_boot_cpu,
 	.smp_prepare_cpus = voyager_smp_prepare_cpus,
 	.cpu_up = voyager_cpu_up,
@@ -1794,4 +1542,54 @@ struct smp_ops smp_ops = {
 
 	.send_call_func_ipi = voyager_send_call_func,
 	.send_call_func_single_ipi = voyager_send_call_func_single,
+	.hard_smp_processor_id = voyager_hard_smp_processor_id,
+	.safe_smp_processor_id = voyager_hard_smp_processor_id,
 };
+
+static int __init voyager_get_smp_config(unsigned int early)
+{
+	/* Don't do any MP parsing ... we'll crash */
+	return 1;
+}
+
+/*
+ * FIXME: Voyager shouldn't be using apics, so this is temporary
+ * until mm/tlb.c gets sorted out (probably by using smp_call_function)
+ *
+ * What we currently do is hijack apic->send_IPI_mask to send the
+ * flush function (via smp_call_function_many) and apic->write (so
+ * that the entangled ack_APIC_irq also doesn't crash.
+ */
+
+static void voyager_IPI_flush(void *data)
+{
+	unsigned int vector = (unsigned int)(unsigned long)data;
+	struct pt_regs regs;
+
+	regs.orig_ax = ~vector;
+
+	smp_invalidate_interrupt(&regs);
+}
+
+static void voyager_IPI_mask_for_tlb(const cpumask_t *mask, int vector)
+{
+	smp_call_function_many(mask, voyager_IPI_flush, (void *)vector, 1);
+}
+
+#include <asm/apic.h>
+
+static void voyager_apic_write(u32 reg, u32 v)
+{
+}
+
+void voyager_smp_detect(struct x86_quirks *voyager_x86_quirks)
+{
+	smp_ops = voyager_smp_ops;
+	nr_ioapics = 0;
+	voyager_x86_quirks->mach_find_smp_config = voyager_find_smp_config;
+	voyager_x86_quirks->mach_get_smp_config = voyager_get_smp_config;
+	voyager_x86_quirks->prefill_possible_map = voyager_prefill_possible_map;
+	pm_power_off = smp_voyager_power_off;
+	apic->send_IPI_mask = voyager_IPI_mask_for_tlb;
+	apic->write = voyager_apic_write;
+}
diff --git a/arch/x86/mach-voyager/voyager_thread.c b/arch/x86/mach-voyager/voyager_thread.c
index 15464a2..217ccc7 100644
--- a/arch/x86/mach-voyager/voyager_thread.c
+++ b/arch/x86/mach-voyager/voyager_thread.c
@@ -110,6 +110,8 @@ static int thread(void *unused)
 
 static int __init voyager_thread_start(void)
 {
+	if (!is_voyager())
+		return 0;
 	voyager_thread = kthread_run(thread, NULL, "kvoyagerd");
 	if (IS_ERR(voyager_thread)) {
 		printk(KERN_ERR
@@ -121,7 +123,8 @@ static int __init voyager_thread_start(void)
 
 static void __exit voyager_thread_stop(void)
 {
-	kthread_stop(voyager_thread);
+	if (is_voyager())
+		kthread_stop(voyager_thread);
 }
 
 module_init(voyager_thread_start);
-- 
1.6.2.1

Re: [PATCH 10/14] [VOYAGER] x86: make disabling the apics functional instead of a flag

[Cyrill Gorcunov]

[James Bottomley - Tue, Apr 14, 2009 at 10:51:36AM -0500]
| This allows the elimination of some ifdef guards in setup.c.
| Additionally probe_32.c doesn't need to run through the apics in
| generic_apic_probe() if they're disabled.
| 
| Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
| ---
|  arch/x86/include/asm/apic.h     |    6 ++++++
|  arch/x86/kernel/apic/apic.c     |    3 +++
|  arch/x86/kernel/apic/probe_32.c |    3 +++
|  arch/x86/kernel/setup.c         |    4 +---
|  4 files changed, 13 insertions(+), 3 deletions(-)
| 
| diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
| index 42f2f83..391c464 100644
| --- a/arch/x86/include/asm/apic.h
| +++ b/arch/x86/include/asm/apic.h
| @@ -246,12 +246,18 @@ static inline int apic_is_clustered_box(void)
|  extern u8 setup_APIC_eilvt_mce(u8 vector, u8 msg_type, u8 mask);
|  extern u8 setup_APIC_eilvt_ibs(u8 vector, u8 msg_type, u8 mask);
|  
| +static inline void disable_APIC(void)
| +{
| +	disable_local_APIC();
| +	disable_apic = 1;
| +}
|  
|  #else /* !CONFIG_X86_LOCAL_APIC */
|  static inline void lapic_shutdown(void) { }
|  #define local_apic_timer_c2_ok		1
|  static inline void init_apic_mappings(void) { }
|  static inline void disable_local_APIC(void) { }
| +static inline void disable_APIC(void) { }
|  
|  #endif /* !CONFIG_X86_LOCAL_APIC */
|  
| diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
| index f9e830e..aa96dbe 100644
| --- a/arch/x86/kernel/apic/apic.c
| +++ b/arch/x86/kernel/apic/apic.c
| @@ -1539,6 +1539,9 @@ void __init early_init_lapic_mapping(void)
|   */
|  void __init init_apic_mappings(void)
|  {
| +	if (disable_apic)
| +		return;
| +

No, we shouldn't do that without additional
code review (otherwise we will loose mapping for fake apic page).
And I suspect we get NULL deref on reboot procedure
if kernel was compiled _with_ SMP support but APIC disabled
by kernel option. hmm, can't find this reference in LKML.
I was telling Ingo about my suspicious on smp operations
when APIC is disabled by option and we're safe _only_ 'cause
we have fake mapping page reserved. For example call of
smp_send_stop() in kernel/panic.c if kernel was compiled _with_ SMP
support and then APIC disabled by kernel option.

|  	if (x2apic) {
|  		boot_cpu_physical_apicid = read_apic_id();
|  		return;
| diff --git a/arch/x86/kernel/apic/probe_32.c b/arch/x86/kernel/apic/probe_32.c
| index 01eda2a..049d7a0 100644
| --- a/arch/x86/kernel/apic/probe_32.c
| +++ b/arch/x86/kernel/apic/probe_32.c
| @@ -226,6 +226,9 @@ void __init generic_bigsmp_probe(void)
|  
|  void __init generic_apic_probe(void)
|  {
| +	if (disable_apic)
| +		return;
| +

Look suspicious too, sorry. If kernel compiled with local apic
set we rely on apic read ops regardless if apic facility
has been disabled by option or not.

I could be missing something /which has quite a high probability magnitude/.
Yinghai help needed :) CC'ed

|  	if (!cmdline_apic) {
|  		int i;
|  		for (i = 0; apic_probe[i]; i++) {
| diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
| index bee0914..13779e2 100644
| --- a/arch/x86/kernel/setup.c
| +++ b/arch/x86/kernel/setup.c
| @@ -770,9 +770,7 @@ void __init setup_arch(char **cmdline_p)
|  	reserve_early_setup_data();
|  
|  	if (acpi_mps_check()) {
| -#ifdef CONFIG_X86_LOCAL_APIC
| -		disable_apic = 1;
| -#endif
| +		disable_APIC();
|  		setup_clear_cpu_cap(X86_FEATURE_APIC);
|  	}
|  
| -- 
| 1.6.2.1
| 

        Cyrill

Re: [PATCH 10/14] [VOYAGER] x86: make disabling the apics functional instead of a flag

[Cyrill Gorcunov]

[Cyrill Gorcunov - Tue, Apr 14, 2009 at 09:09:42PM +0400]
...
| | diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
| | index f9e830e..aa96dbe 100644
| | --- a/arch/x86/kernel/apic/apic.c
| | +++ b/arch/x86/kernel/apic/apic.c
| | @@ -1539,6 +1539,9 @@ void __init early_init_lapic_mapping(void)
| |   */
| |  void __init init_apic_mappings(void)
| |  {
| | +	if (disable_apic)
| | +		return;
| | +
| 
| No, we shouldn't do that without additional
| code review (otherwise we will loose mapping for fake apic page).
| And I suspect we get NULL deref on reboot procedure
| if kernel was compiled _with_ SMP support but APIC disabled
| by kernel option. hmm, can't find this reference in LKML.
| I was telling Ingo about my suspicious on smp operations
| when APIC is disabled by option and we're safe _only_ 'cause
| we have fake mapping page reserved. For example call of
| smp_send_stop() in kernel/panic.c if kernel was compiled _with_ SMP
| support and then APIC disabled by kernel option.
| 
| |  	if (x2apic) {
| |  		boot_cpu_physical_apicid = read_apic_id();
| |  		return;
...

Ah, I found that link -- http://lkml.org/lkml/2009/4/12/139
I've promised to take a look, unfortunately out of time now.
Maybe a bit later.

       Cyrill

Re: [PATCH 10/14] [VOYAGER] x86: make disabling the apics functional instead of a flag

[James Bottomley]

On Tue, 2009-04-14 at 21:44 +0400, Cyrill Gorcunov wrote:
> [Cyrill Gorcunov - Tue, Apr 14, 2009 at 09:09:42PM +0400]
> ...
> | | diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
> | | index f9e830e..aa96dbe 100644
> | | --- a/arch/x86/kernel/apic/apic.c
> | | +++ b/arch/x86/kernel/apic/apic.c
> | | @@ -1539,6 +1539,9 @@ void __init early_init_lapic_mapping(void)
> | |   */
> | |  void __init init_apic_mappings(void)
> | |  {
> | | +	if (disable_apic)
> | | +		return;
> | | +
> | 
> | No, we shouldn't do that without additional
> | code review (otherwise we will loose mapping for fake apic page).
> | And I suspect we get NULL deref on reboot procedure
> | if kernel was compiled _with_ SMP support but APIC disabled
> | by kernel option. hmm, can't find this reference in LKML.
> | I was telling Ingo about my suspicious on smp operations
> | when APIC is disabled by option and we're safe _only_ 'cause
> | we have fake mapping page reserved. For example call of
> | smp_send_stop() in kernel/panic.c if kernel was compiled _with_ SMP
> | support and then APIC disabled by kernel option.
> | 
> | |  	if (x2apic) {
> | |  		boot_cpu_physical_apicid = read_apic_id();
> | |  		return;
> ...
> 
> Ah, I found that link -- http://lkml.org/lkml/2009/4/12/139
> I've promised to take a look, unfortunately out of time now.
> Maybe a bit later.

Hmm, well, looking at this, I think there are two points

The first is that disable_apic should really mean that: It is a
dangerous option; there are modern CPUs that can't deliver interrupts
without apics and if you have one and disable it, there's no way of
preventing the hang that follows (because you can't even get timer
interrupts).

Secondly, I can fix your original emailed problem by having a check for
disable_apic in the shutdown path on disable_local_apic() ... I think
that fixes everything?

James

Re: [PATCH 10/14] [VOYAGER] x86: make disabling the apics functional instead of a flag

[Cyrill Gorcunov]

[James Bottomley - Wed, Apr 15, 2009 at 12:51:09PM +0000]
| On Tue, 2009-04-14 at 21:44 +0400, Cyrill Gorcunov wrote:
| > [Cyrill Gorcunov - Tue, Apr 14, 2009 at 09:09:42PM +0400]
| > ...
| > | | diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
| > | | index f9e830e..aa96dbe 100644
| > | | --- a/arch/x86/kernel/apic/apic.c
| > | | +++ b/arch/x86/kernel/apic/apic.c
| > | | @@ -1539,6 +1539,9 @@ void __init early_init_lapic_mapping(void)
| > | |   */
| > | |  void __init init_apic_mappings(void)
| > | |  {
| > | | +	if (disable_apic)
| > | | +		return;
| > | | +
| > | 
| > | No, we shouldn't do that without additional
| > | code review (otherwise we will loose mapping for fake apic page).
| > | And I suspect we get NULL deref on reboot procedure
| > | if kernel was compiled _with_ SMP support but APIC disabled
| > | by kernel option. hmm, can't find this reference in LKML.
| > | I was telling Ingo about my suspicious on smp operations
| > | when APIC is disabled by option and we're safe _only_ 'cause
| > | we have fake mapping page reserved. For example call of
| > | smp_send_stop() in kernel/panic.c if kernel was compiled _with_ SMP
| > | support and then APIC disabled by kernel option.
| > | 
| > | |  	if (x2apic) {
| > | |  		boot_cpu_physical_apicid = read_apic_id();
| > | |  		return;
| > ...
| > 
| > Ah, I found that link -- http://lkml.org/lkml/2009/4/12/139
| > I've promised to take a look, unfortunately out of time now.
| > Maybe a bit later.
| 
| Hmm, well, looking at this, I think there are two points
| 
| The first is that disable_apic should really mean that: It is a
| dangerous option; there are modern CPUs that can't deliver interrupts
| without apics and if you have one and disable it, there's no way of
| preventing the hang that follows (because you can't even get timer
| interrupts).

Even having APIC (local or discrete) cpu (well, not cpu itself but
chipset logic rather) is to provide backward compatibility via 8259(a)
(or familiar one) controller for ExtInt or VirtualWire modes I believe.
Though to be fair I don't have most modern cpus like Core i7 under the
hands to check this. We're talking about x86 family right?

| 
| Secondly, I can fix your original emailed problem by having a check for
| disable_apic in the shutdown path on disable_local_apic() ... I think
| that fixes everything?

Yes, it should do the trick. Though there could be other ways
to hang on SMP+APIC compiled kernel with disable_apic passed
I guess :) But testing should reveal the screwed pathes.

| 
| James
| 
| 
        Cyrill

Re: [PATCH 01/14] [VOYAGER] x86: add {safe,hard}_smp_processor_id to smp_ops

[Cyrill Gorcunov]

[James Bottomley - Tue, Apr 14, 2009 at 10:51:27AM -0500]
| Not having apics, Voyager can't use the default apic implementation of
| these, it has to read from a special port in the VIC to get the
| processor ID, so abstract these functions in smp_ops to allow voyager
| to live simultaneously with the apic code.
| 
| Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
| ---
|  arch/x86/include/asm/smp.h  |   13 +++++++++++--
|  arch/x86/kernel/apic/apic.c |    5 -----
|  arch/x86/kernel/apic/ipi.c  |    2 +-
|  arch/x86/kernel/smp.c       |    7 +++++++
|  arch/x86/xen/smp.c          |    7 +++++++
|  5 files changed, 26 insertions(+), 8 deletions(-)
| 
| diff --git a/arch/x86/include/asm/smp.h b/arch/x86/include/asm/smp.h
| index 19e0d88..aac866f 100644
| --- a/arch/x86/include/asm/smp.h
| +++ b/arch/x86/include/asm/smp.h
| @@ -60,6 +60,8 @@ struct smp_ops {
|  
|  	void (*send_call_func_ipi)(const struct cpumask *mask);
|  	void (*send_call_func_single_ipi)(int cpu);
| +	int (*hard_smp_processor_id)(void);
| +	int (*safe_smp_processor_id)(void);
|  };
|  
|  /* Globals due to paravirt */
| @@ -159,7 +161,11 @@ extern unsigned disabled_cpus __cpuinitdata;
|   * so this is correct in the x86 case.
|   */
|  #define raw_smp_processor_id() (percpu_read(cpu_number))
| -extern int safe_smp_processor_id(void);
| +int apic_safe_smp_processor_id(void);
| +static inline int safe_smp_processor_id(void)
| +{
| +	return smp_ops.safe_smp_processor_id();
| +}
|  
|  #elif defined(CONFIG_X86_64_SMP)
|  #define raw_smp_processor_id() (percpu_read(cpu_number))
| @@ -185,7 +191,10 @@ static inline int logical_smp_processor_id(void)
|  
|  #endif
|  
| -extern int hard_smp_processor_id(void);
| +static inline int hard_smp_processor_id(void)
| +{
| +	return smp_ops.hard_smp_processor_id();
| +}
|  

Hi James, wouldn't it break summit32 platform?
This snippet from summit_32.c

static void summit_init_apic_ldr(void)
{
	unsigned long val, id;
	int count = 0;
--->	u8 my_id = (u8)hard_smp_processor_id();
	u8 my_cluster = APIC_CLUSTER(my_id);

if we have CONFIG_SMP _not_ set smp_ops.hard_smp_processor_id
would be plain NULL deref (or linker warning)? I could be missing something...
 
        Cyrill

Re: [PATCH 01/14] [VOYAGER] x86: add {safe,hard}_smp_processor_id to smp_ops

[James Bottomley]

[sent to correct cc list this time]
On Tue, 2009-04-14 at 20:31 +0400, Cyrill Gorcunov wrote:
> [James Bottomley - Tue, Apr 14, 2009 at 10:51:27AM -0500]
> | Not having apics, Voyager can't use the default apic implementation of
> | these, it has to read from a special port in the VIC to get the
> | processor ID, so abstract these functions in smp_ops to allow voyager
> | to live simultaneously with the apic code.
> | 
> Hi James, wouldn't it break summit32 platform?
> This snippet from summit_32.c
> 
> static void summit_init_apic_ldr(void)
> {
>       unsigned long val, id;
>       int count = 0;
> --->  u8 my_id = (u8)hard_smp_processor_id();
>       u8 my_cluster = APIC_CLUSTER(my_id);
> 
> if we have CONFIG_SMP _not_ set smp_ops.hard_smp_processor_id
> would be plain NULL deref (or linker warning)? I could be missing something...

I think so, yes, thanks!

Apparently it missed out on the coversion to read_apic_id().

This should fix it up, I'll fold it into the 01 patch

James

---
diff --git a/arch/x86/kernel/apic/summit_32.c b/arch/x86/kernel/apic/summit_32.c
index 9cfe1f4..6e1c7ed 100644
--- a/arch/x86/kernel/apic/summit_32.c
+++ b/arch/x86/kernel/apic/summit_32.c
@@ -206,7 +206,7 @@ static void summit_init_apic_ldr(void)
 {
        unsigned long val, id;
        int count = 0;
-       u8 my_id = (u8)hard_smp_processor_id();
+       u8 my_id = (u8)read_apic_id();
        u8 my_cluster = APIC_CLUSTER(my_id);
 #ifdef CONFIG_SMP
        u8 lid;
@@ -333,7 +333,7 @@ static unsigned int summit_cpu_mask_to_apicid_and(const struct cpumask *inmask,
  */
 static int summit_phys_pkg_id(int cpuid_apic, int index_msb)
 {
-       return hard_smp_processor_id() >> index_msb;
+       return read_apic_id() >> index_msb;
 }
 
 static int probe_summit(void)

Re: [PATCH 01/14] [VOYAGER] x86: add {safe,hard}_smp_processor_id to smp_ops

[Jeremy Fitzhardinge]

James Bottomley wrote:
> Not having apics, Voyager can't use the default apic implementation of
> these, it has to read from a special port in the VIC to get the
> processor ID, so abstract these functions in smp_ops to allow voyager
> to live simultaneously with the apic code.
>   

I thnk we should just drop safe_smp_processor_id().  It doesn't seem to 
do anything useful.

> diff --git a/arch/x86/xen/smp.c b/arch/x86/xen/smp.c
> index 429834e..eb795bf 100644
> --- a/arch/x86/xen/smp.c
> +++ b/arch/x86/xen/smp.c
> @@ -454,6 +454,11 @@ static irqreturn_t xen_call_function_single_interrupt(int irq, void *dev_id)
>  	return IRQ_HANDLED;
>  }
>  
> +static int xen_hard_smp_processor_id(void)
> +{
> +	return read_apic_id();
> +}
>   

This should just be "return smp_processor_id()".  There are no 
meaningful APICs under Xen.

    J

Re: [PATCH 01/14] [VOYAGER] x86: add {safe,hard}_smp_processor_id to smp_ops

[James Bottomley]

On Tue, 2009-04-14 at 09:35 -0700, Jeremy Fitzhardinge wrote:
> James Bottomley wrote:
> > Not having apics, Voyager can't use the default apic implementation of
> > these, it has to read from a special port in the VIC to get the
> > processor ID, so abstract these functions in smp_ops to allow voyager
> > to live simultaneously with the apic code.
> >   
> 
> I thnk we should just drop safe_smp_processor_id().  It doesn't seem to 
> do anything useful.

OK ... I don't think it does anything either.  It was introduced by
VMware a long time ago if I remember correctly ... something to do with
the way we get the ID in the boot sequence, but I've forgotten the
details.

I can eliminate it as a separate precursor patch to this.

> > diff --git a/arch/x86/xen/smp.c b/arch/x86/xen/smp.c
> > index 429834e..eb795bf 100644
> > --- a/arch/x86/xen/smp.c
> > +++ b/arch/x86/xen/smp.c
> > @@ -454,6 +454,11 @@ static irqreturn_t xen_call_function_single_interrupt(int irq, void *dev_id)
> >  	return IRQ_HANDLED;
> >  }
> >  
> > +static int xen_hard_smp_processor_id(void)
> > +{
> > +	return read_apic_id();
> > +}
> >   
> 
> This should just be "return smp_processor_id()".  There are no 
> meaningful APICs under Xen.

OK, will reroll.

James

Re: [PATCH 00/14] convert voyager over to the x86 quirks model

[Joe Perches]

On Tue, 2009-04-14 at 10:51 -0500, James Bottomley wrote:
> This patch series applies on git head (obviously with
> 965c7ecaf2e2b083d711a01ab33735a4bdeee1a4 reverted)

If accepted, you probably want to revert:

commit 8ed01bbb89c943f714bdf4876f749b1b01792f65
Author: Joe Perches <joe@perches.com>
Date:   Tue Apr 7 21:13:49 2009 -0700

    MAINTAINERS - Remove x86/Voyager no longer in tree

as well.

Re: [PATCH 00/14] convert voyager over to the x86 quirks model

[Ingo Molnar]

* James Bottomley <James.Bottomley@HansenPartnership.com> wrote:

>  39 files changed, 554 insertions(+), 726 deletions(-)

That diffstat is not against current mainline, is it? Would 
you mind to send a proper diffstat with the revert included 
as well? That will give us a complete picture.

	Ingo

Re: [PATCH 00/14] convert voyager over to the x86 quirks model

[Ingo Molnar]

* Ingo Molnar <mingo@elte.hu> wrote:

> 
> * James Bottomley <James.Bottomley@HansenPartnership.com> wrote:
> 
> >  39 files changed, 554 insertions(+), 726 deletions(-)
> 
> That diffstat is not against current mainline, is it? 
> Would you mind to send a proper diffstat with the revert 
> included as well? That will give us a complete picture.

ok, i did the calculations, and the effect of adding back 
x86/Voyager is roughly:

   48 files changed, 5226 insertions(+), 142 deletions(-)

That's quite a lot, and lets put this into perspective.

You are talking about moving ~5000 lines of legacy code back into 
arch/x86/, for a total of *four* Voyager/Linux systems, which are 
using _ancient_ 486/P5 era CPUs.

Two of these systems are in your house, two are somewhere unknown: 
their owners certainly never sent bugreports against recent mainline 
kernels (Voyager didnt even _build_ for a couple of straight kernel 
releases), and i suspect those boxes are probably decommissioned 
already.

A single core on my run-of-the-mill x86 laptop has more computing 
power than all Voyager/Linux systems on the planet, combined. And 
you now want to add back support to the mainline arch/x86 code, 
which we are trying hard to keep running on millions of x86 Linux 
systems?

You still have not given proper justification for doing that ...

Sorry to be the one to say 'no', but the reasons you gave so far 
were not very convincing to me.
 
Anyway, you seem to be willing to maintain this code it out of tree. 
If someone owns such an ancient Voyager box and wants to test a new 
kernel then your tree is a good starting point for doing that. 
There's really no pressing need to have this in mainline.

	Ingo

Re: [PATCH 00/14] convert voyager over to the x86 quirks model

[James Bottomley]

On Tue, 2009-04-14 at 20:08 +0200, Ingo Molnar wrote: 
> * Ingo Molnar <mingo@elte.hu> wrote:
> 
> > 
> > * James Bottomley <James.Bottomley@HansenPartnership.com> wrote:
> > 
> > >  39 files changed, 554 insertions(+), 726 deletions(-)
> > 
> > That diffstat is not against current mainline, is it? 
> > Would you mind to send a proper diffstat with the revert 
> > included as well? That will give us a complete picture.
> 
> ok, i did the calculations, and the effect of adding back 
> x86/Voyager is roughly:
> 
>    48 files changed, 5226 insertions(+), 142 deletions(-)
> 
> That's quite a lot, and lets put this into perspective.

Hardly ... you're conflating two issues:  one is what is the burden to
mainline, which the patch series is about, although only patch 1 (and
possibly patch 5) is truly critical to that, the rest are assorted code
moves.



> You are talking about moving ~5000 lines of legacy code back into 
> arch/x86/, for a total of *four* Voyager/Linux systems, which are 
> using _ancient_ 486/P5 era CPUs.

That's factually incorrect on both counts.  But the real point is that
kernel development isn't a popularity contest, it's about the technical
merits of the code ... something you've been conspicuously avoiding.

> Two of these systems are in your house, two are somewhere unknown: 
> their owners certainly never sent bugreports against recent mainline 
> kernels (Voyager didnt even _build_ for a couple of straight kernel 
> releases), and i suspect those boxes are probably decommissioned 
> already.
> 
> A single core on my run-of-the-mill x86 laptop has more computing 
> power than all Voyager/Linux systems on the planet, combined. And 
> you now want to add back support to the mainline arch/x86 code, 
> which we are trying hard to keep running on millions of x86 Linux 
> systems?

Well, what can I say, if your laptop is the speed standard for
acceptable architectures, then I suppose you'll be removing all of the
embedded architectures as well?

In spite of your disdain for older processors, just remember that the
highest x86 processor with a military spec rating is the 486DX, and one
of the things the US department of defence likes about us is that we
still support it.

Actually, there are a lot of quiet projects using linux because we're
happy to support them on older hardware ... it's one of the things that
makes Linux different from, say, windows.

> You still have not given proper justification for doing that ...

The justification is that I'm prepared to maintain it.

> Sorry to be the one to say 'no', but the reasons you gave so far 
> were not very convincing to me.
>  
> Anyway, you seem to be willing to maintain this code it out of tree. 
> If someone owns such an ancient Voyager box and wants to test a new 
> kernel then your tree is a good starting point for doing that. 
> There's really no pressing need to have this in mainline.

So the message you want to be giving out as a maintainer is that
everything should be developed upstream, except when it's x86?

James

Re: [PATCH 00/14] convert voyager over to the x86 quirks model

[Ingo Molnar]

* James Bottomley <James.Bottomley@HansenPartnership.com> wrote:

> On Tue, 2009-04-14 at 20:08 +0200, Ingo Molnar wrote: 
> > * Ingo Molnar <mingo@elte.hu> wrote:
> > 
> > > 
> > > * James Bottomley <James.Bottomley@HansenPartnership.com> wrote:
> > > 
> > > >  39 files changed, 554 insertions(+), 726 deletions(-)
> > > 
> > > That diffstat is not against current mainline, is it? 
> > > Would you mind to send a proper diffstat with the revert 
> > > included as well? That will give us a complete picture.
> > 
> > ok, i did the calculations, and the effect of adding back 
> > x86/Voyager is roughly:
> > 
> >    48 files changed, 5226 insertions(+), 142 deletions(-)
> > 
> > That's quite a lot, and lets put this into perspective.
> 
> Hardly ... you're conflating two issues: one is what is the burden 
> to mainline, which the patch series is about, although only patch 
> 1 (and possibly patch 5) is truly critical to that, the rest are 
> assorted code moves.

This is roughly the diffstat we get when we add x86/Voyager support 
again. Are you saying that the diffstat is wrong? Could you paste 
the right diffstat then (which i asked you to do before, and which 
you have not done), which i'd get if i pulled your tree, if you 
think this one is wrong?

> > You are talking about moving ~5000 lines of legacy code back 
> > into arch/x86/, for a total of *four* Voyager/Linux systems, 
> > which are using _ancient_ 486/P5 era CPUs.
> 
> That's factually incorrect on both counts. [...]

Please correct my numbers and facts then, if you know them.

> [...]  But the real point is that kernel development isn't a 
> popularity contest, it's about the technical merits of the code 
> ... something you've been conspicuously avoiding.

The popularity and relevance (and obscolescence) of a hardware 
platform is certainly a significant factor in architecture 
maintenance decisions (such as whether and when to merge a piece of 
code or not) - are you saying it is not?

This is not just a new, well-isolated driver to put into drivers/* - 
this is about the most used Linux architecture code.

> > Two of these systems are in your house, two are somewhere 
> > unknown: their owners certainly never sent bugreports against 
> > recent mainline kernels (Voyager didnt even _build_ for a couple 
> > of straight kernel releases), and i suspect those boxes are 
> > probably decommissioned already.
> > 
> > A single core on my run-of-the-mill x86 laptop has more 
> > computing power than all Voyager/Linux systems on the planet, 
> > combined. And you now want to add back support to the mainline 
> > arch/x86 code, which we are trying hard to keep running on 
> > millions of x86 Linux systems?
> 
> Well, what can I say, if your laptop is the speed standard for 
> acceptable architectures, then I suppose you'll be removing all of 
> the embedded architectures as well?

I did not say or suggest that, and you clearly misrepresented my 
argument - so it seems to me you are not really interested in having 
an objective argument about this.

My argument was:

  " A single core on my run-of-the-mill x86 laptop has more
    computing power than all Voyager/Linux systems on the planet,
    combined. "

How can you deform this plain-English fact that exposes the shocking 
irrelevance of Voyager/Linux into suggesting that i'd be "removing 
all of the embedded architectures as well" ?

It's an insane suggestion. [ In reality the combined computing power 
of all ARM or MIPS chips on this planet would certainly beat the 
currently fastest supercomputer. (it would be a few orders of 
magnitude faster, most likely) ]

> > You still have not given proper justification for doing that ...
> 
> The justification is that I'm prepared to maintain it.

Sorry, but your willingness to maintain it _now_, means little to 
me. What matters to me is the existing track record of Voyager:

  v2.6.27.0:   Voyager was broken - it did not even build.
  v2.6.28.0:   Voyager was broken - it did not even build.
  v2.6.29-rc5: Voyager was broken - it did not even build.

... it was broken up to the point where we removed it from the x86 
devel tree. It only built in your out-of-tree repository. As far as 
the upstream kernel users are concerned Voyager did not exist since 
v2.6.27.0.

And the further justification (beyond all the things i mentioned in 
this and prior mails) i'm giving you for not pulling it right now is 
that Voyager/Linux is obviously irrelevant: with just about 4 boxes 
on the planet.

If that factor changes materially then the decision could be 
reconsidered.

> > Sorry to be the one to say 'no', but the reasons you gave so far 
> > were not very convincing to me.
> >  
> > Anyway, you seem to be willing to maintain this code it out of tree. 
> > If someone owns such an ancient Voyager box and wants to test a new 
> > kernel then your tree is a good starting point for doing that. 
> > There's really no pressing need to have this in mainline.
> 
> So the message you want to be giving out as a maintainer is that 
> everything should be developed upstream, except when it's x86?

No, the message i'm giving out as a maintainer is that everything 
that did not get merged due to being judged problematic or 
irrelevant (or both) by a maintainer can still be maintained out of 
tree, so that it can _prove_ the maintainer wrong: i.e. that it is 
useful and still relevant.

Get a user base. Find bugs on those boxes. Prove it that it matters 
to Linux. Then we can admit our mistake in a couple of cycles and 
merge it. There's been projects that lived out of tree for a decade, 
literally. There's life outside the upstream kernel too - it's not 
like your code has been destroyed. And you already expressed 
willingness to maintain it - and you are the only developer able to 
boot such a box. So please do it even if this code is not upstream 
for a few kernel cycles, for the sake of Voyager users.

	Ingo

Re: [PATCH 00/14] convert voyager over to the x86 quirks model

[James Bottomley]

On Wed, 2009-04-15 at 17:35 +0200, Ingo Molnar wrote: 
> * James Bottomley <James.Bottomley@HansenPartnership.com> wrote:
> 
> > On Tue, 2009-04-14 at 20:08 +0200, Ingo Molnar wrote: 
> > > * Ingo Molnar <mingo@elte.hu> wrote:
> > > 
> > > > 
> > > > * James Bottomley <James.Bottomley@HansenPartnership.com> wrote:
> > > > 
> > > > >  39 files changed, 554 insertions(+), 726 deletions(-)
> > > > 
> > > > That diffstat is not against current mainline, is it? 
> > > > Would you mind to send a proper diffstat with the revert 
> > > > included as well? That will give us a complete picture.
> > > 
> > > ok, i did the calculations, and the effect of adding back 
> > > x86/Voyager is roughly:
> > > 
> > >    48 files changed, 5226 insertions(+), 142 deletions(-)
> > > 
> > > That's quite a lot, and lets put this into perspective.
> > 
> > Hardly ... you're conflating two issues: one is what is the burden 
> > to mainline, which the patch series is about, although only patch 
> > 1 (and possibly patch 5) is truly critical to that, the rest are 
> > assorted code moves.
> 
> This is roughly the diffstat we get when we add x86/Voyager support 
> again. Are you saying that the diffstat is wrong? Could you paste 
> the right diffstat then (which i asked you to do before, and which 
> you have not done), which i'd get if i pulled your tree, if you 
> think this one is wrong?

If you're arguing on maintainability, yes.  You specificially excluded a
bunch of files that are in 2.6.29 because you removed them from the
tree: that makes it a rather artificial benchmark.  I could look at
arch/x86 stats from v2.6.29:

488 files changed, 32782 insertions(+), 31057 deletions(-)

So 64,000 lines of code changed ... that's huge ... and I didn't even
try to inflate the figures by removing any of it before trying to make
the calculation as you did.

The point about all of this is that ad Disreli pointed out, statistics
can be used to prove anything.  If you run the voyager count from
v2.6.29 to the head of my changes, by the way, it's

39 files changed, 554 insertions(+), 726 deletions(-)

More to the point is that the core code sits in about 3,600 lines in
mach-voyager, which isn't executed by core x86 and so doesn't affect its
maintainability.

> > > You are talking about moving ~5000 lines of legacy code back 
> > > into arch/x86/, for a total of *four* Voyager/Linux systems, 
> > > which are using _ancient_ 486/P5 era CPUs.
> > 
> > That's factually incorrect on both counts. [...]
> 
> Please correct my numbers and facts then, if you know them.
> 
> > [...]  But the real point is that kernel development isn't a 
> > popularity contest, it's about the technical merits of the code 
> > ... something you've been conspicuously avoiding.
> 
> The popularity and relevance (and obscolescence) of a hardware 
> platform is certainly a significant factor in architecture 
> maintenance decisions (such as whether and when to merge a piece of 
> code or not) - are you saying it is not?

Well, um, yes, I don't ever run a popularity contest before making those
type of decisions for SCSI.   We recently did a bunch of clean ups for
the m68k SCSI drivers to make them more maintainable, which are for hw
up to a decade older than voyager. 

> This is not just a new, well-isolated driver to put into drivers/* - 
> this is about the most used Linux architecture code.

However, I think even you can agree voyager is well isolated.

> > > Two of these systems are in your house, two are somewhere 
> > > unknown: their owners certainly never sent bugreports against 
> > > recent mainline kernels (Voyager didnt even _build_ for a couple 
> > > of straight kernel releases), and i suspect those boxes are 
> > > probably decommissioned already.
> > > 
> > > A single core on my run-of-the-mill x86 laptop has more 
> > > computing power than all Voyager/Linux systems on the planet, 
> > > combined. And you now want to add back support to the mainline 
> > > arch/x86 code, which we are trying hard to keep running on 
> > > millions of x86 Linux systems?
> > 
> > Well, what can I say, if your laptop is the speed standard for 
> > acceptable architectures, then I suppose you'll be removing all of 
> > the embedded architectures as well?
> 
> I did not say or suggest that, and you clearly misrepresented my 
> argument - so it seems to me you are not really interested in having 
> an objective argument about this.

So if you don't want to get caught in semantic absurdities, don't make
the leading statements.  You want this to be a tautology for voyager
isn't a popular architecture, just repackaged to make it look like a new
argument. 

> My argument was:
> 
>   " A single core on my run-of-the-mill x86 laptop has more
>     computing power than all Voyager/Linux systems on the planet,
>     combined. "
> 
> How can you deform this plain-English fact that exposes the shocking 
> irrelevance of Voyager/Linux into suggesting that i'd be "removing 
> all of the embedded architectures as well" ?

It rather effectively made the point that we don't judge architecture
viability on speed either.

> It's an insane suggestion. [ In reality the combined computing power 
> of all ARM or MIPS chips on this planet would certainly beat the 
> currently fastest supercomputer. (it would be a few orders of 
> magnitude faster, most likely) 

Sigh, so if you stick to your own performance definitions, I can give
you Netwinder, Visual Workstation and NUMAQ, all of which voyager can
outperform in your theoretical global devices faceoff, all of which are
in-kernel and at least two of which you recently worked on.

> > > You still have not given proper justification for doing that ...
> > 
> > The justification is that I'm prepared to maintain it.
> 
> Sorry, but your willingness to maintain it _now_, means little to 
> me. What matters to me is the existing track record of Voyager:
> 
>   v2.6.27.0:   Voyager was broken - it did not even build.
>   v2.6.28.0:   Voyager was broken - it did not even build.
>   v2.6.29-rc5: Voyager was broken - it did not even build.

You forgot:

v2.6.29: Builds and boots

I'm sure that was an accidental oversight given that you're unbiased.

> ... it was broken up to the point where we removed it from the x86 
> devel tree. It only built in your out-of-tree repository. As far as 
> the upstream kernel users are concerned Voyager did not exist since 
> v2.6.27.0.

2.6.29 builds and you were the one who failed to apply the patches sent
to the mailing list for 2.6.28.

> And the further justification (beyond all the things i mentioned in 
> this and prior mails) i'm giving you for not pulling it right now is 
> that Voyager/Linux is obviously irrelevant: with just about 4 boxes 
> on the planet.

Every architecture no longer in production (alpha and parisc to name but
two) has a declining population of boxes, that's a reasonable natural
law. So what population size is statistically irrelevant in your terms?
1000, 100, 10 etc.

The point I'm trying to make is that the best way to judge this is via
bitrot.  We don't have to care about the population size if all we judge
it by is the willingness of people to fix it and make it work.  When the
population drops to zero, that will obviously stop, and if it stops
before the zero point then nobody cared enough.  These are objective
criteria that don't get us into the business of running popularity
contests. 

> If that factor changes materially then the decision could be 
> reconsidered.

You mean like someone starting up a voyager production line?  That's a
nice artificial barrier ... 

> > > Sorry to be the one to say 'no', but the reasons you gave so far 
> > > were not very convincing to me.
> > >  
> > > Anyway, you seem to be willing to maintain this code it out of tree. 
> > > If someone owns such an ancient Voyager box and wants to test a new 
> > > kernel then your tree is a good starting point for doing that. 
> > > There's really no pressing need to have this in mainline.
> > 
> > So the message you want to be giving out as a maintainer is that 
> > everything should be developed upstream, except when it's x86?
> 
> No, the message i'm giving out as a maintainer is that everything 
> that did not get merged due to being judged problematic or 
> irrelevant (or both) by a maintainer can still be maintained out of 
> tree, so that it can _prove_ the maintainer wrong: i.e. that it is 
> useful and still relevant.

That's not what we're currently saying to people ... we tell them to get
it upstream to be maintained there.  Otherwise why shouldn't people like
nVidia maintain their driver out of tree with our blessing as well.  And
thus they have legitimate complaints against us when we break it if we
communicate this expectation.

> Get a user base. Find bugs on those boxes.

It has a user base

>  Prove it that it matters 
> to Linux. Then we can admit our mistake in a couple of cycles and 
> merge it. There's been projects that lived out of tree for a decade, 
> literally. There's life outside the upstream kernel too - it's not 
> like your code has been destroyed. And you already expressed 
> willingness to maintain it - and you are the only developer able to 
> boot such a box. So please do it even if this code is not upstream 
> for a few kernel cycles, for the sake of Voyager users.

A right, this is the moving bar argument.

First you said it had to be converted to your quirks architecture.

Then when that happened, you decided it was too late for you to look at
it and you'd have to remove it from the tree for a cycle so it could be
included next time around

Now you're saying several cycles.

This is basically you trying to avoid the problem and hoping it will go
away.

James

Re: [PATCH 00/14] convert voyager over to the x86 quirks model

[Jeff Garzik]

Ingo Molnar wrote:
> * Ingo Molnar <mingo@elte.hu> wrote:
> 
>> * James Bottomley <James.Bottomley@HansenPartnership.com> wrote:
>>
>>>  39 files changed, 554 insertions(+), 726 deletions(-)
>> That diffstat is not against current mainline, is it? 
>> Would you mind to send a proper diffstat with the revert 
>> included as well? That will give us a complete picture.
> 
> ok, i did the calculations, and the effect of adding back 
> x86/Voyager is roughly:
> 
>    48 files changed, 5226 insertions(+), 142 deletions(-)
> 
> That's quite a lot, and lets put this into perspective.
> 
> You are talking about moving ~5000 lines of legacy code back into 
> arch/x86/, for a total of *four* Voyager/Linux systems, which are 
> using _ancient_ 486/P5 era CPUs.
> 
> Two of these systems are in your house, two are somewhere unknown: 
> their owners certainly never sent bugreports against recent mainline 
> kernels (Voyager didnt even _build_ for a couple of straight kernel 
> releases), and i suspect those boxes are probably decommissioned 
> already.
> 
> A single core on my run-of-the-mill x86 laptop has more computing 
> power than all Voyager/Linux systems on the planet, combined. And 
> you now want to add back support to the mainline arch/x86 code, 
> which we are trying hard to keep running on millions of x86 Linux 
> systems?
> 
> You still have not given proper justification for doing that ...
> 
> Sorry to be the one to say 'no', but the reasons you gave so far 
> were not very convincing to me.
>  
> Anyway, you seem to be willing to maintain this code it out of tree. 
> If someone owns such an ancient Voyager box and wants to test a new 
> kernel then your tree is a good starting point for doing that. 
> There's really no pressing need to have this in mainline.

That argument is more than a little unfair, Ingo.  Voyager support used 
to be in mainline.

It got yanked, and now you are adding all sorts of barriers for its 
re-inclusion?

And out of curiosity, who reviewed and accepted the patch that broke 
Voyager's build?

Don't get hopping mad just because someone doesn't move at your warp 
speed.  Just mark it CONFIG_BROKEN and __move on__.

Taking my vendor hat OFF for a second, this sort of stuff just smacks 
"corporate Linux" to me.  What happened to the Linux community that 
encouraged enthusiasts who wanted to keep alive some obscure code in the 
kernel?

I think it will be a sad day when somebody, in an Ingo-like fit of 
cleaning, rm -rf's m68k, alpha, and the like.

I am not an x86 maintainer, of course, but it hardly seems likely that 
the existence of Voyager in the x86 tree is a huge, crushing, 
soul-sucking burden.

A world without dinosaur architectures is a world without fun :)

	Jeff

Re: [PATCH 00/14] convert voyager over to the x86 quirks model

[Ingo Molnar]

* Jeff Garzik <jeff@garzik.org> wrote:

> Ingo Molnar wrote:
>> * Ingo Molnar <mingo@elte.hu> wrote:
>>
>>> * James Bottomley <James.Bottomley@HansenPartnership.com> wrote:
>>>
>>>>  39 files changed, 554 insertions(+), 726 deletions(-)
>>> That diffstat is not against current mainline, is it? Would you mind 
>>> to send a proper diffstat with the revert included as well? That will 
>>> give us a complete picture.
>>
>> ok, i did the calculations, and the effect of adding back x86/Voyager 
>> is roughly:
>>
>>    48 files changed, 5226 insertions(+), 142 deletions(-)
>>
>> That's quite a lot, and lets put this into perspective.
>>
>> You are talking about moving ~5000 lines of legacy code back into  
>> arch/x86/, for a total of *four* Voyager/Linux systems, which are  
>> using _ancient_ 486/P5 era CPUs.
>>
>> Two of these systems are in your house, two are somewhere unknown:  
>> their owners certainly never sent bugreports against recent mainline  
>> kernels (Voyager didnt even _build_ for a couple of straight kernel  
>> releases), and i suspect those boxes are probably decommissioned  
>> already.
>>
>> A single core on my run-of-the-mill x86 laptop has more computing  
>> power than all Voyager/Linux systems on the planet, combined. And you 
>> now want to add back support to the mainline arch/x86 code, which we 
>> are trying hard to keep running on millions of x86 Linux systems?
>>
>> You still have not given proper justification for doing that ...
>>
>> Sorry to be the one to say 'no', but the reasons you gave so far were 
>> not very convincing to me.
>>  Anyway, you seem to be willing to maintain this code it out of tree.  
>> If someone owns such an ancient Voyager box and wants to test a new  
>> kernel then your tree is a good starting point for doing that. There's 
>> really no pressing need to have this in mainline.
>
> That argument is more than a little unfair, Ingo.  Voyager support 
> used to be in mainline.

The last time it built fine upstream was v2.6.26.0. After that:

  v2.6.27.0:   Voyager was broken - it did not even build.
  v2.6.28.0:   Voyager was broken - it did not even build.
  v2.6.29-rc5: Voyager was broken - it did not even build.

... which was the point when we yanked it from the x86 devel tree.

... at which time (after i Cc:-ed James Bottomley on the yanking) he 
sent us the fix which we pulled - so v2.6.29 finally built. (But 
even up to v2.6.27 Voyager was a rocky road - with regressions and 
late fixes.)

Anyway, that long window of breakage has really proven the most 
important fact: that no user really cares about x86/Voyager anymore.

> It got yanked, and now you are adding all sorts of barriers for 
> its re-inclusion?

It got yanked due to multiple releases with problems related to the 
Voyager code - in the final ~3 development cycles it did not even 
build.

Regarding the new x86/Voyager submission: architecture or core 
kernel level code always has a higher barrier of entry than driver 
code for a number of good reasons:

 - Technical isolation between bits is not as strong (it's easy to
   slap in a new driver into drivers/ with virtually no cost to
   driver core maintainers - while arch/x86 related problems 
   interact a lot more)

 - Regressions are more difficult (and most costly) to resolve,
   and affect more people

Architecture bits have an _even higher_ barrier of entry when a 
known-problematic piece of code is re-submitted. I mean, without a 
stronger case than we have now it would be irresponsible for me to 
apply it - and James refuses to state a stronger case.

This is about the most widely used Linux architecture and we must 
keep it maintainable. We've got enough other obsolete pieces of x86 
code that we have to worry about. (We'll probably remove other 
obsolete subarchitectures as well in the future, should they prove 
similarly problematic.)

So i'm saying 'no' here, and i am NAK-ing its inclusion based on 
past patterns of breakage and based on the utter irrelevance of a 
~133 Mhz Pentium based system for which only two existing instances 
are known that have booted any recent kernel. If the code is 
absolutely trouble-free out of tree, for an equivalent amount of 
time (3 kernel releases or so), and gathers users/testers/etc., then 
we might add it, after a thorough technical review. Not sooner than 
that really. Meanwhile if James does not want to maintain it out of 
tree he can ask Linus to overrule our NAK, but i'd like to ask him 
to quote this NAK paragraph from me in his mail to Linus.

Thanks,

	Ingo

Re: [PATCH 00/14] convert voyager over to the x86 quirks model

[Jeff Garzik]

Ingo Molnar wrote:
> * Jeff Garzik <jeff@garzik.org> wrote:
> 
>> Ingo Molnar wrote:
>>> * Ingo Molnar <mingo@elte.hu> wrote:
>>>
>>>> * James Bottomley <James.Bottomley@HansenPartnership.com> wrote:
>>>>
>>>>>  39 files changed, 554 insertions(+), 726 deletions(-)
>>>> That diffstat is not against current mainline, is it? Would you mind 
>>>> to send a proper diffstat with the revert included as well? That will 
>>>> give us a complete picture.
>>> ok, i did the calculations, and the effect of adding back x86/Voyager 
>>> is roughly:
>>>
>>>    48 files changed, 5226 insertions(+), 142 deletions(-)
>>>
>>> That's quite a lot, and lets put this into perspective.
>>>
>>> You are talking about moving ~5000 lines of legacy code back into  
>>> arch/x86/, for a total of *four* Voyager/Linux systems, which are  
>>> using _ancient_ 486/P5 era CPUs.
>>>
>>> Two of these systems are in your house, two are somewhere unknown:  
>>> their owners certainly never sent bugreports against recent mainline  
>>> kernels (Voyager didnt even _build_ for a couple of straight kernel  
>>> releases), and i suspect those boxes are probably decommissioned  
>>> already.
>>>
>>> A single core on my run-of-the-mill x86 laptop has more computing  
>>> power than all Voyager/Linux systems on the planet, combined. And you 
>>> now want to add back support to the mainline arch/x86 code, which we 
>>> are trying hard to keep running on millions of x86 Linux systems?
>>>
>>> You still have not given proper justification for doing that ...
>>>
>>> Sorry to be the one to say 'no', but the reasons you gave so far were 
>>> not very convincing to me.
>>>  Anyway, you seem to be willing to maintain this code it out of tree.  
>>> If someone owns such an ancient Voyager box and wants to test a new  
>>> kernel then your tree is a good starting point for doing that. There's 
>>> really no pressing need to have this in mainline.
>> That argument is more than a little unfair, Ingo.  Voyager support 
>> used to be in mainline.
> 
> The last time it built fine upstream was v2.6.26.0. After that:
> 
>   v2.6.27.0:   Voyager was broken - it did not even build.
>   v2.6.28.0:   Voyager was broken - it did not even build.
>   v2.6.29-rc5: Voyager was broken - it did not even build.
> 
> ... which was the point when we yanked it from the x86 devel tree.

Or IOW you waited less than a year (based on 2.6.26 release date).  That 
is quite impatient.  Getting feedback from dinosaur code is inevitably slow.

You did not even give user(s) the courtesy of putting a notice for many 
months in Documentation/feature-removal-schedule.txt after marking is 
CONFIG_BROKEN, either.


> ... at which time (after i Cc:-ed James Bottomley on the yanking) he 
> sent us the fix which we pulled - so v2.6.29 finally built. (But 
> even up to v2.6.27 Voyager was a rocky road - with regressions and 
> late fixes.)
> 
> Anyway, that long window of breakage has really proven the most 
> important fact: that no user really cares about x86/Voyager anymore.

Yet we can point to patches posted on LKML to remedy this.


>> It got yanked, and now you are adding all sorts of barriers for 
>> its re-inclusion?
> 
> It got yanked due to multiple releases with problems related to the 
> Voyager code - in the final ~3 development cycles it did not even 
> build.

Again -- under a year, and no mention in feature-removal-schedule.


> Regarding the new x86/Voyager submission: architecture or core 
> kernel level code always has a higher barrier of entry than driver 
> code for a number of good reasons:

No, my point is that it is blatantly unfair to remove code, then reset 
standards for inclusion far, far higher than at which it left the tree.

As long as James wants to maintain it, I don't see why we cannot settle 
for "it works and mostly isn't in Ingo's way"


> So i'm saying 'no' here, and i am NAK-ing its inclusion based on 
> past patterns of breakage and based on the utter irrelevance of a 
> ~133 Mhz Pentium based system for which only two existing instances 
> are known that have booted any recent kernel. If the code is 
> absolutely trouble-free out of tree, for an equivalent amount of 
> time (3 kernel releases or so), and gathers users/testers/etc., then 
> we might add it, after a thorough technical review. Not sooner than 
> that really. Meanwhile if James does not want to maintain it out of 
> tree he can ask Linus to overrule our NAK, but i'd like to ask him 
> to quote this NAK paragraph from me in his mail to Linus.

Sets a great pattern for pushing away enthusiasts, IMO.

We should not be zealous about yanking code from the tree.

	Jeff

Re: [PATCH 00/14] convert voyager over to the x86 quirks model

[Ingo Molnar]

* Jeff Garzik <jeff@garzik.org> wrote:

>> Regarding the new x86/Voyager submission: architecture or core 
>> kernel level code always has a higher barrier of entry than 
>> driver code for a number of good reasons:
>
> No, my point is that it is blatantly unfair to remove code, then 
> reset standards for inclusion far, far higher than at which it 
> left the tree.

Oh, i'm all for including new code optimistically. (in fact i'm 
probably a bit over-inclusive)

But i'm not at all for easily re-including known problematic code 
that has been removed. Including known problematic code under the 
same standard as removal i'd call 'very stupid'.

IMO it is a fundamentally good engineering practice to learn from 
past experience and to learn from past mistakes and to require a 
higher standard if an old standard failed to produce an acceptable 
result first time around.

_Especially_ so for such an extremely obsolete piece of hardware 
with a single upstream user+developer and a dismal upstream track 
record ... We really have to learn to say 'no' at a certain point
...

I dont care about Voyager that much - but i do care about not doing 
stupid things intentionally in the code i (co-)maintain.

Anyway, as i said it in the previous mail - in the end it's up to 
Linus and he can override our NAK if we are wrong about it.

	Ingo

Re: [PATCH 00/14] convert voyager over to the x86 quirks model

[James Bottomley]

On Mon, 2009-04-20 at 01:35 +0200, Ingo Molnar wrote:
> * Jeff Garzik <jeff@garzik.org> wrote:
> 
> > Ingo Molnar wrote:
> >> * Ingo Molnar <mingo@elte.hu> wrote:
> >>
> >>> * James Bottomley <James.Bottomley@HansenPartnership.com> wrote:
> >>>
> >>>>  39 files changed, 554 insertions(+), 726 deletions(-)
> >>> That diffstat is not against current mainline, is it? Would you mind 
> >>> to send a proper diffstat with the revert included as well? That will 
> >>> give us a complete picture.
> >>
> >> ok, i did the calculations, and the effect of adding back x86/Voyager 
> >> is roughly:
> >>
> >>    48 files changed, 5226 insertions(+), 142 deletions(-)
> >>
> >> That's quite a lot, and lets put this into perspective.
> >>
> >> You are talking about moving ~5000 lines of legacy code back into  
> >> arch/x86/, for a total of *four* Voyager/Linux systems, which are  
> >> using _ancient_ 486/P5 era CPUs.
> >>
> >> Two of these systems are in your house, two are somewhere unknown:  
> >> their owners certainly never sent bugreports against recent mainline  
> >> kernels (Voyager didnt even _build_ for a couple of straight kernel  
> >> releases), and i suspect those boxes are probably decommissioned  
> >> already.
> >>
> >> A single core on my run-of-the-mill x86 laptop has more computing  
> >> power than all Voyager/Linux systems on the planet, combined. And you 
> >> now want to add back support to the mainline arch/x86 code, which we 
> >> are trying hard to keep running on millions of x86 Linux systems?
> >>
> >> You still have not given proper justification for doing that ...
> >>
> >> Sorry to be the one to say 'no', but the reasons you gave so far were 
> >> not very convincing to me.
> >>  Anyway, you seem to be willing to maintain this code it out of tree.  
> >> If someone owns such an ancient Voyager box and wants to test a new  
> >> kernel then your tree is a good starting point for doing that. There's 
> >> really no pressing need to have this in mainline.
> >
> > That argument is more than a little unfair, Ingo.  Voyager support 
> > used to be in mainline.
> 
> The last time it built fine upstream was v2.6.26.0. After that:
> 
>   v2.6.27.0:   Voyager was broken - it did not even build.
>   v2.6.28.0:   Voyager was broken - it did not even build.
>   v2.6.29-rc5: Voyager was broken - it did not even build.
> 
> ... which was the point when we yanked it from the x86 devel tree.
> 
> ... at which time (after i Cc:-ed James Bottomley on the yanking) he 
> sent us the fix which we pulled - so v2.6.29 finally built. (But 
> even up to v2.6.27 Voyager was a rocky road - with regressions and 
> late fixes.)
> 
> Anyway, that long window of breakage has really proven the most 
> important fact: that no user really cares about x86/Voyager anymore.

That's an interesting economy with the truth.

You had a patch fixing the 2.6.27 breakage about 20 days after the
kernel released and the problem was discovered.  The evidence is here:

http://marc.info/?t=122540077200005

You just sat on the patch and failed to apply it ... until about three
months later you decided you didn't like it ... presumably because you
were trying to remove the subarchitectures upon which voyager is built.

The reason 2.6.28 didn't build was because you still wouldn't apply the
patches.

It's a bit difficult to square this and other fairly lengthy sets of
email exchanges over voyager and the phrase "no user really cares about
voyager"

James