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Subject: Re: [PATCH 3/3] ring-buffer: add design document
From: Huang Ying <ying.huang@intel.com>
To: Steven Rostedt <rostedt@goodmis.org>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
       Ingo Molnar <mingo@elte.hu>, Andrew Morton <akpm@linux-foundation.org>,
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Date: Thu, 11 Jun 2009 10:33:01 +0800
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On Thu, 2009-06-11 at 09:58 +0800, Steven Rostedt wrote:
> On Thu, 11 Jun 2009, Huang Ying wrote:
> 
> > On Thu, 2009-06-11 at 03:53 +0800, Steven Rostedt wrote:
> > > +
> > > +cmpxchg - hardware assisted atomic transaction that performs the following:
> > > +
> > > +   A = B iff previous A == C
> > > +
> > > +   R = cmpxchg(A, C, B) is saying that we replace A with B if and only if
> > > +      current A is equal to C, and we put the old (current) A into R
> > > +
> > > +   R gets the previous A regardless if A is updated with B or not.
> > > +
> > > +   To see if the update was successful a compare of R == C may be used.
> > 
> > As far as I know, some architectures have no hardware assisted (NMI
> > safe) cmpxchg. Is it OK to use cmpxchg in architecture-independent code?
> 
> I can fall back to the lock solution for those archs without cmpxchg. It 
> is NMI safe, because we do spin_trylock() in NMI context. If we fail to 
> acquire the lock in NMI context, we simply drop the packet.

Yes. For users do not care about packet drop, it is acceptable. But
please select the implementation at run-time instead of build time.
Because on some architecture such as ARM, whether CPU has cmpxchg
support is determined at run-time.

> Are these archs without cmpxchg and NMIs, a concern for you?

ARM has no cmpxchg until ARM v6, but it has NMI like mechanism named
FIQ.

Best Regards,
Huang Ying