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From: Jaswinder Singh Rajput <jaswinder@kernel.org>
To: lkml@morethan.org
Cc: Ingo Molnar <mingo@elte.hu>, "H. Peter Anvin" <hpa@kernel.org>,
	x86 maintainers <x86@kernel.org>,
	Andreas Herrmann <andreas.herrmann3@amd.com>,
	Andrew Morton <akpm@linux-foundation.org>,
	Andi Kleen <andi@firstfloor.org>,
	LKML <linux-kernel@vger.kernel.org>,
	Yinghai Lu <yinghai@kernel.org>, Dave Jones <davej@redhat.com>,
	Linus Torvalds <torvalds@linux-foundation.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Robert Richter <robert.richter@amd.com>
Subject: Re: [RFC][PATCH 9/10 -tip] x86: cpu_debug display cpuid functions
Date: Sat, 13 Jun 2009 23:55:26 +0530	[thread overview]
Message-ID: <1244917526.11733.28.camel@ht.satnam> (raw)
In-Reply-To: <200906131253.59412.lkml@morethan.org>

On Sat, 2009-06-13 at 12:53 -0500, Michael S. Zick wrote:
> On Sat June 13 2009, Jaswinder Singh Rajput wrote:
> > 
> > Add support for cpuid standard and extended functions
> > 
> > Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com>
> > ---
> >  arch/x86/include/asm/cpu_debug.h |    4 ++-
> >  arch/x86/kernel/cpu/cpu_debug.c  |   64 ++++++++++++++++++++++++++++++++++++--
> >  2 files changed, 64 insertions(+), 4 deletions(-)
> > 
> > diff --git a/arch/x86/include/asm/cpu_debug.h b/arch/x86/include/asm/cpu_debug.h
> > index dc24338..377f658 100644
> > --- a/arch/x86/include/asm/cpu_debug.h
> > +++ b/arch/x86/include/asm/cpu_debug.h
> > @@ -46,11 +46,11 @@ enum cpu_debug_bit {
> >  	CPU_MMIO,				/* Memory based IO	*/
> >  	CPU_DISPLAY,				/* Display/VGA		*/
> >  	CPU_LINK,				/* HyperTransport	*/
> > -	CPU_CPUID,				/* CPUID		*/
> >  /* Standard Registers							*/
> >  	CPU_TSS,				/* Task Stack Segment	*/
> >  	CPU_CR,					/* Control Registers	*/
> >  	CPU_DT,					/* Descriptor Table	*/
> > +	CPU_CPUID,				/* CPUID		*/
> >  	CPU_PCI,				/* PCI configuration	*/
> >  /* End of Registers flags						*/
> >  	CPU_REG_MAX,				/* Max Registers flags	*/
> > @@ -75,6 +75,8 @@ enum cpu_cat_bit {
> >  #define MAX_CPU_FILES		768		/* Max CPU debug files	*/
> >  #define MAX_CPU_PCI		5		/* AMD supports func 0-4*/
> >  
> > +#define CPUID_MASK		0xffff0000
> > +
> >  struct cpu_private {
> >  	unsigned		cpu;
> >  	unsigned		type;
> > diff --git a/arch/x86/kernel/cpu/cpu_debug.c b/arch/x86/kernel/cpu/cpu_debug.c
> > index b4dfddd..f7f702e 100644
> > --- a/arch/x86/kernel/cpu/cpu_debug.c
> > +++ b/arch/x86/kernel/cpu/cpu_debug.c
> > @@ -72,10 +72,10 @@ static struct cpu_debug_base cpu_base[] = {
> >  	{ "mmio",	CPU_MMIO,	0	},
> >  	{ "display",	CPU_DISPLAY,	0	},
> >  	{ "link",	CPU_LINK,	0	},
> > -	{ "cpuid",	CPU_CPUID,	0	},
> >  	{ "tss",	CPU_TSS,	0	},
> >  	{ "cr",		CPU_CR,		0	},
> >  	{ "dt",		CPU_DT,		0	},
> > +	{ "cpuid",	CPU_CPUID,	0	},
> >  	{ "pci",	CPU_PCI,	0	},
> >  	{ "registers",	CPU_REG_ALL,	0	},
> >  };
> > @@ -303,6 +303,13 @@ static struct cpu_debug_range cpu_amd_pci4[] = {
> >  	{ 0x1E0,	0x1F0,	CPU_POWER	},
> >  };
> >  
> > +/* Extended CPUID base address			*/
> > +static u32 cpu_ext_cpuid[] = {
> > +	0x80000000,		/* Intel, AMD	*/
> > +	0x80860000,		/* Transmeta	*/
> > +	0xC0000000,		/* Centaur	*/
> >
> 
> VIA/Centaur has both 0xC0000000 and 0x8000000
> 

hmm, then this patch will work for multiple extended cpuid levels :

[PATCH 9/10 -tip] x86: cpu_debug display cpuid functions

Add support for cpuid standard and extended functions

Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com>
---
 arch/x86/include/asm/cpu_debug.h |    4 ++-
 arch/x86/kernel/cpu/cpu_debug.c  |   52 +++++++++++++++++++++++++++++++++++--
 2 files changed, 52 insertions(+), 4 deletions(-)

diff --git a/arch/x86/include/asm/cpu_debug.h b/arch/x86/include/asm/cpu_debug.h
index dc24338..377f658 100644
--- a/arch/x86/include/asm/cpu_debug.h
+++ b/arch/x86/include/asm/cpu_debug.h
@@ -46,11 +46,11 @@ enum cpu_debug_bit {
 	CPU_MMIO,				/* Memory based IO	*/
 	CPU_DISPLAY,				/* Display/VGA		*/
 	CPU_LINK,				/* HyperTransport	*/
-	CPU_CPUID,				/* CPUID		*/
 /* Standard Registers							*/
 	CPU_TSS,				/* Task Stack Segment	*/
 	CPU_CR,					/* Control Registers	*/
 	CPU_DT,					/* Descriptor Table	*/
+	CPU_CPUID,				/* CPUID		*/
 	CPU_PCI,				/* PCI configuration	*/
 /* End of Registers flags						*/
 	CPU_REG_MAX,				/* Max Registers flags	*/
@@ -75,6 +75,8 @@ enum cpu_cat_bit {
 #define MAX_CPU_FILES		768		/* Max CPU debug files	*/
 #define MAX_CPU_PCI		5		/* AMD supports func 0-4*/
 
+#define CPUID_MASK		0xffff0000
+
 struct cpu_private {
 	unsigned		cpu;
 	unsigned		type;
diff --git a/arch/x86/kernel/cpu/cpu_debug.c b/arch/x86/kernel/cpu/cpu_debug.c
index b4dfddd..4d881a3 100644
--- a/arch/x86/kernel/cpu/cpu_debug.c
+++ b/arch/x86/kernel/cpu/cpu_debug.c
@@ -72,10 +72,10 @@ static struct cpu_debug_base cpu_base[] = {
 	{ "mmio",	CPU_MMIO,	0	},
 	{ "display",	CPU_DISPLAY,	0	},
 	{ "link",	CPU_LINK,	0	},
-	{ "cpuid",	CPU_CPUID,	0	},
 	{ "tss",	CPU_TSS,	0	},
 	{ "cr",		CPU_CR,		0	},
 	{ "dt",		CPU_DT,		0	},
+	{ "cpuid",	CPU_CPUID,	0	},
 	{ "pci",	CPU_PCI,	0	},
 	{ "registers",	CPU_REG_ALL,	0	},
 };
@@ -303,6 +303,13 @@ static struct cpu_debug_range cpu_amd_pci4[] = {
 	{ 0x1E0,	0x1F0,	CPU_POWER	},
 };
 
+/* Extended CPUID base address			*/
+static u32 cpu_ext_cpuid[] = {
+	0x80000000,		/* Intel, AMD	*/
+	0x80860000,		/* Transmeta	*/
+	0xC0000000,		/* Centaur	*/
+};
+
 /* Check validity of cpu debug flag */
 static int is_typeflag_valid(unsigned cpu, unsigned flag)
 {
@@ -518,6 +525,37 @@ static void print_apic(void *arg)
 #endif
 }
 
+static void print_cpuidabcd(struct seq_file *seq, u32 min, u32 max)
+{
+	u32 i, eax, ebx, ecx, edx;
+
+	for (i = min; i <= max; i++) {
+		cpuid(i, &eax, &ebx, &ecx, &edx);
+		seq_printf(seq, " %08x  %08x  %08x  %08x  %08x\n",
+			   i, eax, ebx, ecx, edx);
+	}
+}
+
+static void print_cpuid(void *arg)
+{
+	struct seq_file *seq = arg;
+	u32 i, level;
+
+	seq_printf(seq, " CPUID\t:\n");
+	seq_printf(seq, "              eax       ebx       ecx       edx\n");
+
+	/* Standard CPUID functions */
+	level = cpuid_eax(0);
+	print_cpuidabcd(seq, 0, level);
+
+	/* Extended CPUID functions */
+	for (i = 0; i < ARRAY_SIZE(cpu_ext_cpuid); i++) {
+		level = cpuid_eax(cpu_ext_cpuid[i]);
+		if ((level & CPUID_MASK) == cpu_ext_cpuid[i])
+			print_cpuidabcd(seq, cpu_ext_cpuid[i], level);
+	}
+}
+
 static void print_apicval(void *arg)
 {
 	struct seq_file *seq = arg;
@@ -632,6 +670,14 @@ static int cpu_seq_show(struct seq_file *seq, void *v)
 	case CPU_DT:
 		smp_call_function_single(priv->cpu, print_dt, seq, 1);
 		break;
+	case CPU_CPUID:
+		if (priv->file == CPU_INDEX)
+			smp_call_function_single(priv->cpu, print_cpuid,
+						 seq, 1);
+		else
+			smp_call_function_single(priv->cpu, print_pcival,
+						 seq, 1);
+		break;
 	case CPU_PCI:
 		if (priv->file == CPU_INDEX)
 			smp_call_function_single(priv->cpu, print_pci, seq, 1);
@@ -814,7 +860,7 @@ static int cpu_init_regfiles(unsigned cpu, unsigned int type, unsigned reg,
 	unsigned file;
 	int err = 0;
 
-	for (file = 0; file <  ARRAY_SIZE(cpu_file); file++) {
+	for (file = 0; file < ARRAY_SIZE(cpu_file); file++) {
 		err = cpu_create_file(cpu, type, reg, file, cat, dentry);
 		if (err)
 			return err;
@@ -973,7 +1019,7 @@ static int cpu_init_allreg(unsigned cpu, struct dentry *dentry)
 	unsigned type;
 	int err = 0;
 
-	for (type = 0; type <  ARRAY_SIZE(cpu_base) - 1; type++) {
+	for (type = 0; type < ARRAY_SIZE(cpu_base) - 1; type++) {
 		cpu_dentry = debugfs_create_dir(cpu_base[type].name, dentry);
 		per_cpu(cpu_arr[type].dentry, cpu) = cpu_dentry;
 
-- 
1.6.0.6




  reply	other threads:[~2009-06-13 18:26 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2009-06-13 16:27 [RFC][GIT PULL][PATCH 0/10 -tip] cpu_debug patches 20090613 Jaswinder Singh Rajput
2009-06-13 16:28 ` [RFC][PATCH 1/10 -tip] x86: cpu_debug update Kconfig entry Jaswinder Singh Rajput
2009-06-13 16:29   ` [RFC][PATCH 2/10 -tip] x86: cpu_debug.c remove some not required header files Jaswinder Singh Rajput
2009-06-13 16:30     ` [RFC][PATCH 3/10 -tip] x86: cpu_debug.c use a WARN_ONCE() instead of a pr_err() Jaswinder Singh Rajput
2009-06-13 16:30       ` [RFC][PATCH 4/10 -tip] x86: cpu_debug make room to support more categories Jaswinder Singh Rajput
2009-06-13 16:31         ` [RFC][PATCH 5/10 -tip] x86: cpu_debug update MSR list to support new architectures Jaswinder Singh Rajput
2009-06-13 16:32           ` [RFC][PATCH 6/10 -tip] x86: cpu_debug make room for more cpu registers Jaswinder Singh Rajput
2009-06-13 16:33             ` [RFC][PATCH 7/10 -tip] x86: cpu_debug support APIC_register_name with directory structure Jaswinder Singh Rajput
2009-06-13 16:34               ` [RFC][PATCH 8/10 -tip] x86: cpu_debug display PCI configuration registers for AMD Jaswinder Singh Rajput
2009-06-13 16:35                 ` [RFC][PATCH 9/10 -tip] x86: cpu_debug display cpuid functions Jaswinder Singh Rajput
2009-06-13 16:35                   ` [RFC][PATCH 10/10 -tip] x86: cpu_debug display basic cpuinfo Jaswinder Singh Rajput
2009-06-13 17:53                   ` [RFC][PATCH 9/10 -tip] x86: cpu_debug display cpuid functions Michael S. Zick
2009-06-13 18:25                     ` Jaswinder Singh Rajput [this message]
2009-06-13 22:27 ` [RFC][GIT PULL][PATCH 0/10 -tip] cpu_debug patches 20090613 Thomas Gleixner
2009-06-14  5:35   ` Jaswinder Singh Rajput
2009-06-14 11:19     ` Thomas Gleixner
2009-06-14 13:19       ` Jaswinder Singh Rajput
2009-06-14 14:32         ` Thomas Gleixner
2009-06-15 13:57   ` Andreas Herrmann

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