From: Jaswinder Singh Rajput <jaswinder@kernel.org>
To: Ingo Molnar <mingo@elte.hu>, Thomas Gleixner <tglx@linutronix.de>,
x86 maintainers <x86@kernel.org>,
LKML <linux-kernel@vger.kernel.org>
Subject: [PATCH -tip] x86: perf_counter fix L1-data-Cache-Store-Referencees for AMD
Date: Thu, 18 Jun 2009 18:58:51 +0530 [thread overview]
Message-ID: <1245331731.3215.3.camel@localhost.localdomain> (raw)
Fix AMD event for Data Cache Refills from System.
By this patch :
./tools/perf/perf stat -e l1d -e l1d-misses -e l1d-write -e l1d-prefetch -e l1d-prefetch-miss -e l1i -e l1i-misses -e l1i-prefetch -e l2 -e l2-misses -e l2-write -e dtlb -e dtlb-misses -e itlb -e itlb-misses -e bpu -e bpu-misses ls /dev/ > /dev/null
Performance counter stats for 'ls /dev/':
2499484 L1-data-Cache-Load-Referencees (scaled from 3.97%)
70347 L1-data-Cache-Load-Misses (scaled from 7.30%)
9360 L1-data-Cache-Store-Referencees (scaled from 8.64%)
32804 L1-data-Cache-Prefetch-Referencees (scaled from 17.72%)
7693 L1-data-Cache-Prefetch-Misses (scaled from 22.97%)
2180945 L1-instruction-Cache-Load-Referencees (scaled from 28.48%)
14518 L1-instruction-Cache-Load-Misses (scaled from 35.00%)
2405 L1-instruction-Cache-Prefetch-Referencees (scaled from 34.89%)
71387 L2-Cache-Load-Referencees (scaled from 34.94%)
18732 L2-Cache-Load-Misses (scaled from 34.92%)
79918 L2-Cache-Store-Referencees (scaled from 36.02%)
1295294 Data-TLB-Cache-Load-Referencees (scaled from 35.99%)
30896 Data-TLB-Cache-Load-Misses (scaled from 33.36%)
1222030 Instruction-TLB-Cache-Load-Referencees (scaled from 29.46%)
357 Instruction-TLB-Cache-Load-Misses (scaled from 20.46%)
530888 Branch-Cache-Load-Referencees (scaled from 11.48%)
8638 Branch-Cache-Load-Misses (scaled from 5.09%)
0.011295149 seconds time elapsed.
Earlier it always shows value 0.
Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com>
---
arch/x86/kernel/cpu/perf_counter.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/x86/kernel/cpu/perf_counter.c b/arch/x86/kernel/cpu/perf_counter.c
index ce1ae3f..37facc5 100644
--- a/arch/x86/kernel/cpu/perf_counter.c
+++ b/arch/x86/kernel/cpu/perf_counter.c
@@ -401,7 +401,7 @@ static const u64 amd_hw_cache_event_ids
[ C(RESULT_MISS) ] = 0x0041, /* Data Cache Misses */
},
[ C(OP_WRITE) ] = {
- [ C(RESULT_ACCESS) ] = 0x0042, /* Data Cache Refills from L2 */
+ [ C(RESULT_ACCESS) ] = 0x0142, /* Data Cache Refills :system */
[ C(RESULT_MISS) ] = 0,
},
[ C(OP_PREFETCH) ] = {
--
1.6.0.6
next reply other threads:[~2009-06-18 13:29 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-06-18 13:28 Jaswinder Singh Rajput [this message]
2009-06-20 7:49 ` [PATCH -tip RESEND] x86: perf_counter fix L1-data-Cache-Store-Referencees for AMD Jaswinder Singh Rajput
2009-06-20 17:43 ` Ingo Molnar
2009-06-20 17:45 ` [tip:perfcounters/urgent] perf_counter, x8: Fix " tip-bot for Jaswinder Singh Rajput
2009-06-21 11:27 ` tip-bot for Jaswinder Singh Rajput
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