[PATCH] X86: Fix x86_cache_size value

[PATCH] X86: Fix x86_cache_size value

[Jaswinder Singh Rajput]

Currently x86_cache_size is showing partial value: L1 or L2 or L3.
It should add all caches like L1 + L2 + L3.

Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com>
---
 arch/x86/kernel/cpu/common.c          |    2 +-
 arch/x86/kernel/cpu/intel_cacheinfo.c |    2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 5ce60a8..581fe17 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -422,7 +422,7 @@ void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
 		return;		/* Again, no L2 cache is possible */
 #endif
 
-	c->x86_cache_size = l2size;
+	c->x86_cache_size += l2size;
 
 	printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n",
 			l2size, ecx & 0xFF);
diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c
index 789efe2..473c75e 100644
--- a/arch/x86/kernel/cpu/intel_cacheinfo.c
+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
@@ -503,7 +503,7 @@ unsigned int __cpuinit init_intel_cacheinfo(struct cpuinfo_x86 *c)
 	if (l3)
 		printk(KERN_INFO "CPU: L3 cache: %dK\n", l3);
 
-	c->x86_cache_size = l3 ? l3 : (l2 ? l2 : (l1i+l1d));
+	c->x86_cache_size = l3 + l2 + l1i + l1d;
 
 	return l2;
 }
-- 
1.6.0.6

[PATCH V2] X86: Fix x86_cache_size value

[Jaswinder Singh Rajput]

Currently x86_cache_size is showing partial value: L1 or L2 or L3.
It should add all caches like L1 + L2 + L3 + Trace.

Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com>
---
 arch/x86/kernel/cpu/common.c          |    2 +-
 arch/x86/kernel/cpu/intel_cacheinfo.c |    2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 5ce60a8..581fe17 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -422,7 +422,7 @@ void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
 		return;		/* Again, no L2 cache is possible */
 #endif
 
-	c->x86_cache_size = l2size;
+	c->x86_cache_size += l2size;
 
 	printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n",
 			l2size, ecx & 0xFF);
diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c
index 789efe2..43da49e 100644
--- a/arch/x86/kernel/cpu/intel_cacheinfo.c
+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
@@ -503,7 +503,7 @@ unsigned int __cpuinit init_intel_cacheinfo(struct cpuinfo_x86 *c)
 	if (l3)
 		printk(KERN_INFO "CPU: L3 cache: %dK\n", l3);
 
-	c->x86_cache_size = l3 ? l3 : (l2 ? l2 : (l1i+l1d));
+	c->x86_cache_size = l3 + l2 + l1i + l1d + trace;
 
 	return l2;
 }
-- 
1.6.0.6

Re: [PATCH V2] X86: Fix x86_cache_size value

[Valdis.Kletnieks]

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On Fri, 14 Aug 2009 16:03:56 +0530, Jaswinder Singh Rajput said:
> Currently x86_cache_size is showing partial value: L1 or L2 or L3.
> It should add all caches like L1 + L2 + L3 + Trace.

*Why* should it?  Adding the L1 cache probably makes little or no difference
when the L2/L3 caches are usually so much larger (on my laptop, there's a
whole whopping 32K of L1, but 4M of L2 and no L3). It *might* make sense
to report L2+L3.  It would depend on who uses that number, and for what.

But adding the trace cache is just batshit crazy.

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