From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: Paul Mackerras <paulus@samba.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>,
Ingo Molnar <mingo@elte.hu>, LKML <linux-kernel@vger.kernel.org>,
Prasad <prasad@linux.vnet.ibm.com>,
Alan Stern <stern@rowland.harvard.edu>,
Peter Zijlstra <peterz@infradead.org>,
Arnaldo Carvalho de Melo <acme@redhat.com>,
Steven Rostedt <rostedt@goodmis.org>,
Jan Kiszka <jan.kiszka@web.de>, Jiri Slaby <jirislaby@gmail.com>,
Li Zefan <lizf@cn.fujitsu.com>, Avi Kivity <avi@redhat.com>,
Mike Galbraith <efault@gmx.de>,
Masami Hiramatsu <mhiramat@redhat.com>,
Paul Mundt <lethal@linux-sh.org>
Subject: Re: [PATCH 5/6] hw-breakpoints: Arbitrate access to pmu following registers constraints
Date: Mon, 09 Nov 2009 07:56:21 +1100 [thread overview]
Message-ID: <1257713781.13611.284.camel@pasglop> (raw)
In-Reply-To: <19186.45014.502448.698606@cargo.ozlabs.ibm.com>
On Thu, 2009-11-05 at 21:58 +1100, Paul Mackerras wrote:
> Frederic Weisbecker writes:
>
> > Allow or refuse to build a counter using the breakpoints pmu following
> > given constraints.
>
> As far as I can see, you assume each CPU has HBP_NUM breakpoint
> registers which are all interchangeable and can all be used either for
> data breakpoints or instruction breakpoints. Is that accurate?
>
> If so, we'll need to extend it a bit for Power since we have some CPUs
> that have one data breakpoint register and one instruction breakpoint
> register. In general on powerpc the instruction and data breakpoint
> facilities are separate, i.e. we have no registers that can be used
> for either.
Additionally, we have more fancy facilities that I don't see exposed at
all through this interface (we are building an ad-hoc ptrace based
interface today so that gdb can make use of them) and we have one guy
with crazy constraints that we don't know yet how to deal with:
Among others features:
- Pairing of two data or instruction breakpoints to create a ranges
breakpoint
- Data value compare option
- Instruction value compare option
And now the crazy constraints:
- On one embedded core at least we have a case where the core has 4
threads, but the data (4) and instruction (2) breakpoint registers are
shared. The 'enable' bits are split so a given data breakpoint can be
enabled only on some HW threads but that's about it.
I'm not sure if there's a realistic way to handle the later constraint
though other than just not allowing use of the HW breakpoint function on
those cores at all.
Ben.
> > +static void toggle_bp_slot(struct perf_event *bp, bool enable)
> > +{
> > + int cpu = bp->cpu;
> > + unsigned int *nr;
> > + struct task_struct *tsk = bp->ctx->task;
> > +
> > + /* Flexible */
> > + if (!bp->attr.pinned) {
> > + if (cpu >= 0) {
> > + nr = &per_cpu(nr_bp_flexible, cpu);
> > + goto toggle;
> > + }
> > +
> > + for_each_online_cpu(cpu) {
> > + nr = &per_cpu(nr_bp_flexible, cpu);
> > + goto toggle;
>
> ...
>
> > +toggle:
> > + *nr = enable ? *nr + 1 : *nr - 1;
> > +}
>
> This won't do what I think you want. In the case where
> !bp->attr.pinned and cpu == -1, it will only update the count for the
> first online cpu, not all of them.
>
> Paul.
> --
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next prev parent reply other threads:[~2009-11-08 21:00 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-11-03 19:11 [GIT PULL v4] hw-breakpoints: Rewrite on top of perf events v4 Frederic Weisbecker
2009-11-03 19:11 ` [PATCH 1/6] perf/core: Provide a kernel-internal interface to get to performance counters Frederic Weisbecker
2009-11-03 19:11 ` [PATCH 2/6] x86/hw-breakpoints: Actually flush thread breakpoints in flush_thread() Frederic Weisbecker
2009-11-03 19:11 ` [PATCH 3/6] perf/core: Add a callback to perf events Frederic Weisbecker
2009-11-03 19:11 ` [PATCH 4/6] hw-breakpoints: Rewrite the hw-breakpoints layer on top of " Frederic Weisbecker
2009-11-03 19:58 ` Jan Kiszka
2009-11-03 20:15 ` Frederic Weisbecker
2009-11-03 20:22 ` Jan Kiszka
2009-11-03 20:29 ` Frederic Weisbecker
2009-11-03 20:39 ` Jan Kiszka
2009-11-03 20:45 ` Frederic Weisbecker
2009-11-04 23:59 ` Paul Mackerras
2009-11-05 6:00 ` K.Prasad
2009-11-05 11:00 ` Paul Mackerras
2009-11-05 11:09 ` Frederic Weisbecker
2009-11-07 10:03 ` Paul Mackerras
2009-11-07 19:52 ` Frederic Weisbecker
2009-11-05 11:03 ` Paul Mackerras
2009-11-05 11:11 ` Frederic Weisbecker
2009-11-05 15:34 ` K.Prasad
2009-11-05 21:06 ` Frederic Weisbecker
2009-11-08 17:32 ` K.Prasad
2009-11-12 15:42 ` Frederic Weisbecker
2009-11-03 19:11 ` [PATCH 5/6] hw-breakpoints: Arbitrate access to pmu following registers constraints Frederic Weisbecker
2009-11-05 10:58 ` Paul Mackerras
2009-11-05 11:24 ` Frederic Weisbecker
2009-11-08 20:56 ` Benjamin Herrenschmidt [this message]
2009-11-12 15:54 ` Frederic Weisbecker
2009-11-12 20:00 ` Benjamin Herrenschmidt
2009-11-14 13:34 ` Frederic Weisbecker
2009-11-03 19:11 ` [PATCH 6/6] ksym_tracer: Remove KSYM_SELFTEST_ENTRY Frederic Weisbecker
2009-11-05 14:13 ` [GIT PULL v4] hw-breakpoints: Rewrite on top of perf events v4 K.Prasad
2009-11-05 20:30 ` Frederic Weisbecker
-- strict thread matches above, loose matches on Subject: below --
2009-10-26 8:17 [PATCH 4/6] hw-breakpoints: Rewrite the hw-breakpoints layer on top of perf events Jan Kiszka
2009-11-01 21:09 ` [PATCH 5/6] hw-breakpoints: Arbitrate access to pmu following registers constraints Frederic Weisbecker
2009-10-24 14:16 [GIT PULL v2] hw-breakpoints: Rewrite on top of perf events Frederic Weisbecker
2009-10-24 14:16 ` [PATCH 5/6] hw-breakpoints: Arbitrate access to pmu following registers constraints Frederic Weisbecker
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