Re: [tip:perfcounters/core] perf_counter: x86: Fix call-chain support to use NMI-safe methods

H. Peter Anvin
2009-06-15T19:15:27Z

Peter Zijlstra wrote:
> On Mon, 2009-06-15 at 14:59 -0400, Mathieu Desnoyers wrote:
>> * Peter Zijlstra (a.p.zijlstra@chello.nl) wrote:
>>> On Mon, 2009-06-15 at 14:48 -0400, Mathieu Desnoyers wrote:
>>>> we should not care that much about the performance hit of
>>>> saving/restoring the cr2 register at each nmi entry/exit.
>>> But we do, perf counters very much cares about nmi performance.
>>>
>> To a point where it cannot afford a simple register save/restore ?
>>
>> There is "caring" and "_caring_". I am tempted to ask what NMI handler
>> execution frequency you have in mind here to figure out if we are not
>> trying to optimize sub-nanoseconds per minutes. ;)
>
> Ah, well, I have no idea who expensive cr2 is, if its like a regular
> register then it should be fine. If however its tons more expensive then
> we should really avoid it.
>
> As to the freq, 100kHz would be nice ;-)
>

Writing control registers is serializing, so it's a lot more expensive
than writing a normal register; my *guess* is that it will be on the
order of 100-200 cycles.

That is not based on any actual information.

-hpa