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From: Peter Zijlstra <peterz@infradead.org>
To: Stephane Eranian <eranian@google.com>
Cc: mingo@elte.hu, linux-kernel@vger.kernel.org, paulus@samba.org,
	robert.richter@amd.com, fweisbec@gmail.com
Subject: Re: [RFC][PATCH 08/11] perf, x86: Implement simple LBR support
Date: Thu, 04 Mar 2010 19:18:53 +0100	[thread overview]
Message-ID: <1267726733.25158.219.camel@laptop> (raw)
In-Reply-To: <bd4cb8901003040954n5b05e139wa24f8e50789421ac@mail.gmail.com>

On Thu, 2010-03-04 at 09:54 -0800, Stephane Eranian wrote:
> On Thu, Mar 4, 2010 at 12:58 AM, Peter Zijlstra <peterz@infradead.org> wrote:
> > On Wed, 2010-03-03 at 22:57 +0100, Stephane Eranian wrote:
> >> I don't understand how LBR state is migrated when a per-thread event is moved
> >> from one CPU to another. It seems LBR is managed per-cpu.
> >>
> >> Can you explain this to me?
> >
> > It is not, its basically impossible to do given that the TOS doesn't
> > count more bits than is strictly needed.
> >
> I don't get that about the TOS.
> 
> So you are saying that one context switch out, you drop the current
> content of LBR. When you are scheduled back in on an another CPU,
> you grab whatever is there?

What is currently implemented is that we loose history at the point a
new task schedules in an LBR using event.

If we had a wider TOS we could try and stitch partial stacks together
because we could detect overflow.

We could also preserve the LBR because we would be able to know where a
task got scheduled in and not release information of the previous task
while still allowing a cpu-wide user to see everything.

> > Or we should stop supporting cpu and task users at the same time.
> >
> Or you should consider LBR as an event which has a constraint that
> it can only run on one pseudo counter (similar to what you do with
> BTS). Scheduling would take care of the mutual exclusion. Multiplexing
> would provide the work-around.

Yes, that an even more limited case than not sharing it between task and
cpu context, which is basically the strongest you need.

If you do that you can store the LBR stack on unschedule and put it back
on schedule (on whichever cpu that may be).

But since we do not support LBR-config that'll be of very limited use
since there are enough branches between the point where we schedule the
counter to hitting userspace to cycle the LBR several times.




  reply	other threads:[~2010-03-04 18:18 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-03-03 16:39 [RFC][PATCH 00/11] Another stab at PEBS and LBR support Peter Zijlstra
2010-03-03 16:39 ` [RFC][PATCH 01/11] perf, x86: Remove superfluous arguments to x86_perf_event_set_period() Peter Zijlstra
2010-03-03 16:39 ` [RFC][PATCH 02/11] perf, x86: Remove superfluous arguments to x86_perf_event_update() Peter Zijlstra
2010-03-03 16:39 ` [RFC][PATCH 03/11] perf, x86: Change x86_pmu.{enable,disable} calling convention Peter Zijlstra
2010-03-03 16:39 ` [RFC][PATCH 04/11] perf, x86: Use unlocked bitops Peter Zijlstra
2010-03-03 16:39 ` [RFC][PATCH 05/11] perf: Generic perf_sample_data initialization Peter Zijlstra
2010-03-03 16:49   ` David Miller
2010-03-03 21:14   ` Frederic Weisbecker
2010-03-05  8:44   ` Jean Pihet
2010-03-03 16:39 ` [RFC][PATCH 06/11] perf, x86: PEBS infrastructure Peter Zijlstra
2010-03-03 17:38   ` Robert Richter
2010-03-03 17:42     ` Peter Zijlstra
2010-03-04  8:50       ` Robert Richter
2010-03-03 16:39 ` [RFC][PATCH 07/11] perf: Provide PERF_SAMPLE_REGS Peter Zijlstra
2010-03-03 17:30   ` Stephane Eranian
2010-03-03 17:39     ` Peter Zijlstra
2010-03-03 17:49       ` Stephane Eranian
2010-03-03 17:55         ` David Miller
2010-03-03 18:18           ` Stephane Eranian
2010-03-03 19:18           ` Peter Zijlstra
2010-03-04  2:59           ` Ingo Molnar
2010-03-04 12:58             ` Arnaldo Carvalho de Melo
2010-03-03 22:02   ` Frederic Weisbecker
2010-03-04  8:58     ` Peter Zijlstra
2010-03-04 11:04       ` Ingo Molnar
2010-03-03 16:39 ` [RFC][PATCH 08/11] perf, x86: Implement simple LBR support Peter Zijlstra
2010-03-03 21:52   ` Stephane Eranian
2010-03-04  8:58     ` Peter Zijlstra
2010-03-03 21:57   ` Stephane Eranian
2010-03-04  8:58     ` Peter Zijlstra
2010-03-04 17:54       ` Stephane Eranian
2010-03-04 18:18         ` Peter Zijlstra [this message]
2010-03-04 20:23           ` Peter Zijlstra
2010-03-04 20:57             ` Stephane Eranian
2010-03-03 16:39 ` [RFC][PATCH 09/11] perf, x86: Implement PERF_SAMPLE_BRANCH_STACK Peter Zijlstra
2010-03-03 21:08   ` Frederic Weisbecker
2010-03-03 16:39 ` [RFC][PATCH 10/11] perf, x86: use LBR for PEBS IP+1 fixup Peter Zijlstra
2010-03-03 18:05   ` Masami Hiramatsu
2010-03-03 19:37     ` Peter Zijlstra
2010-03-03 21:11       ` Masami Hiramatsu
2010-03-03 21:50         ` Stephane Eranian
2010-03-04  8:57           ` Peter Zijlstra
2010-03-09  1:41             ` Stephane Eranian
2010-03-03 16:39 ` [RFC][PATCH 11/11] perf, x86: Clean up IA32_PERF_CAPABILITIES usage Peter Zijlstra

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