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Subject: Re: [PATCH 3/5] perf, x86: Disable PEBS on clowertown chips
From: Peter Zijlstra <peterz@infradead.org>
To: Stephane Eranian <eranian@google.com>
Cc: mingo@elte.hu, linux-kernel@vger.kernel.org, paulus@samba.org,
       robert.richter@amd.com, fweisbec@gmail.com,
       Arnaldo Carvalho de Melo <acme@infradead.org>
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Date: Fri, 05 Mar 2010 20:15:53 +0100
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On Fri, 2010-03-05 at 10:58 -0800, Stephane Eranian wrote:
> >        case 15: /* original 65 nm celeron/pentium/core2/xeon, "Merom"/"Conroe" */
> > +               x86_pmu.quirks = intel_clowertown_quirks;
> 
> That's too coarse grain!
> It is more subtle than this. Some of the errata are marked as Plan
> fix. They seem to be
> fixed in later models. Your looking at the E5xxx series errata but the
> E7xxx do not have
> the same problems. 

OK, I'll look at those errata again and try to come up with a stepping
test for this errata.