From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757770Ab0EKJth (ORCPT ); Tue, 11 May 2010 05:49:37 -0400 Received: from bombadil.infradead.org ([18.85.46.34]:52038 "EHLO bombadil.infradead.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751517Ab0EKJte convert rfc822-to-8bit (ORCPT ); Tue, 11 May 2010 05:49:34 -0400 Subject: Re: [RFC][PATCH 3/9] perf: export registerred pmus via sysfs From: Peter Zijlstra To: Lin Ming Cc: Ingo Molnar , Corey Ashford , Frederic Weisbecker , "eranian@gmail.com" , "Gary.Mohr@Bull.com" , "arjan@linux.intel.com" , "Zhang, Yanmin" , Paul Mackerras , "David S. Miller" , Russell King , Paul Mundt , lkml , Arnaldo Carvalho de Melo , Will Deacon , Maynard Johnson , Carl Love , "greg@kroah.com" , Kay Sievers In-Reply-To: <1273570845.30322.59.camel@minggr.sh.intel.com> References: <1273484401.5605.3333.camel@twins> <1273486313.15998.76.camel@minggr.sh.intel.com> <1273486708.5605.3342.camel@twins> <1273487195.15998.85.camel@minggr.sh.intel.com> <1273490824.5605.3379.camel@twins> <20100510114311.GA6449@elte.hu> <1273492164.5605.3397.camel@twins> <20100510115344.GA11238@elte.hu> <4BE8931C.9070106@linux.vnet.ibm.com> <1273560419.5605.3426.camel@twins> <20100511072127.GB10421@elte.hu> <1273566031.30322.31.camel@minggr.sh.intel.com> <1273567815.5605.3491.camel@twins> <1273568620.30322.42.camel@minggr.sh.intel.com> <1273569154.5605.3499.camel@twins> <1273570845.30322.59.camel@minggr.sh.intel.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8BIT Date: Tue, 11 May 2010 11:48:42 +0200 Message-ID: <1273571322.5605.3523.camel@twins> Mime-Version: 1.0 X-Mailer: Evolution 2.28.3 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 2010-05-11 at 17:40 +0800, Lin Ming wrote: > /sys/devices/system/cpu/cpu0/cpu_hw_events/* > /sys/devices/system/cpu/cpu0/cpu_hw_cache_events/* > /sys/devices/system/cpu/cpu0/cpu_raw_events/* > .... > .... > /sys/devices/system/cpu/cpuN/cpu_hw_events/* > /sys/devices/system/cpu/cpuN/cpu_hw_cache_events/* > /sys/devices/system/cpu/cpuN/cpu_raw_events/* > > Is /sys/class/event_sources/* looks like, > > /sys/class/event_sources/cpu_hw_events0 > -> /sys/devices/system/cpu/cpu0/cpu_hw_events > ... > /sys/class/event_sources/cpu_hw_eventsN > -> /sys/devices/system/cpu/cpuN/cpu_hw_events > > /sys/class/event_sources/cpu_hw_cache_events0 > -> /sys/devices/system/cpu/cpu0/cpu_hw_events > ... > /sys/class/event_sources/cpu_hw_cache_eventsN > -> /sys/devices/system/cpu/cpuN/cpu_hw_events Hmm, good question. No all the cpus would have the same event sources. I'm not sure if we can make sysfs understand that though (added GregKH and Kay to CC). Possibly we'd have to place them at the cpu level, like: /sys/devices/system/cpu/cpu_*_events/ and have links like: /sys/devices/system/cpu/cpuN/cpu_*_events -> /sys/devices/system/cpu/cpu_*_events/ as well as /sys/class/event_sources/cpu_*_events -> /sys/devices/system/cpu/cpu_*_events/