Re: [PATCH 4/5] x86, NMI: Allow NMI reason io port (0x61) to be processed on any CPU

Don Zickus
2010-10-21T02:38:08Z

On Thu, Oct 21, 2010 at 09:25:09AM +0800, Huang Ying wrote:
> On Thu, 2010-10-21 at 09:18 +0800, Don Zickus wrote:
> > On Thu, Oct 21, 2010 at 08:40:07AM +0800, Huang Ying wrote:
> > > On Wed, 2010-10-20 at 22:27 +0800, Don Zickus wrote:
> > > > I thought the point of this patch was to remove that restriction in the
> > > > nmi handler, which would allow future patches to re-route these NMIs to
> > > > another cpu, thus finally allowing people to hot-remove the bsp cpu, no?
> > >
> > > Yes. We just want to make it possible to hot-remove the bsp cpu. Because
> > > IOAPIC is configurable, I think it is possible to configure IOAPIC to
> > > send PCI SERR NMI to one CPU while IOCK NMI to another CPU. Why not
> > > support this situation too? It does not harm anything but performance to
> >
> > Why would we want to? It seems simpler to have one cpu dedicated to
> > handling the external NMIs.
>
> If we can guarantee that these NMIs will be only sent to one CPU, I am
> fine with trylock.

I guess I assumed the BIOS would only use the bsp CPU for the NMI, which
would be passed on to the kernel. Otherwise what happens if an NMI
happens while the kernel is still bringing up the first cpu and it is
routed to another CPU or if we boot with MAX_CPUS=1?

Then again people keep saying BIOS writers are crazy, so my assumption
could be completely wrong. ;-p

Cheers,
Don