From: Peter Zijlstra <a.p.zijlstra@chello.nl>
To: Andi Kleen <andi@firstfloor.org>
Cc: eranian@google.com, linux-kernel@vger.kernel.org,
cjashfor@linux.vnet.ibm.com, mingo@elte.hu, fweisbec@gmail.com,
Andi Kleen <ak@linux.intel.com>
Subject: Re: [PATCH 1/2] perf-events: Add support for supplementary event registers v2
Date: Fri, 12 Nov 2010 18:23:50 +0100 [thread overview]
Message-ID: <1289582630.2084.331.camel@laptop> (raw)
In-Reply-To: <1289580941-29744-1-git-send-email-andi@firstfloor.org>
On Fri, 2010-11-12 at 17:55 +0100, Andi Kleen wrote:
> static struct event_constraint *
> +intel_percore_constraints(struct cpu_hw_events *cpuc, struct perf_event *event)
> +{
> + struct hw_perf_event *hwc = &event->hw;
> + unsigned int e = hwc->config & ARCH_PERFMON_EVENTSEL_EVENT;
> + struct event_constraint *c;
> + struct intel_percore *pc;
> +
> + if (!x86_pmu.percore_constraints)
> + return NULL;
> +
> + for (c = x86_pmu.percore_constraints; c->cmask; c++) {
> + if (e != c->code)
> + continue;
> +
> + c = NULL;
> +
> + /*
> + * Allocate resource per core.
> + * Currently only one such per core resource can be allocated.
> + */
> + pc = cpuc->per_core;
> + if (!pc)
> + break;
> + raw_spin_lock(&pc->lock);
> + if (pc->ref > 0) {
> + /* Allow identical settings */
> + if (hwc->config == pc->config &&
> + hwc->extra_reg == pc->extra_reg &&
> + hwc->extra_config == pc->extra_config) {
Hrmm,. this doesn't really scale right wrt multiple extra_regs.
You made the extra_regs thing fairly extensible, but the above doesn't
really work well if there's multiple extra regs (say OFFCORE and
LBR_CONFIG -- possibly even the two OFFCORE regs present on westmere).
It basically needs a per-core state for each extra_reg possible.
> + pc->ref++;
> + cpuc->percore_used = 1;
> + } else {
> + /* Deny due to conflict */
> + c = &emptyconstraint;
> + }
> + } else {
> + pc->config = hwc->config;
> + pc->extra_reg = hwc->extra_reg;
> + pc->extra_config = hwc->extra_config;
> + pc->ref = 1;
> + cpuc->percore_used = 1;
> + }
> + raw_spin_unlock(&pc->lock);
> + return c;
> + }
> +
> + return NULL;
> +}
next prev parent reply other threads:[~2010-11-12 17:23 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-11-12 16:55 [PATCH 1/2] perf-events: Add support for supplementary event registers v2 Andi Kleen
2010-11-12 16:55 ` [PATCH 2/2] perf-events: Fix LLC-* events on Intel Nehalem/Westmere v2 Andi Kleen
2010-11-12 17:17 ` [PATCH 1/2] perf-events: Add support for supplementary event registers v2 Peter Zijlstra
2010-11-12 17:17 ` Stephane Eranian
2010-11-12 17:33 ` Peter Zijlstra
2010-11-12 21:26 ` Stephane Eranian
2010-11-13 10:17 ` Andi Kleen
2010-11-13 10:34 ` Peter Zijlstra
2010-11-15 11:03 ` Stephane Eranian
2010-11-15 11:06 ` Andi Kleen
2010-11-15 11:00 ` Stephane Eranian
2010-11-12 17:23 ` Peter Zijlstra [this message]
2010-11-13 10:13 ` Andi Kleen
2010-11-13 10:32 ` Peter Zijlstra
2010-11-15 11:01 ` Stephane Eranian
2010-11-15 11:06 ` Peter Zijlstra
2010-11-15 11:17 ` Andi Kleen
2010-11-15 11:18 ` Stephane Eranian
2010-11-15 11:31 ` Andi Kleen
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