From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Cc: linux-kernel@vger.kernel.org, sodaville@linutronix.de,
x86@kernel.org, devicetree-discuss@lists.ozlabs.org
Subject: Re: [PATCH 07/11] x86/dtb: add support for PCI devices backed by dtb nodes
Date: Sun, 28 Nov 2010 09:33:51 +1100 [thread overview]
Message-ID: <1290897231.32570.168.camel@pasglop> (raw)
In-Reply-To: <1290706801-7323-8-git-send-email-bigeasy@linutronix.de>
On Thu, 2010-11-25 at 18:39 +0100, Sebastian Andrzej Siewior wrote:
> x86_of_pci_init() does two things:
> - it provides a generic irq enable and disable function. enable queries
> the device tree for the interrupt information, calls ->xlate on the
> irq host and updates the pci->irq information for the device.
>
> - it walks through PCI buss(es) in the device tree and adds its children
> (devices) nodes to appropriate pci_dev nodes in kernel. So the dtb
> node information is available at probe time of the PCI device.
>
> Adding a PCI bus based on the information in the device tree is
> currently not supported. Right now direct access via ioports is used.
That's something we need to eventually put into common code, ie matching
device nodes to PCI devices... In the meantime, your approach will do,
some nits:
> +static int of_irq_map_pci(struct pci_dev *dev, struct of_irq *oirq)
> +{
> + struct device_node *node;
> + __be32 laddr[3];
> + __be32 lspec[2];
> + int ret;
> + u8 pin;
> +
> + node = dev->dev.of_node;
> + if (!node) {
> + node = dev->bus->dev.of_node;
> + if (node) {
> + ret = of_irq_map_one(node, 0, oirq);
> + if (!ret)
> + return ret;
> + }
> + }
I don't quite get the logic in getting to the bus' interrupts if you
can't find a device own nodes here...
> + ret = pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
> + if (ret)
> + return ret;
> + if (!pin)
> + return -EINVAL;
> +
> + laddr[0] = cpu_to_be32((dev->bus->number << 16) | (dev->devfn << 8));
> + laddr[1] = 0;
> + laddr[2] = 0;
> +
> + lspec[0] = cpu_to_be32(pin);
> + lspec[1] = cpu_to_be32(0);
> + ret = of_irq_map_raw(node, lspec, 1, laddr, oirq);
> + if (ret)
> + return ret;
> + return 0;
> +}
Ok so I see what you are trying to do, but I think it's not completely
correct, besides you miss the swizzling when crossing P2P bridges and
similar.
I suppose you looked at powerpc's of_irq_map_pci() so I'm not sure why
you modified it the way you did :-) You should probably either move it
to a generic place or copy it for now with a comment indicating where it
comes from so we spot it when we put it into a common code.
> +static int x86_of_pci_irq_enable(struct pci_dev *dev)
> +{
> + struct of_irq oirq;
> + u32 virq;
> + int ret;
> + u8 pin;
> +
> + ret = pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
> + if (ret)
> + return ret;
> + if (!pin)
> + return 0;
> +
> + ret = of_irq_map_pci(dev, &oirq);
> + if (ret)
> + return ret;
> +
> + virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
> + oirq.size);
> + if (virq == NO_IRQ)
> + return -EINVAL;
> + dev->irq = virq;
> + return 0;
> +}
> +
> +static void x86_of_pci_irq_disable(struct pci_dev *dev)
> +{
> +}
> +
> +void __cpuinit x86_of_pci_init(void)
> +{
> + struct device_node *np;
> +
> + pcibios_enable_irq = x86_of_pci_irq_enable;
> + pcibios_disable_irq = x86_of_pci_irq_disable;
> +
> + for_each_node_by_type(np, "pci") {
> + const void *prop;
> + struct pci_bus *bus;
> + unsigned int bus_min;
> + struct device_node *child;
> +
> + prop = of_get_property(np, "bus-range", NULL);
> + if (!prop)
> + continue;
> + bus_min = be32_to_cpup(prop);
> +
> + bus = pci_find_bus(0, bus_min);
> + if (!bus) {
> + printk(KERN_ERR "Can't find a node for bus %s.\n",
> + np->full_name);
> + continue;
> + }
> +
> + bus->dev.of_node = np;
> + for_each_child_of_node(np, child) {
> + struct pci_dev *dev;
> + u32 devfn;
> +
> + prop = of_get_property(child, "reg", NULL);
> + if (!prop)
> + continue;
> +
> + devfn = (be32_to_cpup(prop) >> 8) & 0xff;
> + dev = pci_get_slot(bus, devfn);
> + if (!dev)
> + continue;
> + dev->dev.of_node = child;
> + }
> + }
> +}
That too won't go down bridges, atom never have any ? (no PCIe root
complex at all ? ever will be ? even then, it should be supported as got
knows what we'll handle in the future).
Eventually we want that matching between PCI devices and OF nodes to be
in generic code, so that's not a big deal to have an "inferior" version
temporarily in there I suppose.
Also, aren't you missing a pci_dev_put() after pci_get_slot() ?
> static int __init early_scan_hpet(unsigned long node, const char *uname,
> int depth, void *data)
> {
Cheers,
Ben.
next prev parent reply other threads:[~2010-11-27 22:34 UTC|newest]
Thread overview: 72+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-11-25 17:39 Add device tree support for x86 Sebastian Andrzej Siewior
2010-11-25 17:39 ` [PATCH 01/11] x86/kernel: remove conditional early remap in parse_e820_ext Sebastian Andrzej Siewior
2010-12-08 8:38 ` [sodaville] " Sebastian Andrzej Siewior
2010-12-08 14:15 ` Thomas Gleixner
2010-12-15 23:28 ` H. Peter Anvin
2010-12-16 9:55 ` Sebastian Andrzej Siewior
2010-11-25 17:39 ` [PATCH 02/11] x86: Add device tree support Sebastian Andrzej Siewior
2010-11-25 22:53 ` Sam Ravnborg
2010-11-26 9:06 ` Sebastian Andrzej Siewior
2010-11-26 21:42 ` Benjamin Herrenschmidt
2010-11-28 13:49 ` Sebastian Andrzej Siewior
2010-11-28 22:28 ` Benjamin Herrenschmidt
2010-12-30 8:26 ` Grant Likely
2010-12-30 8:45 ` Rob Landley
2010-12-30 20:58 ` Grant Likely
2011-01-03 16:05 ` [sodaville] " H. Peter Anvin
2011-01-03 16:19 ` H. Peter Anvin
2011-01-03 17:52 ` Grant Likely
2011-01-03 18:06 ` H. Peter Anvin
2011-01-03 18:10 ` H. Peter Anvin
2010-12-30 20:57 ` Grant Likely
2010-12-31 0:51 ` [sodaville] " H. Peter Anvin
2010-11-25 17:39 ` [PATCH 03/11] x86/dtb: Add a device tree for CE4100 Sebastian Andrzej Siewior
2010-11-26 21:57 ` Benjamin Herrenschmidt
2010-11-28 16:04 ` Sebastian Andrzej Siewior
2010-11-28 22:53 ` Benjamin Herrenschmidt
2010-11-29 1:34 ` Mitch Bradley
2010-11-29 18:26 ` [sodaville] " H. Peter Anvin
2010-11-29 20:03 ` Benjamin Herrenschmidt
2010-11-29 19:44 ` Sebastian Andrzej Siewior
2010-12-02 0:40 ` David Gibson
2010-11-29 19:07 ` Scott Wood
2010-11-29 20:05 ` Benjamin Herrenschmidt
2010-11-29 20:32 ` Mitch Bradley
2010-11-29 20:44 ` Benjamin Herrenschmidt
2010-11-29 21:32 ` Mitch Bradley
2010-11-29 23:47 ` Alan Cox
2010-11-30 2:50 ` Benjamin Herrenschmidt
2010-11-30 11:20 ` Sebastian Andrzej Siewior
2010-11-29 23:42 ` Alan Cox
2010-11-30 21:18 ` [sodaville] " H. Peter Anvin
2010-11-30 11:51 ` Sebastian Andrzej Siewior
2010-11-30 20:31 ` Benjamin Herrenschmidt
2010-11-29 23:58 ` David Gibson
2010-11-29 19:36 ` [sodaville] " Sebastian Andrzej Siewior
2010-11-29 20:14 ` Benjamin Herrenschmidt
2010-11-29 2:22 ` David Gibson
2010-11-25 17:39 ` [PATCH 04/11] x86/dtb: add irq host abstraction Sebastian Andrzej Siewior
2010-11-25 19:30 ` Jon Loeliger
2010-11-26 14:19 ` Sebastian Andrzej Siewior
2010-11-26 21:36 ` Benjamin Herrenschmidt
2010-12-01 10:31 ` [sodaville] " Sebastian Andrzej Siewior
2010-11-27 3:11 ` Jon Loeliger
2010-11-25 17:39 ` [PATCH 05/11] x86/dtb: add early parsing of APIC and IO APIC Sebastian Andrzej Siewior
2010-11-25 17:39 ` [PATCH 06/11] x86/dtb: add support hpet Sebastian Andrzej Siewior
2010-11-25 17:39 ` [PATCH 07/11] x86/dtb: add support for PCI devices backed by dtb nodes Sebastian Andrzej Siewior
2010-11-27 22:33 ` Benjamin Herrenschmidt [this message]
2010-11-28 14:04 ` Sebastian Andrzej Siewior
2010-11-28 22:32 ` Benjamin Herrenschmidt
2010-12-02 16:17 ` Sebastian Andrzej Siewior
2010-11-25 17:39 ` [PATCH 08/11] x86/dtb: Add generic bus probe Sebastian Andrzej Siewior
2010-11-25 17:39 ` [PATCH 09/11] x86/ioapic: Add OF bindings for IO-APIC Sebastian Andrzej Siewior
2010-11-25 17:40 ` [PATCH 10/11] x86/io_apic: add simply id set Sebastian Andrzej Siewior
2010-11-25 21:04 ` Yinghai Lu
2010-11-26 11:03 ` Sebastian Andrzej Siewior
2010-11-26 16:50 ` [PATCH] x86/io_apic: split setup_ioapic_ids_from_mpc() into a non-checkign version Sebastian Andrzej Siewior
2010-12-06 13:33 ` [tip:x86/apic] x86: io_apic: Split setup_ioapic_ids_from_mpc() tip-bot for Sebastian Andrzej Siewior
2010-12-07 8:59 ` [PATCH -v2] x86, ioapic: Don't write io_apic ID if it is not changed Yinghai Lu
2010-12-09 20:56 ` [tip:x86/apic-cleanups] x86, ioapic: Avoid writing io_apic id if already correct tip-bot for Yinghai Lu
2010-11-25 17:40 ` [PATCH 11/11] x86/ce4100: use OF for ioapic Sebastian Andrzej Siewior
-- strict thread matches above, loose matches on Subject: below --
2011-02-22 20:07 Device tree on x86, part v4 Sebastian Andrzej Siewior
2011-02-22 20:07 ` [PATCH 07/11] x86/dtb: add support for PCI devices backed by dtb nodes Sebastian Andrzej Siewior
2011-02-22 21:08 ` Grant Likely
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1290897231.32570.168.camel@pasglop \
--to=benh@kernel.crashing.org \
--cc=bigeasy@linutronix.de \
--cc=devicetree-discuss@lists.ozlabs.org \
--cc=linux-kernel@vger.kernel.org \
--cc=sodaville@linutronix.de \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox