Re: [RFC PATCH 2/3 v3] perf: Implement Nehalem uncore pmu

Peter Zijlstra
2010-12-09T20:19:26Z

On Thu, 2010-12-09 at 21:15 +0100, Stephane Eranian wrote:
> On Thu, Dec 9, 2010 at 8:21 PM, Peter Zijlstra <a.p.zijlstra@chello.nl> wrote:
> > On Thu, 2010-12-02 at 13:20 +0800, Lin Ming wrote:
> >> + /* Check CPUID signatures: 06_1AH, 06_1EH, 06_1FH */
> >> + family = boot_cpu_data.x86;
> >> + model = boot_cpu_data.x86_model;
> >> + if (family != 6 || (model != 0x1A && model != 0x1E && model != 0x1F))
> >> + return;
> >
> > So that's 26, 30 and 31? Curiously
> > arch/x86/kernel/cpu/perf_event_intel.c does have 31.

That was clearly meant to say: doesn't.. Does Intel have an exhaustive
model list somewhere?

> It is also missing model 44 (0x2c).

Right.. but if the westmere uncore is the same, then its also missing
37.

The -EX chips have a different uncore, right?