From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755479Ab1ATLb7 (ORCPT ); Thu, 20 Jan 2011 06:31:59 -0500 Received: from mail-iw0-f174.google.com ([209.85.214.174]:52036 "EHLO mail-iw0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755056Ab1ATLby (ORCPT ); Thu, 20 Jan 2011 06:31:54 -0500 DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; b=ixx+qJuBl++gBmEOXbDX5as/slWToFBEH1Eh4WJwKHIxMcVHmxkw/rAvPtqpiPkA74 4e+o1UqnRsM/xX1c2O8pqaBWQzA6RskRHCTd3uZ2xz+gvsa+eSYcgZ5TZmd7fFuw7Rvc u1APB1JVtDN33lFHIksP3wqQXJdZv7bWtauwc= From: Akinobu Mita To: linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, arnd@arndb.de Cc: Akinobu Mita , Mikael Starvik , Jesper Nilsson , linux-cris-kernel@axis.com Subject: [PATCH] cris: use asm-generic/cacheflush.h Date: Thu, 20 Jan 2011 20:32:16 +0900 Message-Id: <1295523136-4277-4-git-send-email-akinobu.mita@gmail.com> X-Mailer: git-send-email 1.7.3.4 In-Reply-To: <1295523136-4277-1-git-send-email-akinobu.mita@gmail.com> References: <1295523136-4277-1-git-send-email-akinobu.mita@gmail.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The implementation of the cache flushing interfaces on the cris is identical with the default implementation in asm-generic. Signed-off-by: Akinobu Mita Cc: Mikael Starvik Cc: Jesper Nilsson Cc: linux-cris-kernel@axis.com --- arch/cris/include/asm/cacheflush.h | 23 +---------------------- 1 files changed, 1 insertions(+), 22 deletions(-) diff --git a/arch/cris/include/asm/cacheflush.h b/arch/cris/include/asm/cacheflush.h index 36795bc..fa698e7 100644 --- a/arch/cris/include/asm/cacheflush.h +++ b/arch/cris/include/asm/cacheflush.h @@ -1,31 +1,10 @@ #ifndef _CRIS_CACHEFLUSH_H #define _CRIS_CACHEFLUSH_H -/* Keep includes the same across arches. */ -#include - /* The cache doesn't need to be flushed when TLB entries change because * the cache is mapped to physical memory, not virtual memory */ -#define flush_cache_all() do { } while (0) -#define flush_cache_mm(mm) do { } while (0) -#define flush_cache_dup_mm(mm) do { } while (0) -#define flush_cache_range(vma, start, end) do { } while (0) -#define flush_cache_page(vma, vmaddr, pfn) do { } while (0) -#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0 -#define flush_dcache_page(page) do { } while (0) -#define flush_dcache_mmap_lock(mapping) do { } while (0) -#define flush_dcache_mmap_unlock(mapping) do { } while (0) -#define flush_icache_range(start, end) do { } while (0) -#define flush_icache_page(vma,pg) do { } while (0) -#define flush_icache_user_range(vma,pg,adr,len) do { } while (0) -#define flush_cache_vmap(start, end) do { } while (0) -#define flush_cache_vunmap(start, end) do { } while (0) - -#define copy_to_user_page(vma, page, vaddr, dst, src, len) \ - memcpy(dst, src, len) -#define copy_from_user_page(vma, page, vaddr, dst, src, len) \ - memcpy(dst, src, len) +#include int change_page_attr(struct page *page, int numpages, pgprot_t prot); -- 1.7.3.4