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Subject: Re: [PATCH v2 -tip] perf: x86, add SandyBridge support
From: Lin Ming <ming.m.lin@intel.com>
To: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Ingo Molnar <mingo@elte.hu>, Stephane Eranian <eranian@google.com>,
        Andi Kleen <andi@firstfloor.org>, lkml <linux-kernel@vger.kernel.org>
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Date: Mon, 28 Feb 2011 22:45:25 +0800
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On Mon, 2011-02-28 at 22:24 +0800, Peter Zijlstra wrote:
> On Mon, 2011-02-28 at 22:21 +0800, Lin Ming wrote:
> > > >  #define INTEL_EVENT_CONSTRAINT(c, n)       \
> > > >     EVENT_CONSTRAINT(c, n, ARCH_PERFMON_EVENTSEL_EVENT)
> > > > +#define INTEL_EVENT_CONSTRAINT2(c, n)      \
> > > > +   EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK)
> > > 
> > > That's a particularly bad name, how about something like
> > > 
> > > INTEL_UEVENT_CONSTRAINT or somesuch.
> > 
> > OK.
> > 
> > But any case it's duplicated with PEBS_EVENT_CONSTRAINT.
> > 
> > #define PEBS_EVENT_CONSTRAINT(c, n)     \
> >         EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK) 
> 
> Ah, indeed, so maybe we can remove PEBS_EVENT_CONSTRAINT and use regular
> INTEL_*_CONSTRAINTS there, that could also help for PEBS events where
> all umasks are allowed (not sure there are any such things but the SNB
> PEBS list was quite large).

Yes, there are, for example, BR_INST_RETIRED.*