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Subject: Re: [PATCH v2 -tip] perf: x86, add SandyBridge support
From: Lin Ming <ming.m.lin@intel.com>
To: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Ingo Molnar <mingo@elte.hu>, Stephane Eranian <eranian@google.com>,
        Andi Kleen <andi@firstfloor.org>, lkml <linux-kernel@vger.kernel.org>
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Date: Tue, 01 Mar 2011 08:32:23 +0800
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On Mon, 2011-02-28 at 23:11 +0800, Peter Zijlstra wrote:
> On Mon, 2011-02-28 at 22:56 +0800, Lin Ming wrote:
> > @@ -740,13 +740,6 @@ static void intel_ds_init(void)
> >                         printk(KERN_CONT "PEBS fmt1%c, ", pebs_type);
> >                         x86_pmu.pebs_record_size = sizeof(struct pebs_record_nhm);
> >                         x86_pmu.drain_pebs = intel_pmu_drain_pebs_nhm;
> > -                       switch (boot_cpu_data.x86_model) {
> > -                       case 42: /* SandyBridge */
> > -                               x86_pmu.pebs_constraints = intel_snb_pebs_events;
> > -                               break;
> > -                       default:
> > -                               x86_pmu.pebs_constraints = intel_nehalem_pebs_events;
> > -                       }
> >                         break; 
> 
> it looks like you lost the nhm table assignment

Ah, yes. Will update all in v3 patch.