From: Borislav Petkov <bp@amd64.org>
To: Ingo Molnar <mingo@elte.hu>, "H. Peter Anvin" <hpa@zytor.com>
Cc: Greg Kroah-Hartman <greg@kroah.com>,
Randy Dunlap <rdunlap@xenotime.net>,
Frank Arnold <farnold@amd64.org>, X86-ML <x86@kernel.org>,
LKML <linux-kernel@vger.kernel.org>,
Borislav Petkov <borislav.petkov@amd.com>,
Hagen Paul Pfeifer <hagen@jauu.net>
Subject: [PATCH 1/3] x86, AMD, cacheinfo: Fix fallout caused by max3 conversion
Date: Mon, 16 May 2011 15:39:46 +0200 [thread overview]
Message-ID: <1305553188-21061-2-git-send-email-bp@amd64.org> (raw)
In-Reply-To: <1305553188-21061-1-git-send-email-bp@amd64.org>
From: Borislav Petkov <borislav.petkov@amd.com>
732eacc0542d0aa48797f675888b85d6065af837 converted code around the
kernel using nested max() macros to use the new max3 macro but forgot to
remove the old line in intel_cacheinfo.c. Fix it.
Cc: Hagen Paul Pfeifer <hagen@jauu.net>
Cc: Frank Arnold <farnold@amd64.org>
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
---
arch/x86/kernel/cpu/intel_cacheinfo.c | 1 -
1 files changed, 0 insertions(+), 1 deletions(-)
diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c
index 1ce1af2..31590a0 100644
--- a/arch/x86/kernel/cpu/intel_cacheinfo.c
+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
@@ -327,7 +327,6 @@ static void __cpuinit amd_calc_l3_indices(struct amd_l3_cache *l3)
l3->subcaches[2] = sc2 = !(val & BIT(8)) + !(val & BIT(9));
l3->subcaches[3] = sc3 = !(val & BIT(12)) + !(val & BIT(13));
- l3->indices = (max(max(max(sc0, sc1), sc2), sc3) << 10) - 1;
l3->indices = (max(max3(sc0, sc1, sc2), sc3) << 10) - 1;
}
--
1.7.4.rc2
next prev parent reply other threads:[~2011-05-16 13:40 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-05-16 13:39 [PATCH 0/3] x86, AMD, cacheinfo: L3 CID fixes Borislav Petkov
2011-05-16 13:39 ` Borislav Petkov [this message]
2011-05-16 17:31 ` [PATCH 1/3] x86, AMD, cacheinfo: Fix fallout caused by max3 conversion Greg KH
2011-05-16 17:38 ` Borislav Petkov
2011-05-16 17:42 ` H. Peter Anvin
2011-05-16 17:47 ` Borislav Petkov
2011-05-16 18:00 ` H. Peter Anvin
2011-05-16 18:19 ` Borislav Petkov
2011-05-16 18:45 ` Hagen Paul Pfeifer
2011-05-16 21:22 ` [tip:x86/cpu] " tip-bot for Borislav Petkov
2011-05-16 13:39 ` [PATCH 2/3] x86, AMD, cacheinfo: Fix L3 cache index disable checks Borislav Petkov
2011-05-16 21:22 ` [tip:x86/cpu] " tip-bot for Frank Arnold
2011-05-16 13:39 ` [PATCH 3/3] Documentation, ABI: Update L3 cache index disable text Borislav Petkov
2011-05-16 17:30 ` Greg KH
2011-05-16 21:22 ` [tip:x86/cpu] " tip-bot for Borislav Petkov
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