From: Peter Zijlstra <a.p.zijlstra@chello.nl>
To: Stephane Eranian <eranian@google.com>
Cc: Lin Ming <ming.m.lin@intel.com>, Ingo Molnar <mingo@elte.hu>,
Andi Kleen <andi@firstfloor.org>,
Arnaldo Carvalho de Melo <acme@ghostprotocols.net>,
linux-kernel <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 0/4] perf: Intel uncore pmu counting support
Date: Thu, 30 Jun 2011 16:10:54 +0200 [thread overview]
Message-ID: <1309443054.12449.56.camel@twins> (raw)
In-Reply-To: <CABPqkBRs1nd7KptkVCg5QeG0AJJck=VHAgCpSOJKpOgdDuN-6A@mail.gmail.com>
On Thu, 2011-06-30 at 14:10 +0200, Stephane Eranian wrote:
> > This series are cut to support uncore pmu counting only.
> > So uncore interrupt handling is not needed.
> >
> You're making the assumption that when counting, you can never construct
> a measurement that will cause a counter to overflow the 39 bits. If not, then
> you need interrupt handling even when counting.
>
Also, I'm missing the stuff that maps everything to one active cpu in
the uncore mask. IIRC your previous postings had stuff like that.
next prev parent reply other threads:[~2011-06-30 14:12 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-06-30 8:09 [PATCH 0/4] perf: Intel uncore pmu counting support Lin Ming
2011-06-30 8:09 ` [PATCH 1/4] perf, x86: Add Intel Nehalem/Westmere uncore pmu Lin Ming
2011-06-30 14:08 ` Peter Zijlstra
2011-07-01 6:05 ` Lin Ming
2011-06-30 16:58 ` Andi Kleen
2011-07-04 6:39 ` Lin Ming
2011-07-04 8:38 ` Peter Zijlstra
2011-07-04 21:57 ` Andi Kleen
2011-07-05 11:22 ` Peter Zijlstra
2011-07-05 12:48 ` Lin Ming
2011-07-05 12:56 ` Peter Zijlstra
2011-07-05 13:13 ` Lin Ming
2011-07-05 16:01 ` Andi Kleen
2011-07-06 9:35 ` Ingo Molnar
2011-06-30 8:09 ` [PATCH 2/4] perf, x86: Add Intel SandyBridge " Lin Ming
2011-06-30 22:09 ` Peter Zijlstra
2011-06-30 8:09 ` [PATCH 3/4] perf: Remove perf_event_attr::type check Lin Ming
2011-07-21 19:31 ` [tip:perf/core] " tip-bot for Lin Ming
2011-06-30 8:09 ` [PATCH 4/4] perf tool: Get PMU type id from sysfs Lin Ming
2011-06-30 12:10 ` [PATCH 0/4] perf: Intel uncore pmu counting support Stephane Eranian
2011-06-30 14:10 ` Peter Zijlstra [this message]
2011-06-30 16:27 ` Stephane Eranian
2011-07-01 3:17 ` Lin Ming
2011-07-01 10:49 ` Stephane Eranian
2011-07-01 12:23 ` Stephane Eranian
2011-07-01 12:28 ` Stephane Eranian
2011-07-04 6:03 ` Lin Ming
2011-07-01 5:49 ` Lin Ming
2011-07-01 11:08 ` Ingo Molnar
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1309443054.12449.56.camel@twins \
--to=a.p.zijlstra@chello.nl \
--cc=acme@ghostprotocols.net \
--cc=andi@firstfloor.org \
--cc=eranian@google.com \
--cc=linux-kernel@vger.kernel.org \
--cc=ming.m.lin@intel.com \
--cc=mingo@elte.hu \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox