From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S935696Ab1JFGUl (ORCPT ); Thu, 6 Oct 2011 02:20:41 -0400 Received: from mail-gx0-f174.google.com ([209.85.161.174]:44970 "EHLO mail-gx0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S935288Ab1JFGUk (ORCPT ); Thu, 6 Oct 2011 02:20:40 -0400 Subject: [PATCH 09/10] ASoC: wm8974: Convert to snd_soc_cache_sync From: Axel Lin To: linux-kernel@vger.kernel.org Cc: Mark Brown , Ian Lartey , Dimitris Papastamos , Liam Girdwood , alsa-devel@alsa-project.org In-Reply-To: <1317881417.13399.1.camel@phoenix> References: <1317881417.13399.1.camel@phoenix> Content-Type: text/plain; charset="UTF-8" Date: Thu, 06 Oct 2011 14:20:33 +0800 Message-ID: <1317882033.13399.13.camel@phoenix> Mime-Version: 1.0 X-Mailer: Evolution 2.32.2 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Convert to snd_soc_cache_sync for sync reg_cache with the hardware. Signed-off-by: Axel Lin --- sound/soc/codecs/wm8974.c | 29 ++++++++++++++++++----------- 1 files changed, 18 insertions(+), 11 deletions(-) diff --git a/sound/soc/codecs/wm8974.c b/sound/soc/codecs/wm8974.c index ca646a8..e25f0ad 100644 --- a/sound/soc/codecs/wm8974.c +++ b/sound/soc/codecs/wm8974.c @@ -46,6 +46,17 @@ static const u16 wm8974_reg[WM8974_CACHEREGNUM] = { 0x0000, }; +static int wm8974_volatile_register(struct snd_soc_codec *codec, + unsigned int reg) +{ + switch (reg) { + case WM8974_RESET: + return 1; + default: + return 0; + } +} + #define WM8974_POWER1_BIASEN 0x08 #define WM8974_POWER1_BUFIOEN 0x04 @@ -517,6 +528,7 @@ static int wm8974_mute(struct snd_soc_dai *dai, int mute) static int wm8974_set_bias_level(struct snd_soc_codec *codec, enum snd_soc_bias_level level) { + int ret; u16 power1 = snd_soc_read(codec, WM8974_POWER1) & ~0x3; switch (level) { @@ -530,6 +542,11 @@ static int wm8974_set_bias_level(struct snd_soc_codec *codec, power1 |= WM8974_POWER1_BIASEN | WM8974_POWER1_BUFIOEN; if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { + ret = snd_soc_cache_sync(codec); + if (ret < 0) { + dev_err(codec->dev, "Failed to sync cache: %d\n", ret); + return ret; + } /* Initial cap charge at VMID 5k */ snd_soc_write(codec, WM8974_POWER1, power1 | 0x3); mdelay(100); @@ -589,18 +606,7 @@ static int wm8974_suspend(struct snd_soc_codec *codec, pm_message_t state) static int wm8974_resume(struct snd_soc_codec *codec) { - int i; - u8 data[2]; - u16 *cache = codec->reg_cache; - - /* Sync reg_cache with the hardware */ - for (i = 0; i < ARRAY_SIZE(wm8974_reg); i++) { - data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001); - data[1] = cache[i] & 0x00ff; - codec->hw_write(codec->control_data, data, 2); - } wm8974_set_bias_level(codec, SND_SOC_BIAS_STANDBY); - return 0; } @@ -644,6 +650,7 @@ static struct snd_soc_codec_driver soc_codec_dev_wm8974 = { .reg_cache_size = ARRAY_SIZE(wm8974_reg), .reg_word_size = sizeof(u16), .reg_cache_default = wm8974_reg, + .volatile_register = wm8974_volatile_register, }; #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) -- 1.7.4.1