From: Stephen Boyd <sboyd@codeaurora.org>
To: David Brown <davidb@codeaurora.org>
Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Thomas Gleixner <tglx@linutronix.de>,
Marc Zyngier <marc.zyngier@arm.com>
Subject: [PATCH 7/8] msm: timer: Setup interrupt after registering clockevent
Date: Tue, 8 Nov 2011 10:34:09 -0800 [thread overview]
Message-ID: <1320777250-23263-8-git-send-email-sboyd@codeaurora.org> (raw)
In-Reply-To: <1320777250-23263-1-git-send-email-sboyd@codeaurora.org>
Some bootloaders may leave a pending interrupt for the timer and
thus msm_timer_interrupt() has a check for a NULL event handler.
Unmask and register for the interrupt after registering the
clockevent so that we can get the NULL pointer check out of the
fast path.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm/mach-msm/timer.c | 6 ++----
1 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index ca0a957..3d80fbf 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -47,8 +47,6 @@ static void __iomem *event_base;
static irqreturn_t msm_timer_interrupt(int irq, void *dev_id)
{
struct clock_event_device *evt = *(struct clock_event_device **)dev_id;
- if (evt->event_handler == NULL)
- return IRQ_HANDLED;
/* Stop the timer tick */
if (evt->mode == CLOCK_EVT_MODE_ONESHOT) {
u32 ctrl = readl_relaxed(event_base + TIMER_ENABLE);
@@ -174,6 +172,7 @@ static void __init msm_timer_init(void)
ce->cpumask = cpumask_of(0);
ce->irq = INT_GP_TIMER_EXP;
+ clockevents_register_device(ce);
if (cpu_is_msm8x60() || cpu_is_msm8960()) {
msm_evt.percpu_evt = alloc_percpu(struct clock_event_device *);
if (!msm_evt.percpu_evt) {
@@ -194,7 +193,6 @@ static void __init msm_timer_init(void)
if (res)
pr_err("request_irq failed for %s\n", ce->name);
- clockevents_register_device(ce);
err:
writel_relaxed(TIMER_ENABLE_EN, source_base + TIMER_ENABLE);
res = clocksource_register_hz(cs, dgt_hz);
@@ -224,8 +222,8 @@ int __cpuinit local_timer_setup(struct clock_event_device *evt)
evt->min_delta_ns = clockevent_delta2ns(4, evt);
*__this_cpu_ptr(msm_evt.percpu_evt) = evt;
- enable_percpu_irq(evt->irq, 0);
clockevents_register_device(evt);
+ enable_percpu_irq(evt->irq, 0);
return 0;
}
--
Sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.
next prev parent reply other threads:[~2011-11-08 18:35 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-11-08 18:34 [PATCH 0/8] MSM timer fixes and cleanups Stephen Boyd
2011-11-08 18:34 ` [PATCH 1/8] msm: timer: Tighten #ifdef for local timer support Stephen Boyd
2011-11-08 18:34 ` [PATCH 2/8] msm: timer: Cleanup #includes and #defines Stephen Boyd
2011-11-08 18:34 ` [PATCH 3/8] msm: timer: Use GPT for clockevents and DGT for clocksource Stephen Boyd
2011-11-08 18:34 ` [PATCH 4/8] msm: timer: Fix ONESHOT mode interrupts Stephen Boyd
2011-11-08 18:34 ` [PATCH 5/8] msm: timer: Remove msm_clocks[] and simplify code Stephen Boyd
2011-11-08 18:34 ` [PATCH 6/8] msm: timer: Remove SoC specific #ifdefs Stephen Boyd
2011-11-08 18:34 ` Stephen Boyd [this message]
2011-11-08 18:34 ` [PATCH 8/8] msm: timer: Use clockevents_config_and_register() Stephen Boyd
2011-11-10 18:33 ` [PATCH 0/8] MSM timer fixes and cleanups David Brown
2011-11-10 19:12 ` Stephen Boyd
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