public inbox for linux-kernel@vger.kernel.org
 help / color / mirror / Atom feed
From: Peter Zijlstra <peterz@infradead.org>
To: Stephane Eranian <eranian@google.com>
Cc: linux-kernel@vger.kernel.org, robert.richter@amd.com,
	mingo@elte.hu, ming.m.lin@intel.com, ak@linux.intel.com
Subject: Re: [PATCH] perf_events: fix and improve x86 event scheduling
Date: Thu, 10 Nov 2011 19:31:50 +0100	[thread overview]
Message-ID: <1320949910.13800.35.camel@twins> (raw)
In-Reply-To: <CABPqkBS_4TBYUvw_bPbtgpAfp8+vnSRZBYQoSAOKjOYV4GHmXA@mail.gmail.com>

On Thu, 2011-11-10 at 16:09 +0100, Stephane Eranian wrote:
> What are the configs for which you have failures on Intel?
> 
Continuing to use Core2 as an example platform:

  cycles,cycles,instructions,instructions

They all have weight 3, yet the masks are not the same, it'll assign
them like: pmc0, pmc1, fp-instructions, fail

Counter rotation will make sure the next attempt looks like:

  instructions,cycles,cycles,instructions

Which will work correctly since it'll do: pmc0, pmc1, fp-cycles,
fp-instructions.

Its usually not a really big deal, but I ran into it few months ago and
noticed it because the scaled values weren't what I was expecting them
to be, took me a while to figure out wth happened.



  parent reply	other threads:[~2011-11-10 18:32 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-11-07 11:01 [PATCH] perf_events: fix and improve x86 event scheduling Stephane Eranian
2011-11-07 11:55 ` Peter Zijlstra
2011-11-07 12:10 ` Peter Zijlstra
2011-11-07 13:52   ` Stephane Eranian
2011-11-07 14:56     ` Peter Zijlstra
2011-11-10 14:37 ` Peter Zijlstra
2011-11-10 15:09   ` Stephane Eranian
2011-11-10 16:41     ` Gleb Natapov
2011-11-10 16:59       ` Stephane Eranian
2011-11-10 17:13         ` Gleb Natapov
2011-11-10 16:59     ` Robert Richter
2011-11-10 18:31     ` Peter Zijlstra [this message]
2011-11-10 18:03 ` Robert Richter
2011-11-10 18:41   ` Peter Zijlstra
2011-11-10 18:52   ` Peter Zijlstra
2011-11-11 14:29     ` Robert Richter
2011-11-14 17:51       ` [PATCH v3 0/2] perf, x86: handle overlapping counters Robert Richter
2011-11-14 17:51         ` [PATCH v3 1/2] perf, x86: Implement event scheduler helper functions Robert Richter
2011-11-16 16:02           ` Peter Zijlstra
2011-11-16 19:23             ` Robert Richter
2011-11-14 17:51         ` [PATCH v3 2/2] perf, x86: Fix event scheduler for constraints with overlapping counters Robert Richter
2011-11-14 12:55   ` [PATCH] perf_events: fix and improve x86 event scheduling Stephane Eranian
2011-11-14 14:12     ` Peter Zijlstra
2011-11-14 14:26       ` Stephane Eranian
2011-11-14 16:00         ` Peter Zijlstra
2011-11-14 17:39           ` Stephane Eranian
2011-11-14 21:43             ` Peter Zijlstra
2011-11-16 10:28               ` Stephane Eranian
2011-11-14 22:16             ` Peter Zijlstra
2011-11-16 10:06               ` Stephane Eranian

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1320949910.13800.35.camel@twins \
    --to=peterz@infradead.org \
    --cc=ak@linux.intel.com \
    --cc=eranian@google.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=ming.m.lin@intel.com \
    --cc=mingo@elte.hu \
    --cc=robert.richter@amd.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox