* [PATCH 0/2] Summary @ 2011-11-16 10:55 Rene Bolldorf 2011-11-16 10:55 ` [PATCH 1/2] Initial PCI support for Atheros 724x SoCs Rene Bolldorf 2011-11-16 10:55 ` [PATCH 2/2] Initial support for the Ubiquiti Networks XM board Rene Bolldorf 0 siblings, 2 replies; 11+ messages in thread From: Rene Bolldorf @ 2011-11-16 10:55 UTC (permalink / raw) To: Ralf Baechle; +Cc: linux-mips, linux-kernel, Rene Bolldorf Hello, this patchset adds initial PCI support for 724x Atheros SoCs and initial support for the Ubiquiti Networks XM board (Nanostation Mx, Nanobridge Mx, etc.). Best Regards Rene Bolldorf (2): Initial PCI support for Atheros 724x SoCs. Initial support for the Ubiquiti Networks XM board. arch/mips/ath79/Kconfig | 12 ++++ arch/mips/ath79/Makefile | 1 + arch/mips/ath79/Platform | 7 ++- arch/mips/ath79/mach-ubnt-xm.c | 110 ++++++++++++++++++++++++++++++++++++++++ arch/mips/ath79/machtypes.h | 1 + arch/mips/pci/Makefile | 1 + arch/mips/pci/ops-ath724x.c | 109 +++++++++++++++++++++++++++++++++++++++ arch/mips/pci/pci-ath724x.c | 45 ++++++++++++++++ 8 files changed, 283 insertions(+), 3 deletions(-) create mode 100644 arch/mips/ath79/mach-ubnt-xm.c create mode 100644 arch/mips/pci/ops-ath724x.c create mode 100644 arch/mips/pci/pci-ath724x.c -- 1.7.7.1 ^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 1/2] Initial PCI support for Atheros 724x SoCs. 2011-11-16 10:55 [PATCH 0/2] Summary Rene Bolldorf @ 2011-11-16 10:55 ` Rene Bolldorf 2011-11-16 19:50 ` Manuel Lauss 2011-11-16 10:55 ` [PATCH 2/2] Initial support for the Ubiquiti Networks XM board Rene Bolldorf 1 sibling, 1 reply; 11+ messages in thread From: Rene Bolldorf @ 2011-11-16 10:55 UTC (permalink / raw) To: Ralf Baechle; +Cc: linux-mips, linux-kernel, Rene Bolldorf Signed-off-by: Rene Bolldorf <xsecute@googlemail.com> --- arch/mips/pci/Makefile | 1 + arch/mips/pci/ops-ath724x.c | 109 +++++++++++++++++++++++++++++++++++++++++++ arch/mips/pci/pci-ath724x.c | 45 ++++++++++++++++++ 3 files changed, 155 insertions(+), 0 deletions(-) create mode 100644 arch/mips/pci/ops-ath724x.c create mode 100644 arch/mips/pci/pci-ath724x.c diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile index bb82cbd..5180b38 100644 --- a/arch/mips/pci/Makefile +++ b/arch/mips/pci/Makefile @@ -19,6 +19,7 @@ obj-$(CONFIG_BCM47XX) += pci-bcm47xx.o obj-$(CONFIG_BCM63XX) += pci-bcm63xx.o fixup-bcm63xx.o \ ops-bcm63xx.o obj-$(CONFIG_MIPS_ALCHEMY) += pci-alchemy.o +obj-$(CONFIG_SOC_AR724X) += ops-ath724x.o pci-ath724x.o # # These are still pretty much in the old state, watch, go blind. diff --git a/arch/mips/pci/ops-ath724x.c b/arch/mips/pci/ops-ath724x.c new file mode 100644 index 0000000..bd3cf15 --- /dev/null +++ b/arch/mips/pci/ops-ath724x.c @@ -0,0 +1,109 @@ +/* + * Atheros 724x PCI support + * + * Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include <linux/pci.h> + +#define reg_read(_phys) (*(volatile unsigned int *) KSEG1ADDR(_phys)) +#define reg_write(_phys, _val) ((*(volatile unsigned int *) KSEG1ADDR(_phys)) = (_val)) + +#define ATH724X_PCI_DEV_BASE 0x14000000 + +static DEFINE_SPINLOCK(ath724x_pci_lock); + +static int ath724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where, + int size, uint32_t *value) +{ + unsigned long flags, addr, tval, mask; + + if(devfn) + return PCIBIOS_DEVICE_NOT_FOUND; + + if(where & (size - 1)) + return PCIBIOS_BAD_REGISTER_NUMBER; + + spin_lock_irqsave(&ath724x_pci_lock, flags); + + switch (size) { + case 1: + addr = where & ~3; + mask = 0xff000000 >> ((where % 4) * 8); + tval = reg_read(ATH724X_PCI_DEV_BASE + addr); + tval = tval & ~mask; + *value = (tval >> ((4 - (where % 4))*8)); + break; + case 2: + addr = where & ~3; + mask = 0xffff0000 >> ((where % 4)*8); + tval = reg_read(ATH724X_PCI_DEV_BASE + addr); + tval = tval & ~mask; + *value = (tval >> ((4 - (where % 4))*8)); + break; + case 4: + *value = reg_read(ATH724X_PCI_DEV_BASE + where); + break; + default: + spin_unlock_irqrestore(&ath724x_pci_lock, flags); + + return PCIBIOS_BAD_REGISTER_NUMBER; + } + + spin_unlock_irqrestore(&ath724x_pci_lock, flags); + + return PCIBIOS_SUCCESSFUL; +} + +static int ath724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where, + int size, uint32_t value) +{ + unsigned long flags, tval, addr, mask; + + if(devfn) + return PCIBIOS_DEVICE_NOT_FOUND; + + if(where & (size - 1)) + return PCIBIOS_BAD_REGISTER_NUMBER; + + spin_lock_irqsave(&ath724x_pci_lock, flags); + + switch (size) { + case 1: + addr = (ATH724X_PCI_DEV_BASE + where) & ~3; + mask = 0xff000000 >> ((where % 4)*8); + tval = reg_read(addr); + tval = tval & ~mask; + tval |= (value << ((4 - (where % 4))*8)) & mask; + reg_write(addr,tval); + break; + case 2: + addr = (ATH724X_PCI_DEV_BASE + where) & ~3; + mask = 0xffff0000 >> ((where % 4)*8); + tval = reg_read(addr); + tval = tval & ~mask; + tval |= (value << ((4 - (where % 4))*8)) & mask; + reg_write(addr,tval); + break; + case 4: + reg_write((ATH724X_PCI_DEV_BASE + where),value); + break; + default: + spin_unlock_irqrestore(&ath724x_pci_lock, flags); + + return PCIBIOS_BAD_REGISTER_NUMBER; + } + + spin_unlock_irqrestore(&ath724x_pci_lock, flags); + + return PCIBIOS_SUCCESSFUL; +} + +struct pci_ops ath724x_pci_ops = { + .read = ath724x_pci_read, + .write = ath724x_pci_write, +}; diff --git a/arch/mips/pci/pci-ath724x.c b/arch/mips/pci/pci-ath724x.c new file mode 100644 index 0000000..6c6c483 --- /dev/null +++ b/arch/mips/pci/pci-ath724x.c @@ -0,0 +1,45 @@ +/* + * Atheros 724x PCI support + * + * Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include <linux/pci.h> + +#define ATH724X_PCI_MEM_BASE 0x10000000 +#define ATH724X_PCI_MEM_SIZE 0x08000000 + +static struct resource ath724x_io_resource = { + .name = "PCI IO space", + .start = 0, + .end = 0, + .flags = IORESOURCE_IO, +}; + +static struct resource ath724x_mem_resource = { + .name = "PCI memory space", + .start = ATH724X_PCI_MEM_BASE, + .end = ATH724X_PCI_MEM_BASE + ATH724X_PCI_MEM_SIZE - 1, + .flags = IORESOURCE_MEM, +}; + +extern struct pci_ops ath724x_pci_ops; + +static struct pci_controller ath724x_pci_controller = { + .pci_ops = &ath724x_pci_ops, + .mem_resource = &ath724x_mem_resource, + .io_resource = &ath724x_io_resource, +}; + +static int __init ath724x_pcibios_init(void) +{ + register_pci_controller(&ath724x_pci_controller); + + return 0; +} + +arch_initcall(ath724x_pcibios_init); -- 1.7.7.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH 1/2] Initial PCI support for Atheros 724x SoCs. 2011-11-16 10:55 ` [PATCH 1/2] Initial PCI support for Atheros 724x SoCs Rene Bolldorf @ 2011-11-16 19:50 ` Manuel Lauss 0 siblings, 0 replies; 11+ messages in thread From: Manuel Lauss @ 2011-11-16 19:50 UTC (permalink / raw) To: Rene Bolldorf; +Cc: Ralf Baechle, linux-mips, linux-kernel Howdy, On Wed, Nov 16, 2011 at 11:55 AM, Rene Bolldorf <xsecute@googlemail.com> wrote: > Signed-off-by: Rene Bolldorf <xsecute@googlemail.com> > --- > arch/mips/pci/Makefile | 1 + > arch/mips/pci/ops-ath724x.c | 109 +++++++++++++++++++++++++++++++++++++++++++ > arch/mips/pci/pci-ath724x.c | 45 ++++++++++++++++++ Why don't you just merge ops-ath724x.c into pci-ath724x.c? (the only place where its contents are referenced) > diff --git a/arch/mips/pci/ops-ath724x.c b/arch/mips/pci/ops-ath724x.c > new file mode 100644 > index 0000000..bd3cf15 > --- /dev/null > +++ b/arch/mips/pci/ops-ath724x.c > @@ -0,0 +1,109 @@ [...] > +static int ath724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where, > + int size, uint32_t *value) > +{ > + unsigned long flags, addr, tval, mask; > + > + if(devfn) > + return PCIBIOS_DEVICE_NOT_FOUND; > + > + if(where & (size - 1)) > + return PCIBIOS_BAD_REGISTER_NUMBER; Please run both patches through checkpatch once and fix up the codingstyle issues it will complain about (like the two above). Thanks, Manuel Lauss ^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 2/2] Initial support for the Ubiquiti Networks XM board. 2011-11-16 10:55 [PATCH 0/2] Summary Rene Bolldorf 2011-11-16 10:55 ` [PATCH 1/2] Initial PCI support for Atheros 724x SoCs Rene Bolldorf @ 2011-11-16 10:55 ` Rene Bolldorf 2011-11-16 20:02 ` Gabor Juhos 1 sibling, 1 reply; 11+ messages in thread From: Rene Bolldorf @ 2011-11-16 10:55 UTC (permalink / raw) To: Ralf Baechle; +Cc: linux-mips, linux-kernel, Rene Bolldorf Signed-off-by: Rene Bolldorf <xsecute@googlemail.com> --- arch/mips/ath79/Kconfig | 12 ++++ arch/mips/ath79/Makefile | 1 + arch/mips/ath79/Platform | 7 ++- arch/mips/ath79/mach-ubnt-xm.c | 110 ++++++++++++++++++++++++++++++++++++++++ arch/mips/ath79/machtypes.h | 1 + 5 files changed, 128 insertions(+), 3 deletions(-) create mode 100644 arch/mips/ath79/mach-ubnt-xm.c diff --git a/arch/mips/ath79/Kconfig b/arch/mips/ath79/Kconfig index 4770741..fa74e73 100644 --- a/arch/mips/ath79/Kconfig +++ b/arch/mips/ath79/Kconfig @@ -23,6 +23,16 @@ config ATH79_MACH_PB44 Say 'Y' here if you want your kernel to support the Atheros PB44 reference board. +config ATH79_MACH_UBNT_XM + bool "Ubiquiti Networks XM board" + select SOC_AR724X + select ATH79_DEV_GPIO_BUTTONS + select ATH79_DEV_LEDS_GPIO + select ATH79_DEV_SPI + help + Say 'Y' here if you want your kernel to support the + Ubiquiti Networks XM board. + endmenu config SOC_AR71XX @@ -33,6 +43,8 @@ config SOC_AR71XX config SOC_AR724X select USB_ARCH_HAS_EHCI select USB_ARCH_HAS_OHCI + select HW_HAS_PCI + select PCI def_bool n config SOC_AR913X diff --git a/arch/mips/ath79/Makefile b/arch/mips/ath79/Makefile index c33d465..ac9f375 100644 --- a/arch/mips/ath79/Makefile +++ b/arch/mips/ath79/Makefile @@ -26,3 +26,4 @@ obj-$(CONFIG_ATH79_DEV_SPI) += dev-spi.o # obj-$(CONFIG_ATH79_MACH_AP81) += mach-ap81.o obj-$(CONFIG_ATH79_MACH_PB44) += mach-pb44.o +obj-$(CONFIG_ATH79_MACH_UBNT_XM) += mach-ubnt-xm.o diff --git a/arch/mips/ath79/Platform b/arch/mips/ath79/Platform index 2bd6636..aca7ab1 100644 --- a/arch/mips/ath79/Platform +++ b/arch/mips/ath79/Platform @@ -2,6 +2,7 @@ # Atheros AR71xx/AR724x/AR913x # -platform-$(CONFIG_ATH79) += ath79/ -cflags-$(CONFIG_ATH79) += -I$(srctree)/arch/mips/include/asm/mach-ath79 -load-$(CONFIG_ATH79) = 0xffffffff80060000 +platform-$(CONFIG_ATH79) += ath79/ +cflags-$(CONFIG_ATH79) += -I$(srctree)/arch/mips/include/asm/mach-ath79 +load-$(CONFIG_ATH79) = 0xffffffff80060000 +load-$(CONFIG_ATH79_MACH_UBNT_XM) = 0xffffffff80002000 diff --git a/arch/mips/ath79/mach-ubnt-xm.c b/arch/mips/ath79/mach-ubnt-xm.c new file mode 100644 index 0000000..150a0a0 --- /dev/null +++ b/arch/mips/ath79/mach-ubnt-xm.c @@ -0,0 +1,110 @@ +/* + * Ubiquiti Networks XM board support + * + * Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com> + * + * Derived from: mach-pb44.c + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include <linux/init.h> +#include <linux/pci.h> +#include <linux/ath9k_platform.h> + +#include "machtypes.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-spi.h" + +#define UBNT_XM_GPIO_LED_L1 0 +#define UBNT_XM_GPIO_LED_L2 1 +#define UBNT_XM_GPIO_LED_L3 11 +#define UBNT_XM_GPIO_LED_L4 7 + +#define UBNT_XM_GPIO_BTN_RESET 12 + +#define UBNT_XM_KEYS_POLL_INTERVAL 20 +#define UBNT_XM_KEYS_DEBOUNCE_INTERVAL (3 * UBNT_XM_KEYS_POLL_INTERVAL) + +#define UBNT_XM_PCI_IRQ 48 +#define UBNT_XM_EEPROM_ADDR (u8 *) KSEG1ADDR(0x1fff1000) + +static struct gpio_led ubnt_xm_leds_gpio[] __initdata = { + { + .name = "signal:poor", + .gpio = UBNT_XM_GPIO_LED_L1, + .active_low = 0, + }, { + .name = "signal:bad", + .gpio = UBNT_XM_GPIO_LED_L2, + .active_low = 0, + }, { + .name = "signal:good", + .gpio = UBNT_XM_GPIO_LED_L3, + .active_low = 0, + }, { + .name = "signal:excellent", + .gpio = UBNT_XM_GPIO_LED_L4, + .active_low = 0, + }, +}; + +static struct gpio_keys_button ubnt_xm_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = UBNT_XM_KEYS_DEBOUNCE_INTERVAL, + .gpio = UBNT_XM_GPIO_BTN_RESET, + .active_low = 1, + } +}; + +static struct spi_board_info ubnt_xm_spi_info[] = { + { + .bus_num = 0, + .chip_select = 0, + .max_speed_hz = 25000000, + .modalias = "mx25l6405d", + } +}; + +static struct ath79_spi_platform_data ubnt_xm_spi_data = { + .bus_num = 0, + .num_chipselect = 1, +}; + +static struct ath9k_platform_data ubnt_xm_eeprom_data; + +int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin) +{ + return UBNT_XM_PCI_IRQ; +} + +int pcibios_plat_dev_init(struct pci_dev *dev) +{ + dev->dev.platform_data = &ubnt_xm_eeprom_data; + + return 0; +} + +static void __init ubnt_xm_init(void) +{ + ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_xm_leds_gpio), + ubnt_xm_leds_gpio); + + ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, + ARRAY_SIZE(ubnt_xm_gpio_keys), + ubnt_xm_gpio_keys); + + ath79_register_spi(&ubnt_xm_spi_data, ubnt_xm_spi_info, + ARRAY_SIZE(ubnt_xm_spi_info)); + + memcpy(ubnt_xm_eeprom_data.eeprom_data, UBNT_XM_EEPROM_ADDR, + sizeof(ubnt_xm_eeprom_data.eeprom_data)); +} + +MIPS_MACHINE(ATH79_MACH_UBNT_XM, "UBNT-XM", "Ubiquiti Networks XM board", ubnt_xm_init); diff --git a/arch/mips/ath79/machtypes.h b/arch/mips/ath79/machtypes.h index 3940fe4..1bb0747 100644 --- a/arch/mips/ath79/machtypes.h +++ b/arch/mips/ath79/machtypes.h @@ -18,6 +18,7 @@ enum ath79_mach_type { ATH79_MACH_GENERIC = 0, ATH79_MACH_AP81, /* Atheros AP81 reference board */ ATH79_MACH_PB44, /* Atheros PB44 reference board */ + ATH79_MACH_UBNT_XM, /* Ubiquiti Networks XM board */ }; #endif /* _ATH79_MACHTYPE_H */ -- 1.7.7.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH 2/2] Initial support for the Ubiquiti Networks XM board. 2011-11-16 10:55 ` [PATCH 2/2] Initial support for the Ubiquiti Networks XM board Rene Bolldorf @ 2011-11-16 20:02 ` Gabor Juhos [not found] ` <CAEWqx58YQAKQ=D=qteipHQq5Q==+aEiKMYP4FczMZ9kReogMDQ@mail.gmail.com> 0 siblings, 1 reply; 11+ messages in thread From: Gabor Juhos @ 2011-11-16 20:02 UTC (permalink / raw) To: Rene Bolldorf; +Cc: Ralf Baechle, linux-mips, linux-kernel Hi Rene, > Signed-off-by: Rene Bolldorf <xsecute@googlemail.com> > --- > arch/mips/ath79/Kconfig | 12 ++++ > arch/mips/ath79/Makefile | 1 + > arch/mips/ath79/Platform | 7 ++- > arch/mips/ath79/mach-ubnt-xm.c | 110 ++++++++++++++++++++++++++++++++++++++++ > arch/mips/ath79/machtypes.h | 1 + > 5 files changed, 128 insertions(+), 3 deletions(-) > create mode 100644 arch/mips/ath79/mach-ubnt-xm.c > > diff --git a/arch/mips/ath79/Kconfig b/arch/mips/ath79/Kconfig > index 4770741..fa74e73 100644 > --- a/arch/mips/ath79/Kconfig > +++ b/arch/mips/ath79/Kconfig > @@ -23,6 +23,16 @@ config ATH79_MACH_PB44 > Say 'Y' here if you want your kernel to support the > Atheros PB44 reference board. > > +config ATH79_MACH_UBNT_XM > + bool "Ubiquiti Networks XM board" > + select SOC_AR724X > + select ATH79_DEV_GPIO_BUTTONS > + select ATH79_DEV_LEDS_GPIO > + select ATH79_DEV_SPI > + help > + Say 'Y' here if you want your kernel to support the > + Ubiquiti Networks XM board. > + > endmenu > > config SOC_AR71XX > @@ -33,6 +43,8 @@ config SOC_AR71XX > config SOC_AR724X > select USB_ARCH_HAS_EHCI > select USB_ARCH_HAS_OHCI > + select HW_HAS_PCI > + select PCI Please don't select the whole PCI subsystem. Even if the hardware has PCI support, not everyone wants to build a kernel with PCI support. > def_bool n > > config SOC_AR913X > diff --git a/arch/mips/ath79/Makefile b/arch/mips/ath79/Makefile > index c33d465..ac9f375 100644 > --- a/arch/mips/ath79/Makefile > +++ b/arch/mips/ath79/Makefile > @@ -26,3 +26,4 @@ obj-$(CONFIG_ATH79_DEV_SPI) += dev-spi.o > # > obj-$(CONFIG_ATH79_MACH_AP81) += mach-ap81.o > obj-$(CONFIG_ATH79_MACH_PB44) += mach-pb44.o > +obj-$(CONFIG_ATH79_MACH_UBNT_XM) += mach-ubnt-xm.o > diff --git a/arch/mips/ath79/Platform b/arch/mips/ath79/Platform > index 2bd6636..aca7ab1 100644 > --- a/arch/mips/ath79/Platform > +++ b/arch/mips/ath79/Platform > @@ -2,6 +2,7 @@ > # Atheros AR71xx/AR724x/AR913x > # > > -platform-$(CONFIG_ATH79) += ath79/ > -cflags-$(CONFIG_ATH79) += -I$(srctree)/arch/mips/include/asm/mach-ath79 > -load-$(CONFIG_ATH79) = 0xffffffff80060000 > +platform-$(CONFIG_ATH79) += ath79/ > +cflags-$(CONFIG_ATH79) += -I$(srctree)/arch/mips/include/asm/mach-ath79 > +load-$(CONFIG_ATH79) = 0xffffffff80060000 > +load-$(CONFIG_ATH79_MACH_UBNT_XM) = 0xffffffff80002000 Please don't add another load address here.The ath79 platform code has been designed in a way which allows a single kernel image to run on all AR71xx/AR724x/AR913X/AR933x based boards, and the 0x80060000 load address has been chosen due to compatibility reasons. It allows to boot the kernel on older boards which are using RedBoot as the bootloader. The U-Boot on the AR724x/AR933x based boards can load the kernel to 0x8006000. > diff --git a/arch/mips/ath79/mach-ubnt-xm.c b/arch/mips/ath79/mach-ubnt-xm.c > new file mode 100644 > index 0000000..150a0a0 > --- /dev/null > +++ b/arch/mips/ath79/mach-ubnt-xm.c > @@ -0,0 +1,110 @@ > +/* > + * Ubiquiti Networks XM board support > + * > + * Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com> > + * > + * Derived from: mach-pb44.c > + * > + * This program is free software; you can redistribute it and/or modify it > + * under the terms of the GNU General Public License version 2 as published > + * by the Free Software Foundation. > + */ > + > +#include <linux/init.h> > +#include <linux/pci.h> > +#include <linux/ath9k_platform.h> > + > +#include "machtypes.h" > +#include "dev-gpio-buttons.h" > +#include "dev-leds-gpio.h" > +#include "dev-spi.h" > + > +#define UBNT_XM_GPIO_LED_L1 0 > +#define UBNT_XM_GPIO_LED_L2 1 > +#define UBNT_XM_GPIO_LED_L3 11 > +#define UBNT_XM_GPIO_LED_L4 7 > + > +#define UBNT_XM_GPIO_BTN_RESET 12 > + > +#define UBNT_XM_KEYS_POLL_INTERVAL 20 > +#define UBNT_XM_KEYS_DEBOUNCE_INTERVAL (3 * UBNT_XM_KEYS_POLL_INTERVAL) > + > +#define UBNT_XM_PCI_IRQ 48 > +#define UBNT_XM_EEPROM_ADDR (u8 *) KSEG1ADDR(0x1fff1000) > + > +static struct gpio_led ubnt_xm_leds_gpio[] __initdata = { > + { > + .name = "signal:poor", > + .gpio = UBNT_XM_GPIO_LED_L1, > + .active_low = 0, > + }, { > + .name = "signal:bad", > + .gpio = UBNT_XM_GPIO_LED_L2, > + .active_low = 0, > + }, { > + .name = "signal:good", > + .gpio = UBNT_XM_GPIO_LED_L3, > + .active_low = 0, > + }, { > + .name = "signal:excellent", > + .gpio = UBNT_XM_GPIO_LED_L4, > + .active_low = 0, > + }, The LED names should follow the Linux LED Device Naming convention. See Documentation/leds/leds-class.txt. > +}; > + > +static struct gpio_keys_button ubnt_xm_gpio_keys[] __initdata = { > + { > + .desc = "reset", > + .type = EV_KEY, > + .code = KEY_RESTART, > + .debounce_interval = UBNT_XM_KEYS_DEBOUNCE_INTERVAL, > + .gpio = UBNT_XM_GPIO_BTN_RESET, > + .active_low = 1, > + } > +}; > + > +static struct spi_board_info ubnt_xm_spi_info[] = { > + { > + .bus_num = 0, > + .chip_select = 0, > + .max_speed_hz = 25000000, > + .modalias = "mx25l6405d", > + } > +}; > + > +static struct ath79_spi_platform_data ubnt_xm_spi_data = { > + .bus_num = 0, > + .num_chipselect = 1, > +}; > + > +static struct ath9k_platform_data ubnt_xm_eeprom_data; > + > +int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin) > +{ > + return UBNT_XM_PCI_IRQ; > +} > + > +int pcibios_plat_dev_init(struct pci_dev *dev) > +{ > + dev->dev.platform_data = &ubnt_xm_eeprom_data; > + > + return 0; > +} The 'pci_bios_map_irq' and 'pcibios_plat_dev_init' functions are global, so you can have only one instance of them within the kernel. Adding these functions into a machine specific file would prevent to build a kernel which supports multiple different boards. > + > +static void __init ubnt_xm_init(void) > +{ > + ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_xm_leds_gpio), > + ubnt_xm_leds_gpio); The Ubiquiti xM family has several different models. Registering all of these LEDs on every XM board makes no sense, the number of the LEDs and the assigned GPIO lines varies between the different boards. > + > + ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, > + ARRAY_SIZE(ubnt_xm_gpio_keys), > + ubnt_xm_gpio_keys); > + > + ath79_register_spi(&ubnt_xm_spi_data, ubnt_xm_spi_info, > + ARRAY_SIZE(ubnt_xm_spi_info)); > + > + memcpy(ubnt_xm_eeprom_data.eeprom_data, UBNT_XM_EEPROM_ADDR, > + sizeof(ubnt_xm_eeprom_data.eeprom_data)); > +} > + > +MIPS_MACHINE(ATH79_MACH_UBNT_XM, "UBNT-XM", "Ubiquiti Networks XM board", ubnt_xm_init); > diff --git a/arch/mips/ath79/machtypes.h b/arch/mips/ath79/machtypes.h > index 3940fe4..1bb0747 100644 > --- a/arch/mips/ath79/machtypes.h > +++ b/arch/mips/ath79/machtypes.h > @@ -18,6 +18,7 @@ enum ath79_mach_type { > ATH79_MACH_GENERIC = 0, > ATH79_MACH_AP81, /* Atheros AP81 reference board */ > ATH79_MACH_PB44, /* Atheros PB44 reference board */ > + ATH79_MACH_UBNT_XM, /* Ubiquiti Networks XM board */ > }; > > #endif /* _ATH79_MACHTYPE_H */ ^ permalink raw reply [flat|nested] 11+ messages in thread
[parent not found: <CAEWqx58YQAKQ=D=qteipHQq5Q==+aEiKMYP4FczMZ9kReogMDQ@mail.gmail.com>]
* Re: [PATCH 2/2] Initial support for the Ubiquiti Networks XM board. [not found] ` <CAEWqx58YQAKQ=D=qteipHQq5Q==+aEiKMYP4FczMZ9kReogMDQ@mail.gmail.com> @ 2011-11-17 10:31 ` René Bolldorf 2011-11-17 14:02 ` [PATCH 0/2] Summary Rene Bolldorf 0 siblings, 1 reply; 11+ messages in thread From: René Bolldorf @ 2011-11-17 10:31 UTC (permalink / raw) To: Gabor Juhos; +Cc: Ralf Baechle, linux-mips, linux-kernel Did not reply to all..... 2011/11/16 René Bolldorf <xsecute@googlemail.com>: > On Wed, Nov 16, 2011 at 9:02 PM, Gabor Juhos <juhosg@openwrt.org> wrote: >> Hi Rene, >> >>> Signed-off-by: Rene Bolldorf <xsecute@googlemail.com> >>> --- >>> arch/mips/ath79/Kconfig | 12 ++++ >>> arch/mips/ath79/Makefile | 1 + >>> arch/mips/ath79/Platform | 7 ++- >>> arch/mips/ath79/mach-ubnt-xm.c | 110 ++++++++++++++++++++++++++++++++++++++++ >>> arch/mips/ath79/machtypes.h | 1 + >>> 5 files changed, 128 insertions(+), 3 deletions(-) >>> create mode 100644 arch/mips/ath79/mach-ubnt-xm.c >>> >>> diff --git a/arch/mips/ath79/Kconfig b/arch/mips/ath79/Kconfig >>> index 4770741..fa74e73 100644 >>> --- a/arch/mips/ath79/Kconfig >>> +++ b/arch/mips/ath79/Kconfig >>> @@ -23,6 +23,16 @@ config ATH79_MACH_PB44 >>> Say 'Y' here if you want your kernel to support the >>> Atheros PB44 reference board. >>> >>> +config ATH79_MACH_UBNT_XM >>> + bool "Ubiquiti Networks XM board" >>> + select SOC_AR724X >>> + select ATH79_DEV_GPIO_BUTTONS >>> + select ATH79_DEV_LEDS_GPIO >>> + select ATH79_DEV_SPI >>> + help >>> + Say 'Y' here if you want your kernel to support the >>> + Ubiquiti Networks XM board. >>> + >>> endmenu >>> >>> config SOC_AR71XX >>> @@ -33,6 +43,8 @@ config SOC_AR71XX >>> config SOC_AR724X >>> select USB_ARCH_HAS_EHCI >>> select USB_ARCH_HAS_OHCI >>> + select HW_HAS_PCI >>> + select PCI >> >> Please don't select the whole PCI subsystem. Even if the hardware has PCI >> support, not everyone wants to build a kernel with PCI support. >> >>> def_bool n >>> >>> config SOC_AR913X >>> diff --git a/arch/mips/ath79/Makefile b/arch/mips/ath79/Makefile >>> index c33d465..ac9f375 100644 >>> --- a/arch/mips/ath79/Makefile >>> +++ b/arch/mips/ath79/Makefile >>> @@ -26,3 +26,4 @@ obj-$(CONFIG_ATH79_DEV_SPI) += dev-spi.o >>> # >>> obj-$(CONFIG_ATH79_MACH_AP81) += mach-ap81.o >>> obj-$(CONFIG_ATH79_MACH_PB44) += mach-pb44.o >>> +obj-$(CONFIG_ATH79_MACH_UBNT_XM) += mach-ubnt-xm.o >>> diff --git a/arch/mips/ath79/Platform b/arch/mips/ath79/Platform >>> index 2bd6636..aca7ab1 100644 >>> --- a/arch/mips/ath79/Platform >>> +++ b/arch/mips/ath79/Platform >>> @@ -2,6 +2,7 @@ >>> # Atheros AR71xx/AR724x/AR913x >>> # >>> >>> -platform-$(CONFIG_ATH79) += ath79/ >>> -cflags-$(CONFIG_ATH79) += -I$(srctree)/arch/mips/include/asm/mach-ath79 >>> -load-$(CONFIG_ATH79) = 0xffffffff80060000 >>> +platform-$(CONFIG_ATH79) += ath79/ >>> +cflags-$(CONFIG_ATH79) += -I$(srctree)/arch/mips/include/asm/mach-ath79 >>> +load-$(CONFIG_ATH79) = 0xffffffff80060000 >>> +load-$(CONFIG_ATH79_MACH_UBNT_XM) = 0xffffffff80002000 >> >> Please don't add another load address here.The ath79 platform code has been >> designed in a way which allows a single kernel image to run on all >> AR71xx/AR724x/AR913X/AR933x based boards, and the 0x80060000 load address has >> been chosen due to compatibility reasons. It allows to boot the kernel on older >> boards which are using RedBoot as the bootloader. The U-Boot on the >> AR724x/AR933x based boards can load the kernel to 0x8006000. >> >>> diff --git a/arch/mips/ath79/mach-ubnt-xm.c b/arch/mips/ath79/mach-ubnt-xm.c >>> new file mode 100644 >>> index 0000000..150a0a0 >>> --- /dev/null >>> +++ b/arch/mips/ath79/mach-ubnt-xm.c >>> @@ -0,0 +1,110 @@ >>> +/* >>> + * Ubiquiti Networks XM board support >>> + * >>> + * Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com> >>> + * >>> + * Derived from: mach-pb44.c >>> + * >>> + * This program is free software; you can redistribute it and/or modify it >>> + * under the terms of the GNU General Public License version 2 as published >>> + * by the Free Software Foundation. >>> + */ >>> + >>> +#include <linux/init.h> >>> +#include <linux/pci.h> >>> +#include <linux/ath9k_platform.h> >>> + >>> +#include "machtypes.h" >>> +#include "dev-gpio-buttons.h" >>> +#include "dev-leds-gpio.h" >>> +#include "dev-spi.h" >>> + >>> +#define UBNT_XM_GPIO_LED_L1 0 >>> +#define UBNT_XM_GPIO_LED_L2 1 >>> +#define UBNT_XM_GPIO_LED_L3 11 >>> +#define UBNT_XM_GPIO_LED_L4 7 >>> + >>> +#define UBNT_XM_GPIO_BTN_RESET 12 >>> + >>> +#define UBNT_XM_KEYS_POLL_INTERVAL 20 >>> +#define UBNT_XM_KEYS_DEBOUNCE_INTERVAL (3 * UBNT_XM_KEYS_POLL_INTERVAL) >>> + >>> +#define UBNT_XM_PCI_IRQ 48 >>> +#define UBNT_XM_EEPROM_ADDR (u8 *) KSEG1ADDR(0x1fff1000) >>> + >>> +static struct gpio_led ubnt_xm_leds_gpio[] __initdata = { >>> + { >>> + .name = "signal:poor", >>> + .gpio = UBNT_XM_GPIO_LED_L1, >>> + .active_low = 0, >>> + }, { >>> + .name = "signal:bad", >>> + .gpio = UBNT_XM_GPIO_LED_L2, >>> + .active_low = 0, >>> + }, { >>> + .name = "signal:good", >>> + .gpio = UBNT_XM_GPIO_LED_L3, >>> + .active_low = 0, >>> + }, { >>> + .name = "signal:excellent", >>> + .gpio = UBNT_XM_GPIO_LED_L4, >>> + .active_low = 0, >>> + }, >> >> The LED names should follow the Linux LED Device Naming convention. >> See Documentation/leds/leds-class.txt. >> >>> +}; >>> + >>> +static struct gpio_keys_button ubnt_xm_gpio_keys[] __initdata = { >>> + { >>> + .desc = "reset", >>> + .type = EV_KEY, >>> + .code = KEY_RESTART, >>> + .debounce_interval = UBNT_XM_KEYS_DEBOUNCE_INTERVAL, >>> + .gpio = UBNT_XM_GPIO_BTN_RESET, >>> + .active_low = 1, >>> + } >>> +}; >>> + >>> +static struct spi_board_info ubnt_xm_spi_info[] = { >>> + { >>> + .bus_num = 0, >>> + .chip_select = 0, >>> + .max_speed_hz = 25000000, >>> + .modalias = "mx25l6405d", >>> + } >>> +}; >>> + >>> +static struct ath79_spi_platform_data ubnt_xm_spi_data = { >>> + .bus_num = 0, >>> + .num_chipselect = 1, >>> +}; >>> + >>> +static struct ath9k_platform_data ubnt_xm_eeprom_data; >>> + >>> +int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin) >>> +{ >>> + return UBNT_XM_PCI_IRQ; >>> +} >>> + >>> +int pcibios_plat_dev_init(struct pci_dev *dev) >>> +{ >>> + dev->dev.platform_data = &ubnt_xm_eeprom_data; >>> + >>> + return 0; >>> +} >> >> The 'pci_bios_map_irq' and 'pcibios_plat_dev_init' functions are global, so you >> can have only one instance of them within the kernel. Adding these functions >> into a machine specific file would prevent to build a kernel which supports >> multiple different boards. >> >>> + >>> +static void __init ubnt_xm_init(void) >>> +{ >>> + ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_xm_leds_gpio), >>> + ubnt_xm_leds_gpio); >> >> The Ubiquiti xM family has several different models. Registering all of the assigned >> GPIO lines varies between the different boards. >> > I know that the GPIO lines from NanoBridge, Picostation and Rocket > with board revision v1 are the same. > I note this in the kconf help text. > > I improve the code and send a V2. > > Thank you for the hints. >>> + >>> + ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, >>> + ARRAY_SIZE(ubnt_xm_gpio_keys), >>> + ubnt_xm_gpio_keys); >>> + >>> + ath79_register_spi(&ubnt_xm_spi_data, ubnt_xm_spi_info, >>> + ARRAY_SIZE(ubnt_xm_spi_info)); >>> + >>> + memcpy(ubnt_xm_eeprom_data.eeprom_data, UBNT_XM_EEPROM_ADDR, >>> + sizeof(ubnt_xm_eeprom_data.eeprom_data)); >>> +} >>> + >>> +MIPS_MACHINE(ATH79_MACH_UBNT_XM, "UBNT-XM", "Ubiquiti Networks XM board", ubnt_xm_init); >>> diff --git a/arch/mips/ath79/machtypes.h b/arch/mips/ath79/machtypes.h >>> index 3940fe4..1bb0747 100644 >>> --- a/arch/mips/ath79/machtypes.h >>> +++ b/arch/mips/ath79/machtypes.h >>> @@ -18,6 +18,7 @@ enum ath79_mach_type { >>> ATH79_MACH_GENERIC = 0, >>> ATH79_MACH_AP81, /* Atheros AP81 reference board */ >>> ATH79_MACH_PB44, /* Atheros PB44 reference board */ >>> + ATH79_MACH_UBNT_XM, /* Ubiquiti Networks XM board */ >>> }; >>> >>> #endif /* _ATH79_MACHTYPE_H */ >> >> > ^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 0/2] Summary 2011-11-17 10:31 ` René Bolldorf @ 2011-11-17 14:02 ` Rene Bolldorf 2011-11-17 14:02 ` [PATCH 1/2] Initial PCI support for Atheros 724x SoCs. (v2) Rene Bolldorf 2011-11-17 14:02 ` [PATCH 2/2] Initial support for the Ubiquiti Networks XM board (rev 1.0). (patch v2) Rene Bolldorf 0 siblings, 2 replies; 11+ messages in thread From: Rene Bolldorf @ 2011-11-17 14:02 UTC (permalink / raw) To: Ralf Baechle; +Cc: linux-mips, linux-kernel, Rene Bolldorf Here is patchset v2 with coding style fixes and code improvements. Rene Bolldorf (2): Initial PCI support for Atheros 724x SoCs. (v2) Initial support for the Ubiquiti Networks XM board (rev 1.0). (patch v2) arch/mips/ath79/Kconfig | 11 ++ arch/mips/ath79/Makefile | 1 + arch/mips/ath79/mach-ubnt-xm.c | 119 ++++++++++++++++ arch/mips/ath79/machtypes.h | 1 + arch/mips/include/asm/mach-ath79/pci-ath724x.h | 21 +++ arch/mips/pci/Makefile | 1 + arch/mips/pci/pci-ath724x.c | 174 ++++++++++++++++++++++++ 7 files changed, 328 insertions(+), 0 deletions(-) create mode 100644 arch/mips/ath79/mach-ubnt-xm.c create mode 100644 arch/mips/include/asm/mach-ath79/pci-ath724x.h create mode 100644 arch/mips/pci/pci-ath724x.c -- 1.7.7.1 ^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 1/2] Initial PCI support for Atheros 724x SoCs. (v2) 2011-11-17 14:02 ` [PATCH 0/2] Summary Rene Bolldorf @ 2011-11-17 14:02 ` Rene Bolldorf 2011-11-17 14:33 ` Ralf Baechle 2011-11-17 14:02 ` [PATCH 2/2] Initial support for the Ubiquiti Networks XM board (rev 1.0). (patch v2) Rene Bolldorf 1 sibling, 1 reply; 11+ messages in thread From: Rene Bolldorf @ 2011-11-17 14:02 UTC (permalink / raw) To: Ralf Baechle; +Cc: linux-mips, linux-kernel, Rene Bolldorf Signed-off-by: Rene Bolldorf <xsecute@googlemail.com> --- arch/mips/include/asm/mach-ath79/pci-ath724x.h | 21 +++ arch/mips/pci/Makefile | 1 + arch/mips/pci/pci-ath724x.c | 174 ++++++++++++++++++++++++ 3 files changed, 196 insertions(+), 0 deletions(-) create mode 100644 arch/mips/include/asm/mach-ath79/pci-ath724x.h create mode 100644 arch/mips/pci/pci-ath724x.c diff --git a/arch/mips/include/asm/mach-ath79/pci-ath724x.h b/arch/mips/include/asm/mach-ath79/pci-ath724x.h new file mode 100644 index 0000000..454885f --- /dev/null +++ b/arch/mips/include/asm/mach-ath79/pci-ath724x.h @@ -0,0 +1,21 @@ +/* + * Atheros 724x PCI support + * + * Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#ifndef __ASM_MACH_ATH79_PCI_ATH724X_H +#define __ASM_MACH_ATH79_PCI_ATH724X_H + +struct ath724x_pci_data { + int irq; + void *pdata; +}; + +void ath724x_pci_add_data(struct ath724x_pci_data *data, int size); + +#endif /* __ASM_MACH_ATH79_PCI_ATH724X_H */ diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile index bb82cbd..19cfe04 100644 --- a/arch/mips/pci/Makefile +++ b/arch/mips/pci/Makefile @@ -19,6 +19,7 @@ obj-$(CONFIG_BCM47XX) += pci-bcm47xx.o obj-$(CONFIG_BCM63XX) += pci-bcm63xx.o fixup-bcm63xx.o \ ops-bcm63xx.o obj-$(CONFIG_MIPS_ALCHEMY) += pci-alchemy.o +obj-$(CONFIG_SOC_AR724X) += pci-ath724x.o # # These are still pretty much in the old state, watch, go blind. diff --git a/arch/mips/pci/pci-ath724x.c b/arch/mips/pci/pci-ath724x.c new file mode 100644 index 0000000..9f30e5d --- /dev/null +++ b/arch/mips/pci/pci-ath724x.c @@ -0,0 +1,174 @@ +/* + * Atheros 724x PCI support + * + * Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include <linux/pci.h> +#include <asm/mach-ath79/pci-ath724x.h> + +#define reg_read(_phys) (*(unsigned int *) KSEG1ADDR(_phys)) +#define reg_write(_phys, _val) ((*(unsigned int *) KSEG1ADDR(_phys)) = (_val)) + +#define ATH724X_PCI_DEV_BASE 0x14000000 +#define ATH724X_PCI_MEM_BASE 0x10000000 +#define ATH724X_PCI_MEM_SIZE 0x08000000 + +static DEFINE_SPINLOCK(ath724x_pci_lock); +static struct ath724x_pci_data *pci_data; +static int pci_data_size; + +static int ath724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where, + int size, uint32_t *value) +{ + unsigned long flags, addr, tval, mask; + + if (devfn) + return PCIBIOS_DEVICE_NOT_FOUND; + + if (where & (size - 1)) + return PCIBIOS_BAD_REGISTER_NUMBER; + + spin_lock_irqsave(&ath724x_pci_lock, flags); + + switch (size) { + case 1: + addr = where & ~3; + mask = 0xff000000 >> ((where % 4) * 8); + tval = reg_read(ATH724X_PCI_DEV_BASE + addr); + tval = tval & ~mask; + *value = (tval >> ((4 - (where % 4))*8)); + break; + case 2: + addr = where & ~3; + mask = 0xffff0000 >> ((where % 4)*8); + tval = reg_read(ATH724X_PCI_DEV_BASE + addr); + tval = tval & ~mask; + *value = (tval >> ((4 - (where % 4))*8)); + break; + case 4: + *value = reg_read(ATH724X_PCI_DEV_BASE + where); + break; + default: + spin_unlock_irqrestore(&ath724x_pci_lock, flags); + + return PCIBIOS_BAD_REGISTER_NUMBER; + } + + spin_unlock_irqrestore(&ath724x_pci_lock, flags); + + return PCIBIOS_SUCCESSFUL; +} + +static int ath724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where, + int size, uint32_t value) +{ + unsigned long flags, tval, addr, mask; + + if (devfn) + return PCIBIOS_DEVICE_NOT_FOUND; + + if (where & (size - 1)) + return PCIBIOS_BAD_REGISTER_NUMBER; + + spin_lock_irqsave(&ath724x_pci_lock, flags); + + switch (size) { + case 1: + addr = (ATH724X_PCI_DEV_BASE + where) & ~3; + mask = 0xff000000 >> ((where % 4)*8); + tval = reg_read(addr); + tval = tval & ~mask; + tval |= (value << ((4 - (where % 4))*8)) & mask; + reg_write(addr, tval); + break; + case 2: + addr = (ATH724X_PCI_DEV_BASE + where) & ~3; + mask = 0xffff0000 >> ((where % 4)*8); + tval = reg_read(addr); + tval = tval & ~mask; + tval |= (value << ((4 - (where % 4))*8)) & mask; + reg_write(addr, tval); + break; + case 4: + reg_write((ATH724X_PCI_DEV_BASE + where), value); + break; + default: + spin_unlock_irqrestore(&ath724x_pci_lock, flags); + + return PCIBIOS_BAD_REGISTER_NUMBER; + } + + spin_unlock_irqrestore(&ath724x_pci_lock, flags); + + return PCIBIOS_SUCCESSFUL; +} + +static struct pci_ops ath724x_pci_ops = { + .read = ath724x_pci_read, + .write = ath724x_pci_write, +}; + +static struct resource ath724x_io_resource = { + .name = "PCI IO space", + .start = 0, + .end = 0, + .flags = IORESOURCE_IO, +}; + +static struct resource ath724x_mem_resource = { + .name = "PCI memory space", + .start = ATH724X_PCI_MEM_BASE, + .end = ATH724X_PCI_MEM_BASE + ATH724X_PCI_MEM_SIZE - 1, + .flags = IORESOURCE_MEM, +}; + +static struct pci_controller ath724x_pci_controller = { + .pci_ops = &ath724x_pci_ops, + .io_resource = &ath724x_io_resource, + .mem_resource = &ath724x_mem_resource, +}; + +void ath724x_pci_add_data(struct ath724x_pci_data *data, int size) +{ + pci_data = data; + pci_data_size = size; +} + +int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin) +{ + unsigned int devfn = dev->devfn; + int irq = -1; + + if (devfn > pci_data_size - 1) + return irq; + + irq = pci_data[devfn].irq; + + return irq; +} + +int pcibios_plat_dev_init(struct pci_dev *dev) +{ + unsigned int devfn = dev->devfn; + + if (devfn > pci_data_size - 1) + return PCIBIOS_DEVICE_NOT_FOUND; + + dev->dev.platform_data = pci_data[devfn].pdata; + + return PCIBIOS_SUCCESSFUL; +} + +static int __init ath724x_pcibios_init(void) +{ + register_pci_controller(&ath724x_pci_controller); + + return PCIBIOS_SUCCESSFUL; +} + +arch_initcall(ath724x_pcibios_init); -- 1.7.7.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH 1/2] Initial PCI support for Atheros 724x SoCs. (v2) 2011-11-17 14:02 ` [PATCH 1/2] Initial PCI support for Atheros 724x SoCs. (v2) Rene Bolldorf @ 2011-11-17 14:33 ` Ralf Baechle 0 siblings, 0 replies; 11+ messages in thread From: Ralf Baechle @ 2011-11-17 14:33 UTC (permalink / raw) To: Rene Bolldorf; +Cc: linux-mips, linux-kernel On Thu, Nov 17, 2011 at 03:02:56PM +0100, Rene Bolldorf wrote: Queued for 3.3 but: > Subject: [PATCH 1/2] Initial PCI support for Atheros 724x SoCs. (v2) Please don't put the (v2) at the end of the subject line but rather into the initial part with the square brackets like: Subject: [PATCH 1/2, v2] Initial PCI support for Atheros 724x SoCs. That's so software like git-am will automatically discard that when applying a patch. Your use of non-ASCII characters is not quite yet supported in patchwork, see: http://patchwork.linux-mips.org/patch/3019/ http://patchwork.linux-mips.org/patch/3020/ My surname's spelling is also suffering from ASCII brain damaged software ... > + switch (size) { > + case 1: > + addr = where & ~3; > + mask = 0xff000000 >> ((where % 4) * 8); > + tval = reg_read(ATH724X_PCI_DEV_BASE + addr); > + tval = tval & ~mask; > + *value = (tval >> ((4 - (where % 4))*8)); > + break; > + case 2: That's a very odd style of formatting. The Linux coding style (see Documentation/) wants the break keyword indented with the same number of tabs as the preceeding block. Anyway, I took care of that. Thanks, Ralf ^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 2/2] Initial support for the Ubiquiti Networks XM board (rev 1.0). (patch v2) 2011-11-17 14:02 ` [PATCH 0/2] Summary Rene Bolldorf 2011-11-17 14:02 ` [PATCH 1/2] Initial PCI support for Atheros 724x SoCs. (v2) Rene Bolldorf @ 2011-11-17 14:02 ` Rene Bolldorf 2011-11-17 14:34 ` Ralf Baechle 1 sibling, 1 reply; 11+ messages in thread From: Rene Bolldorf @ 2011-11-17 14:02 UTC (permalink / raw) To: Ralf Baechle; +Cc: linux-mips, linux-kernel, Rene Bolldorf Signed-off-by: Rene Bolldorf <xsecute@googlemail.com> --- arch/mips/ath79/Kconfig | 11 ++++ arch/mips/ath79/Makefile | 1 + arch/mips/ath79/mach-ubnt-xm.c | 119 ++++++++++++++++++++++++++++++++++++++++ arch/mips/ath79/machtypes.h | 1 + 4 files changed, 132 insertions(+), 0 deletions(-) create mode 100644 arch/mips/ath79/mach-ubnt-xm.c diff --git a/arch/mips/ath79/Kconfig b/arch/mips/ath79/Kconfig index 4770741..1a35258 100644 --- a/arch/mips/ath79/Kconfig +++ b/arch/mips/ath79/Kconfig @@ -23,6 +23,16 @@ config ATH79_MACH_PB44 Say 'Y' here if you want your kernel to support the Atheros PB44 reference board. +config ATH79_MACH_UBNT_XM + bool "Ubiquiti Networks XM (rev 1.0) board" + select SOC_AR724X + select ATH79_DEV_GPIO_BUTTONS + select ATH79_DEV_LEDS_GPIO + select ATH79_DEV_SPI + help + Say 'Y' here if you want your kernel to support the + Ubiquiti Networks XM (rev 1.0) board. + endmenu config SOC_AR71XX @@ -33,6 +43,7 @@ config SOC_AR71XX config SOC_AR724X select USB_ARCH_HAS_EHCI select USB_ARCH_HAS_OHCI + select HW_HAS_PCI def_bool n config SOC_AR913X diff --git a/arch/mips/ath79/Makefile b/arch/mips/ath79/Makefile index c33d465..ac9f375 100644 --- a/arch/mips/ath79/Makefile +++ b/arch/mips/ath79/Makefile @@ -26,3 +26,4 @@ obj-$(CONFIG_ATH79_DEV_SPI) += dev-spi.o # obj-$(CONFIG_ATH79_MACH_AP81) += mach-ap81.o obj-$(CONFIG_ATH79_MACH_PB44) += mach-pb44.o +obj-$(CONFIG_ATH79_MACH_UBNT_XM) += mach-ubnt-xm.o diff --git a/arch/mips/ath79/mach-ubnt-xm.c b/arch/mips/ath79/mach-ubnt-xm.c new file mode 100644 index 0000000..3c311a5 --- /dev/null +++ b/arch/mips/ath79/mach-ubnt-xm.c @@ -0,0 +1,119 @@ +/* + * Ubiquiti Networks XM (rev 1.0) board support + * + * Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com> + * + * Derived from: mach-pb44.c + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include <linux/init.h> +#include <linux/pci.h> + +#ifdef CONFIG_PCI +#include <linux/ath9k_platform.h> +#include <asm/mach-ath79/pci-ath724x.h> +#endif /* CONFIG_PCI */ + +#include "machtypes.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-spi.h" + +#define UBNT_XM_GPIO_LED_L1 0 +#define UBNT_XM_GPIO_LED_L2 1 +#define UBNT_XM_GPIO_LED_L3 11 +#define UBNT_XM_GPIO_LED_L4 7 + +#define UBNT_XM_GPIO_BTN_RESET 12 + +#define UBNT_XM_KEYS_POLL_INTERVAL 20 +#define UBNT_XM_KEYS_DEBOUNCE_INTERVAL (3 * UBNT_XM_KEYS_POLL_INTERVAL) + +#define UBNT_XM_PCI_IRQ 48 +#define UBNT_XM_EEPROM_ADDR (u8 *) KSEG1ADDR(0x1fff1000) + +static struct gpio_led ubnt_xm_leds_gpio[] __initdata = { + { + .name = "ubnt-xm:red:link1", + .gpio = UBNT_XM_GPIO_LED_L1, + .active_low = 0, + }, { + .name = "ubnt-xm:orange:link2", + .gpio = UBNT_XM_GPIO_LED_L2, + .active_low = 0, + }, { + .name = "ubnt-xm:green:link3", + .gpio = UBNT_XM_GPIO_LED_L3, + .active_low = 0, + }, { + .name = "ubnt-xm:green:link4", + .gpio = UBNT_XM_GPIO_LED_L4, + .active_low = 0, + }, +}; + +static struct gpio_keys_button ubnt_xm_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = UBNT_XM_KEYS_DEBOUNCE_INTERVAL, + .gpio = UBNT_XM_GPIO_BTN_RESET, + .active_low = 1, + } +}; + +static struct spi_board_info ubnt_xm_spi_info[] = { + { + .bus_num = 0, + .chip_select = 0, + .max_speed_hz = 25000000, + .modalias = "mx25l6405d", + } +}; + +static struct ath79_spi_platform_data ubnt_xm_spi_data = { + .bus_num = 0, + .num_chipselect = 1, +}; + +#ifdef CONFIG_PCI +static struct ath9k_platform_data ubnt_xm_eeprom_data; + +static struct ath724x_pci_data ubnt_xm_pci_data[] = { + { + .irq = UBNT_XM_PCI_IRQ, + .pdata = &ubnt_xm_eeprom_data, + }, +}; +#endif /* CONFIG_PCI */ + +static void __init ubnt_xm_init(void) +{ + ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_xm_leds_gpio), + ubnt_xm_leds_gpio); + + ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, + ARRAY_SIZE(ubnt_xm_gpio_keys), + ubnt_xm_gpio_keys); + + ath79_register_spi(&ubnt_xm_spi_data, ubnt_xm_spi_info, + ARRAY_SIZE(ubnt_xm_spi_info)); + +#ifdef CONFIG_PCI + memcpy(ubnt_xm_eeprom_data.eeprom_data, UBNT_XM_EEPROM_ADDR, + sizeof(ubnt_xm_eeprom_data.eeprom_data)); + + ath724x_pci_add_data(ubnt_xm_pci_data, ARRAY_SIZE(ubnt_xm_pci_data)); +#endif /* CONFIG_PCI */ + +} + +MIPS_MACHINE(ATH79_MACH_UBNT_XM, + "UBNT-XM", + "Ubiquiti Networks XM (rev 1.0) board", + ubnt_xm_init); diff --git a/arch/mips/ath79/machtypes.h b/arch/mips/ath79/machtypes.h index 3940fe4..35d5d5c 100644 --- a/arch/mips/ath79/machtypes.h +++ b/arch/mips/ath79/machtypes.h @@ -18,6 +18,7 @@ enum ath79_mach_type { ATH79_MACH_GENERIC = 0, ATH79_MACH_AP81, /* Atheros AP81 reference board */ ATH79_MACH_PB44, /* Atheros PB44 reference board */ + ATH79_MACH_UBNT_XM, /* Ubiquiti Networks XM board rev 1.0 */ }; #endif /* _ATH79_MACHTYPE_H */ -- 1.7.7.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH 2/2] Initial support for the Ubiquiti Networks XM board (rev 1.0). (patch v2) 2011-11-17 14:02 ` [PATCH 2/2] Initial support for the Ubiquiti Networks XM board (rev 1.0). (patch v2) Rene Bolldorf @ 2011-11-17 14:34 ` Ralf Baechle 0 siblings, 0 replies; 11+ messages in thread From: Ralf Baechle @ 2011-11-17 14:34 UTC (permalink / raw) To: Rene Bolldorf; +Cc: linux-mips, linux-kernel Queued for 3.3 as well. Thanks, Ralf ^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2011-11-17 14:34 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2011-11-16 10:55 [PATCH 0/2] Summary Rene Bolldorf
2011-11-16 10:55 ` [PATCH 1/2] Initial PCI support for Atheros 724x SoCs Rene Bolldorf
2011-11-16 19:50 ` Manuel Lauss
2011-11-16 10:55 ` [PATCH 2/2] Initial support for the Ubiquiti Networks XM board Rene Bolldorf
2011-11-16 20:02 ` Gabor Juhos
[not found] ` <CAEWqx58YQAKQ=D=qteipHQq5Q==+aEiKMYP4FczMZ9kReogMDQ@mail.gmail.com>
2011-11-17 10:31 ` René Bolldorf
2011-11-17 14:02 ` [PATCH 0/2] Summary Rene Bolldorf
2011-11-17 14:02 ` [PATCH 1/2] Initial PCI support for Atheros 724x SoCs. (v2) Rene Bolldorf
2011-11-17 14:33 ` Ralf Baechle
2011-11-17 14:02 ` [PATCH 2/2] Initial support for the Ubiquiti Networks XM board (rev 1.0). (patch v2) Rene Bolldorf
2011-11-17 14:34 ` Ralf Baechle
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox; as well as URLs for NNTP newsgroup(s).