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From: Peter Zijlstra <a.p.zijlstra@chello.nl>
To: Stephane Eranian <eranian@google.com>
Cc: Vince Weaver <vweaver1@eecs.utk.edu>,
	mingo@redhat.com, hpa@zytor.com, linux-kernel@vger.kernel.org,
	tglx@linutronix.de, mingo@elte.hu
Subject: Re: [tip:perf/urgent] perf/x86: Enable raw event access to Intel offcore events
Date: Mon, 21 Nov 2011 22:42:10 +0100	[thread overview]
Message-ID: <1321911730.28118.35.camel@twins> (raw)
In-Reply-To: <CABPqkBTfNuY8_rcf-u=kf4V-bv_bZwUAhz3J3Z=wan29=09f9A@mail.gmail.com>

On Mon, 2011-11-21 at 22:39 +0100, Stephane Eranian wrote:
> To solve this problem (in the general case), you need to know which
> counter is taken (or required)
> by ALL pinned system-wide events across all CPUs. Once you've
> constructed the bitmap, you can
> use it as the basis (used_mask) to try and schedule the group events.
> 
Its worse, you also need to consider all task-pinned events if you want
to be complete. That's an even worse problem.

  reply	other threads:[~2011-11-21 21:42 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-08-03 16:05 [perf] enable raw OFFCORE_EVENTS for non-perf userspace Vince Weaver
2011-08-03 17:00 ` Vince Weaver
2011-08-04 15:55 ` Peter Zijlstra
2011-08-05  2:24   ` Vince Weaver
2011-08-05  9:49   ` Ingo Molnar
2011-11-07 18:30   ` Vince Weaver
2011-11-18 23:34 ` [tip:perf/urgent] perf/x86: Enable raw event access to Intel offcore events tip-bot for Peter Zijlstra
2011-11-21 18:24   ` Vince Weaver
2011-11-21 18:52     ` Peter Zijlstra
2011-11-21 19:01       ` Vince Weaver
2011-11-21 19:04         ` Stephane Eranian
2011-11-21 21:04           ` Vince Weaver
2011-11-21 21:39             ` Stephane Eranian
2011-11-21 21:42               ` Peter Zijlstra [this message]
2011-11-21 21:45                 ` Stephane Eranian
2011-11-21 21:48                   ` Peter Zijlstra
2011-11-21 22:05             ` Peter Zijlstra

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