From: Peter Zijlstra <a.p.zijlstra@chello.nl>
To: Andi Kleen <ak@linux.intel.com>
Cc: Andi Kleen <andi@firstfloor.org>,
linux-kernel@vger.kernel.org, eranian@google.com
Subject: Re: [PATCH 1/5] perf, x86: Don't assume the alternative cycles encoding is architectural
Date: Wed, 06 Jun 2012 16:53:05 +0200 [thread overview]
Message-ID: <1338994385.2749.130.camel@twins> (raw)
In-Reply-To: <20120606144952.GK28225@tassilo.jf.intel.com>
On Wed, 2012-06-06 at 07:49 -0700, Andi Kleen wrote:
> Is this for the intel_pmu or for the core_pmu?
>
> > + .pebs_aliases = intel_pebs_aliases_core2,
intel_pmu, we don't actually support PEBS on first gen. core I think.
> In any case since the code later does
>
> version = eax.split.version_id;
> if (version < 2)
> x86_pmu = core_pmu;
> else
> x86_pmu = intel_pmu;
>
> so core_pmu would be active even without model check, which would
> be still wrong.
By not setting pebs_aliases for core_pmu,
> So your patch would fix the problem iff you only fill in the pebs_aliases
> in the model number switch for known Core model numbers.
+ if (event->attr.precise_ip && x86_pmu.pebs_aliases)
+ x86_pmu.pebs_aliases(event);
Never happens, and we're happy again.
next prev parent reply other threads:[~2012-06-06 14:53 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-06-06 0:56 [PATCH 1/5] perf, x86: Don't assume the alternative cycles encoding is architectural Andi Kleen
2012-06-06 0:56 ` [PATCH 2/5] perf, x86: Don't assume there can be only 4 PEBS events Andi Kleen
2012-06-06 15:00 ` Peter Zijlstra
2012-06-06 16:10 ` Andi Kleen
2012-06-06 17:25 ` Peter Zijlstra
2012-06-06 16:17 ` [tip:perf/core] perf/x86: Don' t " tip-bot for Andi Kleen
2012-06-06 0:56 ` [PATCH 3/5] perf, x86: Check LBR format capability Andi Kleen
2012-06-06 4:29 ` Andi Kleen
2012-06-06 10:40 ` Peter Zijlstra
2012-06-06 14:14 ` Andi Kleen
2012-06-06 14:22 ` Peter Zijlstra
2012-06-06 14:37 ` Andi Kleen
2012-06-06 0:56 ` [PATCH 4/5] x86: Add rdpmcl() Andi Kleen
2012-06-06 16:16 ` [tip:perf/core] " tip-bot for Andi Kleen
2012-06-06 0:56 ` [PATCH 5/5] perf, x86: Prefer RDPMC over RDMSR for reading counters Andi Kleen
2012-06-06 10:46 ` Peter Zijlstra
2012-06-06 14:16 ` Andi Kleen
2012-06-06 14:21 ` Peter Zijlstra
2012-06-06 14:33 ` Stephane Eranian
2012-06-06 14:38 ` Peter Zijlstra
2012-06-06 14:41 ` Andi Kleen
2012-06-06 14:45 ` Peter Zijlstra
2012-06-06 10:39 ` [PATCH 1/5] perf, x86: Don't assume the alternative cycles encoding is architectural Peter Zijlstra
2012-06-06 14:12 ` Andi Kleen
2012-06-06 14:14 ` Peter Zijlstra
2012-06-06 14:23 ` Andi Kleen
2012-06-06 14:28 ` Peter Zijlstra
2012-06-06 14:35 ` Andi Kleen
2012-06-06 14:42 ` Peter Zijlstra
2012-06-06 14:49 ` Andi Kleen
2012-06-06 14:53 ` Peter Zijlstra [this message]
2012-06-06 16:08 ` Andi Kleen
2012-06-06 17:10 ` Peter Zijlstra
2012-06-06 17:48 ` Andi Kleen
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