From: Michael Ellerman <michael@ellerman.id.au>
To: Peter Zijlstra <peterz@infradead.org>
Cc: Feng Tang <feng.tang@intel.com>,
Arnaldo Carvalho de Melo <acme@redhat.com>,
Ingo Molnar <mingo@elte.hu>,
linux-kernel@vger.kernel.org, x86@kernel.org,
Stephane Eranian <eranian@google.com>,
Andi Kleen <ak@linux.intel.com>
Subject: Re: [PATCH] perf, x86: Enabled PEBS event to be exported in a raw format
Date: Wed, 04 Jul 2012 18:07:17 +1000 [thread overview]
Message-ID: <1341389237.22063.7.camel@concordia> (raw)
In-Reply-To: <1341306905.23484.53.camel@twins>
On Tue, 2012-07-03 at 11:15 +0200, Peter Zijlstra wrote:
> On Tue, 2012-07-03 at 17:36 +1000, Michael Ellerman wrote:
> > On Fri, 2012-06-29 at 00:00 +0800, Feng Tang wrote:
> > > From: Andi Kleen <ak@linux.intel.com>
> > >
> > > Add support for reporting PEBS records in a raw format that can
> > > be then parsed by perf script.
> > >
> > > This is roughly similar to the existing AMD IBS support.
> > >
> > > This is mainly for advanced users and to experiment with
> > > new usages. Widespread PEBS usages are expected to get higher
> > > level interfaces over time, like the existing "precise ip" support.
> >
> > Hi folks,
> >
> > Pardon if I slightly hijack this thread, but we'd like to do something
> > similar to this on powerpc.
>
> Do expand. What does exact information does it provide?
Basically we have three registers which provide various information about
the instruction which caused an event to overflow.
The first reports the address of the instruction, the second the data
address associated with the instruction, and the third reports "other
stuff".
We use the first for SAMPLE_IP, and the second for SAMPLE_ADDR, but
currently we have no way of spitting out the third register.
There's a whole bunch of info in there. I think the most interesting are
stuff like whether and where in the pipeline the instruction stalled, or
where a load was serviced from. I'm not sure to be honest, so I've asked
the HW guys what they're most interested in.
So I can imagine us coming up with a generic sample type for "sample
other info at event overflow", but I'm struggling to see how we'd make
the content of the sample non architecture specific, or even processor
version specific.
> > I've been telling people not to use PERF_SAMPLE_RAW because it provides
> > no way for the consumer to know what data they're getting, and it's not
> > extensible in any way.
> >
> > So is shovelling things out using PERF_SAMPLE_RAW generally acceptable
> > for "advanced usage" scenarios?
>
> No.
OK good, at least I was right about that :)
cheers
next prev parent reply other threads:[~2012-07-04 8:07 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-06-28 16:00 [PATCH] perf, x86: Enabled PEBS event to be exported in a raw format Feng Tang
2012-06-28 16:12 ` Peter Zijlstra
2012-06-28 16:15 ` Stephane Eranian
2012-06-28 16:19 ` Peter Zijlstra
2012-06-28 16:27 ` Stephane Eranian
2012-06-28 16:29 ` Peter Zijlstra
2012-06-28 18:26 ` Andi Kleen
2012-06-28 18:20 ` Andi Kleen
2012-06-28 20:51 ` Peter Zijlstra
2012-06-29 1:32 ` Feng Tang
2012-06-29 3:35 ` Andi Kleen
2012-06-29 12:49 ` Ingo Molnar
2012-07-03 7:36 ` Michael Ellerman
2012-07-03 9:15 ` Peter Zijlstra
2012-07-04 8:07 ` Michael Ellerman [this message]
2012-07-04 9:13 ` Peter Zijlstra
2012-07-05 15:57 ` Stephane Eranian
2012-07-07 7:27 ` Michael Ellerman
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