From: Peter Zijlstra <a.p.zijlstra@chello.nl>
To: "Yan, Zheng" <yanzheng@21cn.com>
Cc: "Yan, Zheng" <zheng.z.yan@intel.com>,
mingo@elte.hu, andi@firstfloor.org, linux-kernel@vger.kernel.org,
Stephane Eranian <eranian@gmail.com>
Subject: Re: [PATCH] perf/x86: Fix LLC-* and node-* events on Intel SandyBridge
Date: Mon, 23 Jul 2012 14:22:23 +0200 [thread overview]
Message-ID: <1343046143.2583.60.camel@twins> (raw)
In-Reply-To: <CAAM7YAms2cTgzJCr3qePyb_P+x4ZaX5XteT_0zDGfvYZ8UydhA@mail.gmail.com>
On Sun, 2012-07-22 at 19:43 +0800, Yan, Zheng wrote:
> On Sat, Jul 21, 2012 at 12:48 AM, Peter Zijlstra <a.p.zijlstra@chello.nl> wrote:
> > On Tue, 2012-07-17 at 17:27 +0800, Yan, Zheng wrote:
> >> From: "Yan, Zheng" <zheng.z.yan@intel.com>
> >>
> >> LLC-* and node-* events require using the OFFCORE_RESPONSE events
> >> on SandyBridge, but the hw_cache_extra_regs is left uninitialized.
> >> This patch adds the missing extra register configure table for
> >> SandyBridge.
> >
> > Last time I tried this I couldn't get sane numbers out of it..
> >
> > Does these encodings work, if so, do explain them.
> >
>
> I have tested them and compared the results with Nehalme. I think
> they do work.
OK, great, thanks!
> > I guess I can take this as an 'official' publication of this fact?
> >
> > (I knew those bits meant this, but I never got a response if I could
> > publish that information.)
> >
> See chapter 18.8.7 of Intel 64 SDM Volume 3 (Order Number 325384)
D'0h, that's confusing.. I was staring at 18.8.5..
next prev parent reply other threads:[~2012-07-23 12:22 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-07-17 9:27 [PATCH] perf/x86: Fix LLC-* and node-* events on Intel SandyBridge Yan, Zheng
2012-07-20 16:48 ` Peter Zijlstra
2012-07-22 11:43 ` Yan, Zheng
2012-07-23 12:22 ` Peter Zijlstra [this message]
2012-07-26 15:12 ` [tip:perf/core] " tip-bot for Yan, Zheng
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