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From: Peter Zijlstra <peterz@infradead.org>
To: Stephane Eranian <eranian@google.com>
Cc: mingo@kernel.org, linux-kernel <linux-kernel@vger.kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Arnaldo Carvalho de Melo <acme@infradead.org>
Subject: Re: [RFC][PATCH] perf, intel: Expose SMI_COUNT as a fixed counter
Date: Fri, 14 Sep 2012 15:43:00 +0200	[thread overview]
Message-ID: <1347630180.7172.34.camel@twins> (raw)
In-Reply-To: <1347449261.15764.9.camel@twins>

On Wed, 2012-09-12 at 13:27 +0200, Peter Zijlstra wrote:
> Subject: perf, intel: Expose SMI_COUNT as a fixed counter
> From: Peter Zijlstra <a.p.zijlstra@chello.nl>
> Date: Wed Sep 12 13:10:53 CEST 2012
> 
> The Intel SMI_COUNT sadly isn't a proper PMU event but a free-running
> MSR, expose it by creating another fake fixed PMC and another pseudo
> event.

OK, so it looks like this MSR has the same content on all CPUs.. is this
inherent to SMIs or is that just my box being funny?



      reply	other threads:[~2012-09-14 13:43 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-09-12 11:27 [RFC][PATCH] perf, intel: Expose SMI_COUNT as a fixed counter Peter Zijlstra
2012-09-14 13:43 ` Peter Zijlstra [this message]

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