From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932874Ab2JRX2O (ORCPT ); Thu, 18 Oct 2012 19:28:14 -0400 Received: from mga02.intel.com ([134.134.136.20]:16537 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756548Ab2JRXTx (ORCPT ); Thu, 18 Oct 2012 19:19:53 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.80,609,1344236400"; d="scan'208";a="229462620" From: Andi Kleen To: a.p.zijlstra@chello.nl Cc: x86@kernel.org, linux-kernel@vger.kernel.org, acme@redhat.com, eranian@google.com, Andi Kleen Subject: [PATCH 07/34] perf, x86: Support PERF_SAMPLE_ADDR on Haswell Date: Thu, 18 Oct 2012 16:19:15 -0700 Message-Id: <1350602382-12771-8-git-send-email-andi@firstfloor.org> X-Mailer: git-send-email 1.7.7.6 In-Reply-To: <1350602382-12771-1-git-send-email-andi@firstfloor.org> References: <1350602382-12771-1-git-send-email-andi@firstfloor.org> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Andi Kleen Haswell supplies the address for every PEBS memory event, so always fill it in when the user requested it. It will be 0 when not useful (no memory access) Signed-off-by: Andi Kleen --- arch/x86/kernel/cpu/perf_event_intel_ds.c | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c b/arch/x86/kernel/cpu/perf_event_intel_ds.c index 5d3d6be..8c893ce 100644 --- a/arch/x86/kernel/cpu/perf_event_intel_ds.c +++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c @@ -637,6 +637,10 @@ static void __intel_pmu_pebs_event(struct perf_event *event, data.raw = &raw; } + if ((event->attr.sample_type & PERF_SAMPLE_ADDR) && + x86_pmu.intel_cap.pebs_format >= 2) + data.addr = ((struct pebs_record_v2 *)pebs)->nhm.dla; + if (has_branch_stack(event)) data.br_stack = &cpuc->lbr_stack; -- 1.7.7.6