* [PATCH v2 0/2] gpio-langwell: update pci device table @ 2012-12-20 22:45 David Cohen 2012-12-20 22:45 ` [PATCH v2 1/2] gpio-langwell: cleanup driver David Cohen 2012-12-20 22:45 ` [PATCH v2 2/2] gpio-langwell: implement irq shutdown interface David Cohen 0 siblings, 2 replies; 5+ messages in thread From: David Cohen @ 2012-12-20 22:45 UTC (permalink / raw) To: grant.likely; +Cc: linux-kernel, alan, David Cohen Hi, Here goes 2nd try of Intel updates done on gpio-langwell driver. Patch "gpio-langwell: update pci device table" is not include in this set anymore due to it's already accepted and applied. Kind regards, David --- David Cohen (1): gpio-langwell: cleanup driver Li, Ning (1): gpio-langwell: implement irq shutdown interface drivers/gpio/gpio-langwell.c | 72 ++++++++++++++++++++++-------------------- 1 file changed, 38 insertions(+), 34 deletions(-) -- 1.7.10.4 ^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v2 1/2] gpio-langwell: cleanup driver 2012-12-20 22:45 [PATCH v2 0/2] gpio-langwell: update pci device table David Cohen @ 2012-12-20 22:45 ` David Cohen 2012-12-22 10:09 ` Grant Likely 2012-12-20 22:45 ` [PATCH v2 2/2] gpio-langwell: implement irq shutdown interface David Cohen 1 sibling, 1 reply; 5+ messages in thread From: David Cohen @ 2012-12-20 22:45 UTC (permalink / raw) To: grant.likely; +Cc: linux-kernel, alan, David Cohen This patch cleans up cosmetic issues, remove useless functions and add to_lnw_priv() macro to replace many usages of container_of(). Change-Id: I70a8fadd20a42493271d91633739bdddff19c8d8 Signed-off-by: David Cohen <david.a.cohen@intel.com> --- drivers/gpio/gpio-langwell.c | 51 ++++++++++++++---------------------------- 1 file changed, 17 insertions(+), 34 deletions(-) diff --git a/drivers/gpio/gpio-langwell.c b/drivers/gpio/gpio-langwell.c index 9b9d12e..2be69fe 100644 --- a/drivers/gpio/gpio-langwell.c +++ b/drivers/gpio/gpio-langwell.c @@ -71,10 +71,12 @@ struct lnw_gpio { struct irq_domain *domain; }; +#define to_lnw_priv(chip) container_of(chip, struct lnw_gpio, chip) + static void __iomem *gpio_reg(struct gpio_chip *chip, unsigned offset, enum GPIO_REG reg_type) { - struct lnw_gpio *lnw = container_of(chip, struct lnw_gpio, chip); + struct lnw_gpio *lnw = to_lnw_priv(chip); unsigned nreg = chip->ngpio / 32; u8 reg = offset / 32; void __iomem *ptr; @@ -86,7 +88,7 @@ static void __iomem *gpio_reg(struct gpio_chip *chip, unsigned offset, static void __iomem *gpio_reg_2bit(struct gpio_chip *chip, unsigned offset, enum GPIO_REG reg_type) { - struct lnw_gpio *lnw = container_of(chip, struct lnw_gpio, chip); + struct lnw_gpio *lnw = to_lnw_priv(chip); unsigned nreg = chip->ngpio / 32; u8 reg = offset / 16; void __iomem *ptr; @@ -130,7 +132,7 @@ static void lnw_gpio_set(struct gpio_chip *chip, unsigned offset, int value) static int lnw_gpio_direction_input(struct gpio_chip *chip, unsigned offset) { - struct lnw_gpio *lnw = container_of(chip, struct lnw_gpio, chip); + struct lnw_gpio *lnw = to_lnw_priv(chip); void __iomem *gpdr = gpio_reg(chip, offset, GPDR); u32 value; unsigned long flags; @@ -153,7 +155,7 @@ static int lnw_gpio_direction_input(struct gpio_chip *chip, unsigned offset) static int lnw_gpio_direction_output(struct gpio_chip *chip, unsigned offset, int value) { - struct lnw_gpio *lnw = container_of(chip, struct lnw_gpio, chip); + struct lnw_gpio *lnw = to_lnw_priv(chip); void __iomem *gpdr = gpio_reg(chip, offset, GPDR); unsigned long flags; @@ -176,7 +178,7 @@ static int lnw_gpio_direction_output(struct gpio_chip *chip, static int lnw_gpio_to_irq(struct gpio_chip *chip, unsigned offset) { - struct lnw_gpio *lnw = container_of(chip, struct lnw_gpio, chip); + struct lnw_gpio *lnw = to_lnw_priv(chip); return irq_create_mapping(lnw->domain, offset); } @@ -301,17 +303,6 @@ static const struct irq_domain_ops lnw_gpio_irq_ops = { .xlate = irq_domain_xlate_twocell, }; -#ifdef CONFIG_PM -static int lnw_gpio_runtime_resume(struct device *dev) -{ - return 0; -} - -static int lnw_gpio_runtime_suspend(struct device *dev) -{ - return 0; -} - static int lnw_gpio_runtime_idle(struct device *dev) { int err = pm_schedule_suspend(dev, 500); @@ -322,16 +313,8 @@ static int lnw_gpio_runtime_idle(struct device *dev) return -EBUSY; } -#else -#define lnw_gpio_runtime_suspend NULL -#define lnw_gpio_runtime_resume NULL -#define lnw_gpio_runtime_idle NULL -#endif - static const struct dev_pm_ops lnw_gpio_pm_ops = { - .runtime_suspend = lnw_gpio_runtime_suspend, - .runtime_resume = lnw_gpio_runtime_resume, - .runtime_idle = lnw_gpio_runtime_idle, + SET_RUNTIME_PM_OPS(NULL, NULL, lnw_gpio_runtime_idle) }; static int __devinit lnw_gpio_probe(struct pci_dev *pdev, @@ -351,7 +334,7 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev, retval = pci_request_regions(pdev, "langwell_gpio"); if (retval) { dev_err(&pdev->dev, "error requesting resources\n"); - goto err2; + goto err_pci_req_region; } /* get the gpio_base from bar1 */ start = pci_resource_start(pdev, 1); @@ -360,7 +343,7 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev, if (!base) { dev_err(&pdev->dev, "error mapping bar1\n"); retval = -EFAULT; - goto err3; + goto err_ioremap; } gpio_base = *((u32 *)base + 1); /* release the IO mapping, since we already get the info from bar1 */ @@ -372,21 +355,21 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev, if (!base) { dev_err(&pdev->dev, "error mapping bar0\n"); retval = -EFAULT; - goto err3; + goto err_ioremap; } - lnw = devm_kzalloc(&pdev->dev, sizeof(struct lnw_gpio), GFP_KERNEL); + lnw = devm_kzalloc(&pdev->dev, sizeof(*lnw), GFP_KERNEL); if (!lnw) { dev_err(&pdev->dev, "can't allocate langwell_gpio chip data\n"); retval = -ENOMEM; - goto err3; + goto err_ioremap; } lnw->domain = irq_domain_add_linear(pdev->dev.of_node, ngpio, &lnw_gpio_irq_ops, lnw); if (!lnw->domain) { retval = -ENOMEM; - goto err3; + goto err_ioremap; } lnw->reg_base = base; @@ -405,7 +388,7 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev, retval = gpiochip_add(&lnw->chip); if (retval) { dev_err(&pdev->dev, "langwell gpiochip_add error %d\n", retval); - goto err3; + goto err_ioremap; } lnw_irq_init_hw(lnw); @@ -420,9 +403,9 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev, return 0; -err3: +err_ioremap: pci_release_regions(pdev); -err2: +err_pci_req_region: pci_disable_device(pdev); return retval; } -- 1.7.10.4 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v2 1/2] gpio-langwell: cleanup driver 2012-12-20 22:45 ` [PATCH v2 1/2] gpio-langwell: cleanup driver David Cohen @ 2012-12-22 10:09 ` Grant Likely 0 siblings, 0 replies; 5+ messages in thread From: Grant Likely @ 2012-12-22 10:09 UTC (permalink / raw) To: David Cohen; +Cc: linux-kernel, alan, David Cohen On Thu, 20 Dec 2012 14:45:51 -0800, David Cohen <david.a.cohen@intel.com> wrote: > This patch cleans up cosmetic issues, remove useless functions and add > to_lnw_priv() macro to replace many usages of container_of(). > > Change-Id: I70a8fadd20a42493271d91633739bdddff19c8d8 > Signed-off-by: David Cohen <david.a.cohen@intel.com> > --- > drivers/gpio/gpio-langwell.c | 51 ++++++++++++++---------------------------- > 1 file changed, 17 insertions(+), 34 deletions(-) Applied, thanks. BTW, please try not to include "Change-Id:" tags in patches sent to the list. It's just something that I have to trim out when I apply. Thanks, g. > > diff --git a/drivers/gpio/gpio-langwell.c b/drivers/gpio/gpio-langwell.c > index 9b9d12e..2be69fe 100644 > --- a/drivers/gpio/gpio-langwell.c > +++ b/drivers/gpio/gpio-langwell.c > @@ -71,10 +71,12 @@ struct lnw_gpio { > struct irq_domain *domain; > }; > > +#define to_lnw_priv(chip) container_of(chip, struct lnw_gpio, chip) > + > static void __iomem *gpio_reg(struct gpio_chip *chip, unsigned offset, > enum GPIO_REG reg_type) > { > - struct lnw_gpio *lnw = container_of(chip, struct lnw_gpio, chip); > + struct lnw_gpio *lnw = to_lnw_priv(chip); > unsigned nreg = chip->ngpio / 32; > u8 reg = offset / 32; > void __iomem *ptr; > @@ -86,7 +88,7 @@ static void __iomem *gpio_reg(struct gpio_chip *chip, unsigned offset, > static void __iomem *gpio_reg_2bit(struct gpio_chip *chip, unsigned offset, > enum GPIO_REG reg_type) > { > - struct lnw_gpio *lnw = container_of(chip, struct lnw_gpio, chip); > + struct lnw_gpio *lnw = to_lnw_priv(chip); > unsigned nreg = chip->ngpio / 32; > u8 reg = offset / 16; > void __iomem *ptr; > @@ -130,7 +132,7 @@ static void lnw_gpio_set(struct gpio_chip *chip, unsigned offset, int value) > > static int lnw_gpio_direction_input(struct gpio_chip *chip, unsigned offset) > { > - struct lnw_gpio *lnw = container_of(chip, struct lnw_gpio, chip); > + struct lnw_gpio *lnw = to_lnw_priv(chip); > void __iomem *gpdr = gpio_reg(chip, offset, GPDR); > u32 value; > unsigned long flags; > @@ -153,7 +155,7 @@ static int lnw_gpio_direction_input(struct gpio_chip *chip, unsigned offset) > static int lnw_gpio_direction_output(struct gpio_chip *chip, > unsigned offset, int value) > { > - struct lnw_gpio *lnw = container_of(chip, struct lnw_gpio, chip); > + struct lnw_gpio *lnw = to_lnw_priv(chip); > void __iomem *gpdr = gpio_reg(chip, offset, GPDR); > unsigned long flags; > > @@ -176,7 +178,7 @@ static int lnw_gpio_direction_output(struct gpio_chip *chip, > > static int lnw_gpio_to_irq(struct gpio_chip *chip, unsigned offset) > { > - struct lnw_gpio *lnw = container_of(chip, struct lnw_gpio, chip); > + struct lnw_gpio *lnw = to_lnw_priv(chip); > return irq_create_mapping(lnw->domain, offset); > } > > @@ -301,17 +303,6 @@ static const struct irq_domain_ops lnw_gpio_irq_ops = { > .xlate = irq_domain_xlate_twocell, > }; > > -#ifdef CONFIG_PM > -static int lnw_gpio_runtime_resume(struct device *dev) > -{ > - return 0; > -} > - > -static int lnw_gpio_runtime_suspend(struct device *dev) > -{ > - return 0; > -} > - > static int lnw_gpio_runtime_idle(struct device *dev) > { > int err = pm_schedule_suspend(dev, 500); > @@ -322,16 +313,8 @@ static int lnw_gpio_runtime_idle(struct device *dev) > return -EBUSY; > } > > -#else > -#define lnw_gpio_runtime_suspend NULL > -#define lnw_gpio_runtime_resume NULL > -#define lnw_gpio_runtime_idle NULL > -#endif > - > static const struct dev_pm_ops lnw_gpio_pm_ops = { > - .runtime_suspend = lnw_gpio_runtime_suspend, > - .runtime_resume = lnw_gpio_runtime_resume, > - .runtime_idle = lnw_gpio_runtime_idle, > + SET_RUNTIME_PM_OPS(NULL, NULL, lnw_gpio_runtime_idle) > }; > > static int __devinit lnw_gpio_probe(struct pci_dev *pdev, > @@ -351,7 +334,7 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev, > retval = pci_request_regions(pdev, "langwell_gpio"); > if (retval) { > dev_err(&pdev->dev, "error requesting resources\n"); > - goto err2; > + goto err_pci_req_region; > } > /* get the gpio_base from bar1 */ > start = pci_resource_start(pdev, 1); > @@ -360,7 +343,7 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev, > if (!base) { > dev_err(&pdev->dev, "error mapping bar1\n"); > retval = -EFAULT; > - goto err3; > + goto err_ioremap; > } > gpio_base = *((u32 *)base + 1); > /* release the IO mapping, since we already get the info from bar1 */ > @@ -372,21 +355,21 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev, > if (!base) { > dev_err(&pdev->dev, "error mapping bar0\n"); > retval = -EFAULT; > - goto err3; > + goto err_ioremap; > } > > - lnw = devm_kzalloc(&pdev->dev, sizeof(struct lnw_gpio), GFP_KERNEL); > + lnw = devm_kzalloc(&pdev->dev, sizeof(*lnw), GFP_KERNEL); > if (!lnw) { > dev_err(&pdev->dev, "can't allocate langwell_gpio chip data\n"); > retval = -ENOMEM; > - goto err3; > + goto err_ioremap; > } > > lnw->domain = irq_domain_add_linear(pdev->dev.of_node, ngpio, > &lnw_gpio_irq_ops, lnw); > if (!lnw->domain) { > retval = -ENOMEM; > - goto err3; > + goto err_ioremap; > } > > lnw->reg_base = base; > @@ -405,7 +388,7 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev, > retval = gpiochip_add(&lnw->chip); > if (retval) { > dev_err(&pdev->dev, "langwell gpiochip_add error %d\n", retval); > - goto err3; > + goto err_ioremap; > } > > lnw_irq_init_hw(lnw); > @@ -420,9 +403,9 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev, > > return 0; > > -err3: > +err_ioremap: > pci_release_regions(pdev); > -err2: > +err_pci_req_region: > pci_disable_device(pdev); > return retval; > } > -- > 1.7.10.4 > -- Grant Likely, B.Sc, P.Eng. Secret Lab Technologies, Ltd. ^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v2 2/2] gpio-langwell: implement irq shutdown interface 2012-12-20 22:45 [PATCH v2 0/2] gpio-langwell: update pci device table David Cohen 2012-12-20 22:45 ` [PATCH v2 1/2] gpio-langwell: cleanup driver David Cohen @ 2012-12-20 22:45 ` David Cohen 2012-12-22 10:12 ` Grant Likely 1 sibling, 1 reply; 5+ messages in thread From: David Cohen @ 2012-12-20 22:45 UTC (permalink / raw) To: grant.likely; +Cc: linux-kernel, alan, Li, Ning, David Cohen From: "Li, Ning" <ning.li@intel.com> Disable falling/rising edge detection during irq shutdown operation. Signed-off-by: David Cohen <david.a.cohen@intel.com> Signed-off-by: Li, Ning <ning.li@intel.com> --- drivers/gpio/gpio-langwell.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/gpio/gpio-langwell.c b/drivers/gpio/gpio-langwell.c index 2be69fe..10cc520 100644 --- a/drivers/gpio/gpio-langwell.c +++ b/drivers/gpio/gpio-langwell.c @@ -225,11 +225,32 @@ static void lnw_irq_mask(struct irq_data *d) { } +static void lnw_irq_shutdown(struct irq_data *d) +{ + struct lnw_gpio *lnw = irq_data_get_irq_chip_data(d); + u32 gpio = irqd_to_hwirq(d); + unsigned long flags; + u32 value; + void __iomem *grer = gpio_reg(&lnw->chip, gpio, GRER); + void __iomem *gfer = gpio_reg(&lnw->chip, gpio, GFER); + + spin_lock_irqsave(&lnw->lock, flags); + + /* Disable falling/rising edge detection */ + value = readl(grer) & ~BIT(gpio % 32); + writel(value, grer); + value = readl(gfer) & ~BIT(gpio % 32); + writel(value, gfer); + + spin_unlock_irqrestore(&lnw->lock, flags); +}; + static struct irq_chip lnw_irqchip = { .name = "LNW-GPIO", .irq_mask = lnw_irq_mask, .irq_unmask = lnw_irq_unmask, .irq_set_type = lnw_irq_type, + .irq_shutdown = lnw_irq_shutdown, }; static DEFINE_PCI_DEVICE_TABLE(lnw_gpio_ids) = { /* pin number */ -- 1.7.10.4 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v2 2/2] gpio-langwell: implement irq shutdown interface 2012-12-20 22:45 ` [PATCH v2 2/2] gpio-langwell: implement irq shutdown interface David Cohen @ 2012-12-22 10:12 ` Grant Likely 0 siblings, 0 replies; 5+ messages in thread From: Grant Likely @ 2012-12-22 10:12 UTC (permalink / raw) To: David Cohen; +Cc: linux-kernel, alan, Li, Ning, David Cohen On Thu, 20 Dec 2012 14:45:52 -0800, David Cohen <david.a.cohen@intel.com> wrote: > From: "Li, Ning" <ning.li@intel.com> > > Disable falling/rising edge detection during irq shutdown operation. Why? (A commit description should also say why a change is needed. Not just what it does) g. > > Signed-off-by: David Cohen <david.a.cohen@intel.com> > Signed-off-by: Li, Ning <ning.li@intel.com> > --- > drivers/gpio/gpio-langwell.c | 21 +++++++++++++++++++++ > 1 file changed, 21 insertions(+) > > diff --git a/drivers/gpio/gpio-langwell.c b/drivers/gpio/gpio-langwell.c > index 2be69fe..10cc520 100644 > --- a/drivers/gpio/gpio-langwell.c > +++ b/drivers/gpio/gpio-langwell.c > @@ -225,11 +225,32 @@ static void lnw_irq_mask(struct irq_data *d) > { > } > > +static void lnw_irq_shutdown(struct irq_data *d) > +{ > + struct lnw_gpio *lnw = irq_data_get_irq_chip_data(d); > + u32 gpio = irqd_to_hwirq(d); > + unsigned long flags; > + u32 value; > + void __iomem *grer = gpio_reg(&lnw->chip, gpio, GRER); > + void __iomem *gfer = gpio_reg(&lnw->chip, gpio, GFER); > + > + spin_lock_irqsave(&lnw->lock, flags); > + > + /* Disable falling/rising edge detection */ > + value = readl(grer) & ~BIT(gpio % 32); > + writel(value, grer); > + value = readl(gfer) & ~BIT(gpio % 32); > + writel(value, gfer); > + > + spin_unlock_irqrestore(&lnw->lock, flags); > +}; > + > static struct irq_chip lnw_irqchip = { > .name = "LNW-GPIO", > .irq_mask = lnw_irq_mask, > .irq_unmask = lnw_irq_unmask, > .irq_set_type = lnw_irq_type, > + .irq_shutdown = lnw_irq_shutdown, > }; > > static DEFINE_PCI_DEVICE_TABLE(lnw_gpio_ids) = { /* pin number */ > -- > 1.7.10.4 > -- Grant Likely, B.Sc, P.Eng. Secret Lab Technologies, Ltd. ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2012-12-22 10:12 UTC | newest] Thread overview: 5+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2012-12-20 22:45 [PATCH v2 0/2] gpio-langwell: update pci device table David Cohen 2012-12-20 22:45 ` [PATCH v2 1/2] gpio-langwell: cleanup driver David Cohen 2012-12-22 10:09 ` Grant Likely 2012-12-20 22:45 ` [PATCH v2 2/2] gpio-langwell: implement irq shutdown interface David Cohen 2012-12-22 10:12 ` Grant Likely
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