Re: [PATCH v6 10/18] perf/x86: add support for PEBS Precise Store

Andi Kleen
2013-01-18T23:22:08Z

> u64 sample_type;
> - int fll;
> + int fll, fst;
>
> if (!intel_pmu_save_and_restart(event))
> return;
>
> fll = event->hw.flags & PERF_X86_EVENT_PEBS_LDLAT;
> + fst = event->hw.flags & PERF_X86_EVENT_PEBS_ST;
>
> perf_sample_data_init(&data, 0, event->hw.last_period);
>
> @@ -672,7 +715,7 @@ static void __intel_pmu_pebs_event(struct perf_event *event,
> /*
> * if PEBS-LL or PreciseStore
> */
> - if (fll) {
> + if (fll || fst) {

Ok I understand now why the other patch looked so strange.
it makes sense and you can disregard those comments.

Looks good

Acked-by: Andi Kleen <ak@linux.intel.com>

-Andi