Re: 3.6.11 AMD-Vi: Completion-Wait loop timed out

[Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>]

Udo, 

I am trying to debug the issue but need to check one thing on your
system.  Would you please try the following and check the output value
on your system?

# setpci -s 00:00.02 F0.w=90
# setpci -s 00:00.02 F4.w


Thank you,

Suravee


On Mon, 2013-01-21 at 10:04 -0600, Jacob Shin wrote:
> On Sun, Jan 20, 2013 at 12:48:28PM +0100, Borislav Petkov wrote:
> > On Sun, Jan 20, 2013 at 12:40:11PM +0100, Jörg Rödel wrote:
> > > Yes, the BIOS vendor can fix this issue. They need to disable NB clock
> > > gating for the IOMMU.
> > 
> > Right, Udo, you can try Gigabyte first.
> > 
> > Btw, can't we add a quirk to disable NB clock gating? Maybe Boris and
> > Jacob could help. CCed.
> 
> Hi, yes we will try and reproduce the NB clock gating issue on our
> end and submit a patch ASAP.
> 
> And Boris P., I think your IOAPIC not in IVRS issue we've also seen
> something similar recently (on Xen), so we'll atempt to tackle that
> one too afterwards.
> 
> -Jacob
> 
> > 
> > Guys, the error description is at
> > http://marc.info/?l=linux-kernel&m=135867802432660
> > 
> > Thanks.
> > 
> > -- 
> > Regards/Gruss,
> >     Boris.
> > 
> > Sent from a fat crate under my desk. Formatting is fine.
> > --
> >