From: David Woodhouse <dwmw2@infradead.org>
To: Daniel Vetter <daniel.vetter@ffwll.ch>,
"Sankaran, Rajesh" <rajesh.sankaran@intel.com>
Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>,
DRI Development <dri-devel@lists.freedesktop.org>,
LKML <linux-kernel@vger.kernel.org>,
stable@vger.kernel.org
Subject: Re: [PATCH] intel/iommu: force writebuffer-flush quirk on Gen 4 Chipsets
Date: Tue, 22 Jan 2013 12:55:35 -0600 [thread overview]
Message-ID: <1358880935.5523.147.camel@shinybook.infradead.org> (raw)
In-Reply-To: <1358794139-4820-1-git-send-email-daniel.vetter@ffwll.ch>
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On Mon, 2013-01-21 at 19:48 +0100, Daniel Vetter wrote:
> We already have the quirk entry for the mobile platform, but also
> reports on some desktop versions. So be paranoid and set it
> everywhere.
>
> References: http://www.mail-archive.com/dri-devel@lists.freedesktop.org/msg33138.html
> Cc: stable@vger.kernel.org
> Cc: David Woodhouse <dwmw2@infradead.org>
> Reported-and-tested-by: Mihai Moldovan <ionic@ionic.de>
> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> ---
> drivers/iommu/intel-iommu.c | 8 +++++++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
> index 9743769..19854bf 100644
> --- a/drivers/iommu/intel-iommu.c
> +++ b/drivers/iommu/intel-iommu.c
> @@ -4215,13 +4215,19 @@ static void __devinit quirk_iommu_rwbf(struct pci_dev *dev)
> {
> /*
> * Mobile 4 Series Chipset neglects to set RWBF capability,
> - * but needs it:
> + * but needs it. Same seems to hold for the desktop versions.
> */
> printk(KERN_INFO "DMAR: Forcing write-buffer flush capability\n");
> rwbf_quirk = 1;
> }
>
> DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2a40, quirk_iommu_rwbf);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e00, quirk_iommu_rwbf);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e10, quirk_iommu_rwbf);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e20, quirk_iommu_rwbf);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e30, quirk_iommu_rwbf);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e40, quirk_iommu_rwbf);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e90, quirk_iommu_rwbf);
>
> #define GGC 0x52
> #define GGC_MEMORY_SIZE_MASK (0xf << 8)
Again, I'm really unhappy about doing this kind of thing based on
hearsay. This should have a specific reference (with URL) to a published
erratum. Rajesh?
--
dwmw2
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next prev parent reply other threads:[~2013-01-22 18:55 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-01-21 18:48 [PATCH] intel/iommu: force writebuffer-flush quirk on Gen 4 Chipsets Daniel Vetter
2013-01-22 18:55 ` David Woodhouse [this message]
2013-02-13 18:40 ` Daniel Vetter
2013-02-18 15:12 ` Daniel Vetter
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