From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756796Ab3A2M67 (ORCPT ); Tue, 29 Jan 2013 07:58:59 -0500 Received: from hqemgate03.nvidia.com ([216.228.121.140]:11060 "EHLO hqemgate03.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752364Ab3A2M64 (ORCPT ); Tue, 29 Jan 2013 07:58:56 -0500 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Tue, 29 Jan 2013 04:58:21 -0800 From: Laxman Dewangan To: CC: , , , , Laxman Dewangan Subject: [PATCH 7/7] ARM: DT: tegra114: add KBC controller DT entry Date: Tue, 29 Jan 2013 18:26:23 +0530 Message-ID: <1359464183-6255-8-git-send-email-ldewangan@nvidia.com> X-Mailer: git-send-email 1.7.1.1 In-Reply-To: <1359464183-6255-1-git-send-email-ldewangan@nvidia.com> References: <1359464183-6255-1-git-send-email-ldewangan@nvidia.com> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org NVIDIA's Tegra114 SoCs have the matrix keyboard controller which supports 11x8 type of matrix. The number of rows and columns are configurable. Add DT entry for KBC controller. Signed-off-by: Laxman Dewangan --- arch/arm/boot/dts/tegra114.dtsi | 7 +++++++ 1 files changed, 7 insertions(+), 0 deletions(-) diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi index 17fd061..73a49f5 100644 --- a/arch/arm/boot/dts/tegra114.dtsi +++ b/arch/arm/boot/dts/tegra114.dtsi @@ -199,6 +199,13 @@ interrupts = <0 2 0x04>; }; + kbc { + compatible = "nvidia,tegra20-kbc"; + reg = <0x7000e200 0x100>; + interrupts = <0 85 0x04>; + status = "disabled"; + }; + pmc { compatible = "nvidia,tegra114-pmc", "nvidia,tegra30-pmc"; reg = <0x7000e400 0x400>; -- 1.7.1.1