From: Borislav Petkov <bp@alien8.de>
To: "H. Peter Anvin" <hpa@zytor.com>
Cc: Ingo Molnar <mingo@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
"Linus Torvalds" <torvalds@linux-foundation.org>,
Andrew Morton <akpm@linux-foundation.org>,
LKML <linux-kernel@vger.kernel.org>,
Boris Ostrovsky <boris.ostrovsky@oracle.com>,
Borislav Petkov <bp@suse.de>, Andre Przywara <andre@andrep.de>,
Marcelo Tosatti <mtosatti@redhat.com>
Subject: [PATCH 2/2] x86, kvm: Add MSR_AMD64_BU_CFG2 to the list of ignored MSRs
Date: Tue, 19 Feb 2013 19:33:13 +0100 [thread overview]
Message-ID: <1361298793-31834-2-git-send-email-bp@alien8.de> (raw)
In-Reply-To: <1361298793-31834-1-git-send-email-bp@alien8.de>
From: Borislav Petkov <bp@suse.de>
The "x86, AMD: Enable WC+ memory type on family 10 processors" patch
currently in -tip added a workaround for AMD F10h CPUs which #GPs my
guest when booted in kvm. This is because it accesses MSR_AMD64_BU_CFG2
which is not currently ignored by kvm. Do that because this MSR is only
baremetal-relevant anyway. While at it, move the ignored MSRs at the
beginning of kvm_set_msr_common so that we exit then and there.
Acked-by: Gleb Natapov <gleb@redhat.com>
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: Andre Przywara <andre@andrep.de>
Cc: Marcelo Tosatti <mtosatti@redhat.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
---
arch/x86/kvm/x86.c | 16 +++++++++-------
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index c243b81e3c74..37040079cd6b 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -1881,6 +1881,14 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
u64 data = msr_info->data;
switch (msr) {
+ case MSR_AMD64_NB_CFG:
+ case MSR_IA32_UCODE_REV:
+ case MSR_IA32_UCODE_WRITE:
+ case MSR_VM_HSAVE_PA:
+ case MSR_AMD64_PATCH_LOADER:
+ case MSR_AMD64_BU_CFG2:
+ break;
+
case MSR_EFER:
return set_efer(vcpu, data);
case MSR_K7_HWCR:
@@ -1900,8 +1908,6 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
return 1;
}
break;
- case MSR_AMD64_NB_CFG:
- break;
case MSR_IA32_DEBUGCTLMSR:
if (!data) {
/* We support the non-activated case already */
@@ -1914,11 +1920,6 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
__func__, data);
break;
- case MSR_IA32_UCODE_REV:
- case MSR_IA32_UCODE_WRITE:
- case MSR_VM_HSAVE_PA:
- case MSR_AMD64_PATCH_LOADER:
- break;
case 0x200 ... 0x2ff:
return set_msr_mtrr(vcpu, msr, data);
case MSR_IA32_APICBASE:
@@ -2253,6 +2254,7 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
case MSR_K8_INT_PENDING_MSG:
case MSR_AMD64_NB_CFG:
case MSR_FAM10H_MMIO_CONF_BASE:
+ case MSR_AMD64_BU_CFG2:
data = 0;
break;
case MSR_P6_PERFCTR0:
--
1.8.1.3.535.ga923c31
next prev parent reply other threads:[~2013-02-19 18:33 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-02-19 15:25 [GIT PULL] x86/cpu changes for v3.9 Ingo Molnar
2013-02-19 15:36 ` Borislav Petkov
2013-02-19 15:47 ` Ingo Molnar
2013-02-19 17:38 ` H. Peter Anvin
2013-02-19 17:47 ` Borislav Petkov
2013-02-19 17:51 ` H. Peter Anvin
2013-02-19 18:33 ` [PATCH 1/2] x86, CPU, AMD: Fix WC+ workaround for older hosts Borislav Petkov
2013-02-19 18:33 ` Borislav Petkov [this message]
2013-02-19 19:30 ` [tip:x86/cpu] x86, kvm: Add MSR_AMD64_BU_CFG2 to the list of ignored MSRs tip-bot for Borislav Petkov
2013-02-19 19:29 ` [tip:x86/cpu] x86, cpu, amd: Fix WC+ workaround for older virtual hosts tip-bot for Borislav Petkov
2013-02-19 17:57 ` [GIT PULL] x86/cpu changes for v3.9 Konrad Rzeszutek Wilk
2013-02-19 18:01 ` Borislav Petkov
2013-02-19 18:19 ` Boris Ostrovsky
2013-02-19 18:21 ` H. Peter Anvin
2013-02-19 18:26 ` Boris Ostrovsky
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