public inbox for linux-kernel@vger.kernel.org
 help / color / mirror / Atom feed
From: Jacob Shin <jacob.shin@amd.com>
To: Ingo Molnar <mingo@redhat.com>,
	Peter Zijlstra <a.p.zijlstra@chello.nl>,
	Arnaldo Carvalho de Melo <acme@ghostprotocols.net>
Cc: "H. Peter Anvin" <hpa@zytor.com>,
	Thomas Gleixner <tglx@linutronix.de>, <x86@kernel.org>,
	Stephane Eranian <eranian@google.com>,
	Jiri Olsa <jolsa@redhat.com>, <linux-kernel@vger.kernel.org>,
	Jacob Shin <jacob.shin@amd.com>
Subject: [PATCH RESEND 2/3] perf, x86: Allow for multiple kfree_on_online pointers
Date: Tue, 9 Apr 2013 10:23:53 -0500	[thread overview]
Message-ID: <1365521034-4496-3-git-send-email-jacob.shin@amd.com> (raw)
In-Reply-To: <1365521034-4496-1-git-send-email-jacob.shin@amd.com>

Currently only 1 pointer can be freed using kfree_on_online mechanism,
allow for multiple.

Signed-off-by: Jacob Shin <jacob.shin@amd.com>
---
 arch/x86/kernel/cpu/perf_event.c       |    7 +++++--
 arch/x86/kernel/cpu/perf_event.h       |    3 ++-
 arch/x86/kernel/cpu/perf_event_amd.c   |    2 +-
 arch/x86/kernel/cpu/perf_event_intel.c |    2 +-
 4 files changed, 9 insertions(+), 5 deletions(-)

diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index 5ed7a4c..62516cf 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -1258,10 +1258,12 @@ x86_pmu_notifier(struct notifier_block *self, unsigned long action, void *hcpu)
 	unsigned int cpu = (long)hcpu;
 	struct cpu_hw_events *cpuc = &per_cpu(cpu_hw_events, cpu);
 	int ret = NOTIFY_OK;
+	int i;
 
 	switch (action & ~CPU_TASKS_FROZEN) {
 	case CPU_UP_PREPARE:
-		cpuc->kfree_on_online = NULL;
+		for (i = 0; i < MAX_KFREE_ON_ONLINE; i++)
+			cpuc->kfree_on_online[i] = NULL;
 		if (x86_pmu.cpu_prepare)
 			ret = x86_pmu.cpu_prepare(cpu);
 		break;
@@ -1274,7 +1276,8 @@ x86_pmu_notifier(struct notifier_block *self, unsigned long action, void *hcpu)
 		break;
 
 	case CPU_ONLINE:
-		kfree(cpuc->kfree_on_online);
+		for (i = 0; i < MAX_KFREE_ON_ONLINE; i++)
+			kfree(cpuc->kfree_on_online[i]);
 		break;
 
 	case CPU_DYING:
diff --git a/arch/x86/kernel/cpu/perf_event.h b/arch/x86/kernel/cpu/perf_event.h
index f092dfe..9751201 100644
--- a/arch/x86/kernel/cpu/perf_event.h
+++ b/arch/x86/kernel/cpu/perf_event.h
@@ -118,6 +118,7 @@ struct intel_shared_regs {
 };
 
 #define MAX_LBR_ENTRIES		16
+#define MAX_KFREE_ON_ONLINE	4
 
 struct cpu_hw_events {
 	/*
@@ -174,7 +175,7 @@ struct cpu_hw_events {
 	/* Inverted mask of bits to clear in the perf_ctr ctrl registers */
 	u64				perf_ctr_virt_mask;
 
-	void				*kfree_on_online;
+	void				*kfree_on_online[MAX_KFREE_ON_ONLINE];
 };
 
 #define __EVENT_CONSTRAINT(c, n, m, w, o, f) {\
diff --git a/arch/x86/kernel/cpu/perf_event_amd.c b/arch/x86/kernel/cpu/perf_event_amd.c
index 23964a6..36b5162 100644
--- a/arch/x86/kernel/cpu/perf_event_amd.c
+++ b/arch/x86/kernel/cpu/perf_event_amd.c
@@ -505,7 +505,7 @@ static void amd_pmu_cpu_starting(int cpu)
 			continue;
 
 		if (nb->id == nb_id) {
-			cpuc->kfree_on_online = cpuc->amd_nb;
+			cpuc->kfree_on_online[0] = cpuc->amd_nb;
 			cpuc->amd_nb = nb;
 			break;
 		}
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index e84c4ba..ef709d3 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -1741,7 +1741,7 @@ static void intel_pmu_cpu_starting(int cpu)
 
 			pc = per_cpu(cpu_hw_events, i).shared_regs;
 			if (pc && pc->core_id == core_id) {
-				cpuc->kfree_on_online = cpuc->shared_regs;
+				cpuc->kfree_on_online[0] = cpuc->shared_regs;
 				cpuc->shared_regs = pc;
 				break;
 			}
-- 
1.7.9.5



  parent reply	other threads:[~2013-04-09 15:24 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-04-09 15:23 [PATCH RESEND 0/3] perf, amd: Support for Family 16h L2I Performance Counters Jacob Shin
2013-04-09 15:23 ` [PATCH RESEND 1/3] perf, amd: Further generalize NB event constraints handling logic Jacob Shin
2013-04-09 15:23 ` Jacob Shin [this message]
2013-04-09 15:23 ` [PATCH RESEND 3/3] perf, amd: Enable L2I performance counters on AMD Family 16h Jacob Shin
2013-04-10  9:41 ` [PATCH RESEND 0/3] perf, amd: Support for Family 16h L2I Performance Counters Peter Zijlstra
2013-04-10  9:48   ` Peter Zijlstra
2013-04-10 11:38   ` Stephane Eranian
2013-04-10 11:49     ` Peter Zijlstra
2013-04-10 11:52       ` Stephane Eranian
2013-04-10 11:55       ` Peter Zijlstra
2013-04-10 11:56         ` Ingo Molnar
2013-04-10 12:12           ` Stephane Eranian
2013-04-10 12:28             ` Ingo Molnar
2013-04-10 12:29               ` Stephane Eranian
2013-04-10 15:03                 ` Jacob Shin
2013-04-10 12:29             ` Borislav Petkov

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1365521034-4496-3-git-send-email-jacob.shin@amd.com \
    --to=jacob.shin@amd.com \
    --cc=a.p.zijlstra@chello.nl \
    --cc=acme@ghostprotocols.net \
    --cc=eranian@google.com \
    --cc=hpa@zytor.com \
    --cc=jolsa@redhat.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mingo@redhat.com \
    --cc=tglx@linutronix.de \
    --cc=x86@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox